Lines Matching refs:appl_writel
300 static inline void appl_writel(struct tegra_pcie_dw *pcie, const u32 value, in appl_writel() function
380 appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_rp_irq_handler()
386 appl_writel(pcie, val, APPL_CAR_RESET_OVRD); in tegra_pcie_rp_irq_handler()
390 appl_writel(pcie, val, APPL_CAR_RESET_OVRD); in tegra_pcie_rp_irq_handler()
401 appl_writel(pcie, in tegra_pcie_rp_irq_handler()
413 appl_writel(pcie, in tegra_pcie_rp_irq_handler()
451 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in pex_ep_event_hot_rst_done()
452 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in pex_ep_event_hot_rst_done()
453 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in pex_ep_event_hot_rst_done()
454 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in pex_ep_event_hot_rst_done()
455 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in pex_ep_event_hot_rst_done()
456 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in pex_ep_event_hot_rst_done()
457 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in pex_ep_event_hot_rst_done()
458 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in pex_ep_event_hot_rst_done()
459 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in pex_ep_event_hot_rst_done()
460 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in pex_ep_event_hot_rst_done()
461 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in pex_ep_event_hot_rst_done()
462 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in pex_ep_event_hot_rst_done()
463 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in pex_ep_event_hot_rst_done()
464 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in pex_ep_event_hot_rst_done()
465 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in pex_ep_event_hot_rst_done()
466 appl_writel(pcie, 0xFFFFFFFF, APPL_MSI_CTRL_2); in pex_ep_event_hot_rst_done()
470 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_hot_rst_done()
501 appl_writel(pcie, val, APPL_LTR_MSG_1); in tegra_pcie_ep_irq_thread()
506 appl_writel(pcie, val, APPL_LTR_MSG_2); in tegra_pcie_ep_irq_thread()
533 appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_ep_hard_irq()
552 appl_writel(pcie, status_l1, APPL_INTR_STATUS_L1_15); in tegra_pcie_ep_hard_irq()
563 appl_writel(pcie, status_l0, APPL_INTR_STATUS_L0); in tegra_pcie_ep_hard_irq()
742 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_system_interrupts()
747 appl_writel(pcie, val, APPL_INTR_EN_L1_0_0); in tegra_pcie_enable_system_interrupts()
753 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_system_interrupts()
758 appl_writel(pcie, val, APPL_INTR_EN_L1_18); in tegra_pcie_enable_system_interrupts()
782 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_legacy_interrupts()
790 appl_writel(pcie, val, APPL_INTR_EN_L1_8_0); in tegra_pcie_enable_legacy_interrupts()
803 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in tegra_pcie_enable_msi_interrupts()
812 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in tegra_pcie_enable_interrupts()
813 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in tegra_pcie_enable_interrupts()
814 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in tegra_pcie_enable_interrupts()
815 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in tegra_pcie_enable_interrupts()
816 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in tegra_pcie_enable_interrupts()
817 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in tegra_pcie_enable_interrupts()
818 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in tegra_pcie_enable_interrupts()
819 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in tegra_pcie_enable_interrupts()
820 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in tegra_pcie_enable_interrupts()
821 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in tegra_pcie_enable_interrupts()
822 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in tegra_pcie_enable_interrupts()
823 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in tegra_pcie_enable_interrupts()
824 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in tegra_pcie_enable_interrupts()
825 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in tegra_pcie_enable_interrupts()
826 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in tegra_pcie_enable_interrupts()
977 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_dw_start_link()
984 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_start_link()
989 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_dw_start_link()
1019 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_start_link()
1431 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_config_controller()
1441 appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK, in tegra_pcie_config_controller()
1445 appl_writel(pcie, APPL_DM_TYPE_RP, APPL_DM_TYPE); in tegra_pcie_config_controller()
1447 appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE); in tegra_pcie_config_controller()
1450 appl_writel(pcie, val | APPL_CTRL_SYS_PRE_DET_STATE, APPL_CTRL); in tegra_pcie_config_controller()
1454 appl_writel(pcie, val, APPL_CFG_MISC); in tegra_pcie_config_controller()
1466 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_config_controller()
1473 appl_writel(pcie, val, APPL_PINMUX); in tegra_pcie_config_controller()
1477 appl_writel(pcie, in tegra_pcie_config_controller()
1570 appl_writel(pcie, val, APPL_RADM_STATUS); in tegra_pcie_try_link_l2()
1595 appl_writel(pcie, 0x0, APPL_INTR_EN_L0_0); in tegra_pcie_dw_pme_turnoff()
1607 appl_writel(pcie, data, APPL_PINMUX); in tegra_pcie_dw_pme_turnoff()
1636 appl_writel(pcie, data, APPL_PINMUX); in tegra_pcie_dw_pme_turnoff()
1710 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_assert()
1799 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); in pex_ep_event_pex_rst_deassert()
1800 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); in pex_ep_event_pex_rst_deassert()
1801 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); in pex_ep_event_pex_rst_deassert()
1802 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); in pex_ep_event_pex_rst_deassert()
1803 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); in pex_ep_event_pex_rst_deassert()
1804 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); in pex_ep_event_pex_rst_deassert()
1805 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); in pex_ep_event_pex_rst_deassert()
1806 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); in pex_ep_event_pex_rst_deassert()
1807 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); in pex_ep_event_pex_rst_deassert()
1808 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); in pex_ep_event_pex_rst_deassert()
1809 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); in pex_ep_event_pex_rst_deassert()
1810 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); in pex_ep_event_pex_rst_deassert()
1811 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); in pex_ep_event_pex_rst_deassert()
1812 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); in pex_ep_event_pex_rst_deassert()
1813 appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); in pex_ep_event_pex_rst_deassert()
1819 appl_writel(pcie, val, APPL_DM_TYPE); in pex_ep_event_pex_rst_deassert()
1821 appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE); in pex_ep_event_pex_rst_deassert()
1826 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_deassert()
1831 appl_writel(pcie, val, APPL_CFG_MISC); in pex_ep_event_pex_rst_deassert()
1836 appl_writel(pcie, val, APPL_PINMUX); in pex_ep_event_pex_rst_deassert()
1838 appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK, in pex_ep_event_pex_rst_deassert()
1841 appl_writel(pcie, pcie->atu_dma_res->start & in pex_ep_event_pex_rst_deassert()
1849 appl_writel(pcie, val, APPL_INTR_EN_L0_0); in pex_ep_event_pex_rst_deassert()
1854 appl_writel(pcie, val, APPL_INTR_EN_L1_0_0); in pex_ep_event_pex_rst_deassert()
1912 appl_writel(pcie, val, APPL_LTR_MSG_2); in pex_ep_event_pex_rst_deassert()
1918 appl_writel(pcie, val, APPL_CTRL); in pex_ep_event_pex_rst_deassert()
1958 appl_writel(pcie, 1, APPL_LEGACY_INTX); in tegra_pcie_ep_raise_legacy_irq()
1960 appl_writel(pcie, 0, APPL_LEGACY_INTX); in tegra_pcie_ep_raise_legacy_irq()
1969 appl_writel(pcie, BIT(irq), APPL_MSI_CTRL_1); in tegra_pcie_ep_raise_msi_irq()
2331 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_suspend_late()
2403 appl_writel(pcie, val, APPL_CTRL); in tegra_pcie_dw_resume_early()