Lines Matching +full:pci +full:- +full:dev
1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/pci.h>
22 #include "pcie-designware.h"
24 #define to_meson_pcie(x) dev_get_drvdata((x)->dev)
68 struct dw_pcie pci; member
80 struct device *dev = mp->pci.dev; in meson_pcie_get_reset() local
84 reset = devm_reset_control_get_shared(dev, id); in meson_pcie_get_reset()
86 reset = devm_reset_control_get(dev, id); in meson_pcie_get_reset()
93 struct meson_pcie_rc_reset *mrst = &mp->mrst; in meson_pcie_get_resets()
95 mrst->port = meson_pcie_get_reset(mp, "port", PCIE_NORMAL_RESET); in meson_pcie_get_resets()
96 if (IS_ERR(mrst->port)) in meson_pcie_get_resets()
97 return PTR_ERR(mrst->port); in meson_pcie_get_resets()
98 reset_control_deassert(mrst->port); in meson_pcie_get_resets()
100 mrst->apb = meson_pcie_get_reset(mp, "apb", PCIE_SHARED_RESET); in meson_pcie_get_resets()
101 if (IS_ERR(mrst->apb)) in meson_pcie_get_resets()
102 return PTR_ERR(mrst->apb); in meson_pcie_get_resets()
103 reset_control_deassert(mrst->apb); in meson_pcie_get_resets()
111 struct dw_pcie *pci = &mp->pci; in meson_pcie_get_mems() local
113 pci->dbi_base = devm_platform_ioremap_resource_byname(pdev, "elbi"); in meson_pcie_get_mems()
114 if (IS_ERR(pci->dbi_base)) in meson_pcie_get_mems()
115 return PTR_ERR(pci->dbi_base); in meson_pcie_get_mems()
117 mp->cfg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); in meson_pcie_get_mems()
118 if (IS_ERR(mp->cfg_base)) in meson_pcie_get_mems()
119 return PTR_ERR(mp->cfg_base); in meson_pcie_get_mems()
128 ret = phy_init(mp->phy); in meson_pcie_power_on()
132 ret = phy_power_on(mp->phy); in meson_pcie_power_on()
134 phy_exit(mp->phy); in meson_pcie_power_on()
143 phy_power_off(mp->phy); in meson_pcie_power_off()
144 phy_exit(mp->phy); in meson_pcie_power_off()
149 struct meson_pcie_rc_reset *mrst = &mp->mrst; in meson_pcie_reset()
152 ret = phy_reset(mp->phy); in meson_pcie_reset()
156 reset_control_assert(mrst->port); in meson_pcie_reset()
157 reset_control_assert(mrst->apb); in meson_pcie_reset()
159 reset_control_deassert(mrst->port); in meson_pcie_reset()
160 reset_control_deassert(mrst->apb); in meson_pcie_reset()
173 static inline struct clk *meson_pcie_probe_clock(struct device *dev, in meson_pcie_probe_clock() argument
179 clk = devm_clk_get(dev, id); in meson_pcie_probe_clock()
186 dev_err(dev, "set clk rate failed, ret = %d\n", ret); in meson_pcie_probe_clock()
193 dev_err(dev, "couldn't enable clk\n"); in meson_pcie_probe_clock()
197 devm_add_action_or_reset(dev, meson_pcie_disable_clock, clk); in meson_pcie_probe_clock()
204 struct device *dev = mp->pci.dev; in meson_pcie_probe_clocks() local
205 struct meson_pcie_clk_res *res = &mp->clk_res; in meson_pcie_probe_clocks()
207 res->port_clk = meson_pcie_probe_clock(dev, "port", PORT_CLK_RATE); in meson_pcie_probe_clocks()
208 if (IS_ERR(res->port_clk)) in meson_pcie_probe_clocks()
209 return PTR_ERR(res->port_clk); in meson_pcie_probe_clocks()
211 res->general_clk = meson_pcie_probe_clock(dev, "general", 0); in meson_pcie_probe_clocks()
212 if (IS_ERR(res->general_clk)) in meson_pcie_probe_clocks()
213 return PTR_ERR(res->general_clk); in meson_pcie_probe_clocks()
215 res->clk = meson_pcie_probe_clock(dev, "pclk", 0); in meson_pcie_probe_clocks()
216 if (IS_ERR(res->clk)) in meson_pcie_probe_clocks()
217 return PTR_ERR(res->clk); in meson_pcie_probe_clocks()
224 return readl(mp->cfg_base + reg); in meson_cfg_readl()
229 writel(val, mp->cfg_base + reg); in meson_cfg_writel()
234 gpiod_set_value_cansleep(mp->reset_gpio, 1); in meson_pcie_assert_reset()
236 gpiod_set_value_cansleep(mp->reset_gpio, 0); in meson_pcie_assert_reset()
250 struct device *dev = mp->pci.dev; in meson_size_to_payload() local
258 dev_warn(dev, "payload size %d, set to default 256\n", size); in meson_size_to_payload()
262 return fls(size) - 8; in meson_size_to_payload()
267 struct dw_pcie *pci = &mp->pci; in meson_set_max_payload() local
269 u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); in meson_set_max_payload()
272 val = dw_pcie_readl_dbi(pci, offset + PCI_EXP_DEVCTL); in meson_set_max_payload()
274 dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val); in meson_set_max_payload()
276 val = dw_pcie_readl_dbi(pci, offset + PCI_EXP_DEVCTL); in meson_set_max_payload()
278 dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val); in meson_set_max_payload()
283 struct dw_pcie *pci = &mp->pci; in meson_set_max_rd_req_size() local
285 u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); in meson_set_max_rd_req_size()
288 val = dw_pcie_readl_dbi(pci, offset + PCI_EXP_DEVCTL); in meson_set_max_rd_req_size()
290 dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val); in meson_set_max_rd_req_size()
292 val = dw_pcie_readl_dbi(pci, offset + PCI_EXP_DEVCTL); in meson_set_max_rd_req_size()
294 dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val); in meson_set_max_rd_req_size()
297 static int meson_pcie_start_link(struct dw_pcie *pci) in meson_pcie_start_link() argument
299 struct meson_pcie *mp = to_meson_pcie(pci); in meson_pcie_start_link()
323 *val = (*val & ((1 << (size * 8)) - 1)) << (8 * (where & 3)); in meson_pcie_rd_own_conf()
327 *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1); in meson_pcie_rd_own_conf()
339 static int meson_pcie_link_up(struct dw_pcie *pci) in meson_pcie_link_up() argument
341 struct meson_pcie *mp = to_meson_pcie(pci); in meson_pcie_link_up()
342 struct device *dev = pci->dev; in meson_pcie_link_up() local
358 dev_dbg(dev, "smlh_link_up is on\n"); in meson_pcie_link_up()
360 dev_dbg(dev, "rdlh_link_up is on\n"); in meson_pcie_link_up()
362 dev_dbg(dev, "ltssm_up is on\n"); in meson_pcie_link_up()
364 dev_dbg(dev, "speed_okay\n"); in meson_pcie_link_up()
374 dev_err(dev, "error: wait linkup timeout\n"); in meson_pcie_link_up()
380 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in meson_pcie_host_init() local
381 struct meson_pcie *mp = to_meson_pcie(pci); in meson_pcie_host_init()
383 pp->bridge->ops = &meson_pci_ops; in meson_pcie_host_init()
402 struct device *dev = &pdev->dev; in meson_pcie_probe() local
403 struct dw_pcie *pci; in meson_pcie_probe() local
407 mp = devm_kzalloc(dev, sizeof(*mp), GFP_KERNEL); in meson_pcie_probe()
409 return -ENOMEM; in meson_pcie_probe()
411 pci = &mp->pci; in meson_pcie_probe()
412 pci->dev = dev; in meson_pcie_probe()
413 pci->ops = &dw_pcie_ops; in meson_pcie_probe()
414 pci->pp.ops = &meson_pcie_host_ops; in meson_pcie_probe()
415 pci->num_lanes = 1; in meson_pcie_probe()
417 mp->phy = devm_phy_get(dev, "pcie"); in meson_pcie_probe()
418 if (IS_ERR(mp->phy)) { in meson_pcie_probe()
419 dev_err(dev, "get phy failed, %ld\n", PTR_ERR(mp->phy)); in meson_pcie_probe()
420 return PTR_ERR(mp->phy); in meson_pcie_probe()
423 mp->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); in meson_pcie_probe()
424 if (IS_ERR(mp->reset_gpio)) { in meson_pcie_probe()
425 dev_err(dev, "get reset gpio failed\n"); in meson_pcie_probe()
426 return PTR_ERR(mp->reset_gpio); in meson_pcie_probe()
431 dev_err(dev, "get reset resource failed, %d\n", ret); in meson_pcie_probe()
437 dev_err(dev, "get memory resource failed, %d\n", ret); in meson_pcie_probe()
443 dev_err(dev, "phy power on failed, %d\n", ret); in meson_pcie_probe()
449 dev_err(dev, "reset failed, %d\n", ret); in meson_pcie_probe()
455 dev_err(dev, "init clock resources failed, %d\n", ret); in meson_pcie_probe()
461 ret = dw_pcie_host_init(&pci->pp); in meson_pcie_probe()
463 dev_err(dev, "Add PCIe port failed, %d\n", ret); in meson_pcie_probe()
476 .compatible = "amlogic,axg-pcie",
479 .compatible = "amlogic,g12a-pcie",
488 .name = "meson-pcie",