Lines Matching full:pcie
3 * PCIe host controller driver for Freescale Layerscape SoCs
26 #include "pcie-designware.h"
52 #define ls_pcie_pf_readl_addr(addr) ls_pcie_pf_readl(pcie, addr)
55 static bool ls_pcie_is_bridge(struct ls_pcie *pcie) in ls_pcie_is_bridge() argument
57 struct dw_pcie *pci = pcie->pci; in ls_pcie_is_bridge()
67 static void ls_pcie_clear_multifunction(struct ls_pcie *pcie) in ls_pcie_clear_multifunction() argument
69 struct dw_pcie *pci = pcie->pci; in ls_pcie_clear_multifunction()
75 static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie) in ls_pcie_drop_msg_tlp() argument
78 struct dw_pcie *pci = pcie->pci; in ls_pcie_drop_msg_tlp()
86 static void ls_pcie_fix_error_response(struct ls_pcie *pcie) in ls_pcie_fix_error_response() argument
88 struct dw_pcie *pci = pcie->pci; in ls_pcie_fix_error_response()
93 static u32 ls_pcie_pf_readl(struct ls_pcie *pcie, u32 off) in ls_pcie_pf_readl() argument
95 if (pcie->big_endian) in ls_pcie_pf_readl()
96 return ioread32be(pcie->pf_base + off); in ls_pcie_pf_readl()
98 return ioread32(pcie->pf_base + off); in ls_pcie_pf_readl()
101 static void ls_pcie_pf_writel(struct ls_pcie *pcie, u32 off, u32 val) in ls_pcie_pf_writel() argument
103 if (pcie->big_endian) in ls_pcie_pf_writel()
104 iowrite32be(val, pcie->pf_base + off); in ls_pcie_pf_writel()
106 iowrite32(val, pcie->pf_base + off); in ls_pcie_pf_writel()
112 struct ls_pcie *pcie = to_ls_pcie(pci); in ls_pcie_send_turnoff_msg() local
116 val = ls_pcie_pf_readl(pcie, LS_PCIE_PF_MCR); in ls_pcie_send_turnoff_msg()
118 ls_pcie_pf_writel(pcie, LS_PCIE_PF_MCR, val); in ls_pcie_send_turnoff_msg()
125 dev_err(pcie->pci->dev, "PME_Turn_off timeout\n"); in ls_pcie_send_turnoff_msg()
131 struct ls_pcie *pcie = to_ls_pcie(pci); in ls_pcie_exit_from_l2() local
139 val = ls_pcie_pf_readl(pcie, LS_PCIE_PF_MCR); in ls_pcie_exit_from_l2()
141 ls_pcie_pf_writel(pcie, LS_PCIE_PF_MCR, val); in ls_pcie_exit_from_l2()
152 dev_err(pcie->pci->dev, "L2 exit timeout\n"); in ls_pcie_exit_from_l2()
158 struct ls_pcie *pcie = to_ls_pcie(pci); in ls_pcie_host_init() local
160 ls_pcie_fix_error_response(pcie); in ls_pcie_host_init()
163 ls_pcie_clear_multifunction(pcie); in ls_pcie_host_init()
166 ls_pcie_drop_msg_tlp(pcie); in ls_pcie_host_init()
186 { .compatible = "fsl,ls1012a-pcie", .data = &layerscape_drvdata },
187 { .compatible = "fsl,ls1021a-pcie", .data = &ls1021a_drvdata },
188 { .compatible = "fsl,ls1028a-pcie", .data = &layerscape_drvdata },
189 { .compatible = "fsl,ls1043a-pcie", .data = &ls1021a_drvdata },
190 { .compatible = "fsl,ls1046a-pcie", .data = &layerscape_drvdata },
191 { .compatible = "fsl,ls2080a-pcie", .data = &layerscape_drvdata },
192 { .compatible = "fsl,ls2085a-pcie", .data = &layerscape_drvdata },
193 { .compatible = "fsl,ls2088a-pcie", .data = &layerscape_drvdata },
194 { .compatible = "fsl,ls1088a-pcie", .data = &layerscape_drvdata },
202 struct ls_pcie *pcie; in ls_pcie_probe() local
205 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); in ls_pcie_probe()
206 if (!pcie) in ls_pcie_probe()
213 pcie->drvdata = of_device_get_match_data(dev); in ls_pcie_probe()
218 pcie->pci = pci; in ls_pcie_probe()
225 pcie->big_endian = of_property_read_bool(dev->of_node, "big-endian"); in ls_pcie_probe()
227 pcie->pf_base = pci->dbi_base + pcie->drvdata->pf_off; in ls_pcie_probe()
229 if (!ls_pcie_is_bridge(pcie)) in ls_pcie_probe()
232 platform_set_drvdata(pdev, pcie); in ls_pcie_probe()
239 struct ls_pcie *pcie = dev_get_drvdata(dev); in ls_pcie_suspend_noirq() local
241 if (!pcie->drvdata->pm_support) in ls_pcie_suspend_noirq()
244 return dw_pcie_suspend_noirq(pcie->pci); in ls_pcie_suspend_noirq()
249 struct ls_pcie *pcie = dev_get_drvdata(dev); in ls_pcie_resume_noirq() local
251 if (!pcie->drvdata->pm_support) in ls_pcie_resume_noirq()
254 ls_pcie_exit_from_l2(&pcie->pci->pp); in ls_pcie_resume_noirq()
256 return dw_pcie_resume_noirq(pcie->pci); in ls_pcie_resume_noirq()
266 .name = "layerscape-pcie",