1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/pci.h>
19 #include "pcie-designware.h"
35 #define to_ls_pcie_ep(x)	dev_get_drvdata((x)->dev)
44 	struct dw_pcie			*pci;  member
54 	struct dw_pcie *pci = pcie->pci;  in ls_lut_readl()  local
56 	if (pcie->big_endian)  in ls_lut_readl()
57 		return ioread32be(pci->dbi_base + offset);  in ls_lut_readl()
59 		return ioread32(pci->dbi_base + offset);  in ls_lut_readl()
64 	struct dw_pcie *pci = pcie->pci;  in ls_lut_writel()  local
66 	if (pcie->big_endian)  in ls_lut_writel()
67 		iowrite32be(value, pci->dbi_base + offset);  in ls_lut_writel()
69 		iowrite32(value, pci->dbi_base + offset);  in ls_lut_writel()
75 	struct dw_pcie *pci = pcie->pci;  in ls_pcie_ep_event_handler()  local
87 		offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);  in ls_pcie_ep_event_handler()
95 		dw_pcie_dbi_ro_wr_en(pci);  in ls_pcie_ep_event_handler()
96 		dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, pcie->lnkcap);  in ls_pcie_ep_event_handler()
97 		dw_pcie_dbi_ro_wr_dis(pci);  in ls_pcie_ep_event_handler()
102 		dw_pcie_ep_linkup(&pci->ep);  in ls_pcie_ep_event_handler()
104 		dev_dbg(pci->dev, "Link up\n");  in ls_pcie_ep_event_handler()
106 		dev_dbg(pci->dev, "Link down\n");  in ls_pcie_ep_event_handler()
107 		pci_epc_linkdown(pci->ep.epc);  in ls_pcie_ep_event_handler()
109 		dev_dbg(pci->dev, "Hot reset\n");  in ls_pcie_ep_event_handler()
121 	pcie->irq = platform_get_irq_byname(pdev, "pme");  in ls_pcie_ep_interrupt_init()
122 	if (pcie->irq < 0)  in ls_pcie_ep_interrupt_init()
123 		return pcie->irq;  in ls_pcie_ep_interrupt_init()
125 	ret = devm_request_irq(&pdev->dev, pcie->irq, ls_pcie_ep_event_handler,  in ls_pcie_ep_interrupt_init()
126 			       IRQF_SHARED, pdev->name, pcie);  in ls_pcie_ep_interrupt_init()
128 		dev_err(&pdev->dev, "Can't register PCIe IRQ\n");  in ls_pcie_ep_interrupt_init()
144 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);  in ls_pcie_ep_get_features()  local
145 	struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);  in ls_pcie_ep_get_features()
147 	return pcie->ls_epc;  in ls_pcie_ep_get_features()
152 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);  in ls_pcie_ep_init()  local
153 	struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);  in ls_pcie_ep_init()
162 		dw_pcie_ep_reset_bar(pci, bar);  in ls_pcie_ep_init()
164 	pcie->ls_epc->msi_capable = ep_func->msi_cap ? true : false;  in ls_pcie_ep_init()
165 	pcie->ls_epc->msix_capable = ep_func->msix_cap ? true : false;  in ls_pcie_ep_init()
171 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);  in ls_pcie_ep_raise_irq()  local
182 		dev_err(pci->dev, "UNKNOWN IRQ type\n");  in ls_pcie_ep_raise_irq()
183 		return -EINVAL;  in ls_pcie_ep_raise_irq()
190 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);  in ls_pcie_ep_func_conf_select()  local
191 	struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);  in ls_pcie_ep_func_conf_select()
193 	WARN_ON(func_no && !pcie->drvdata->func_offset);  in ls_pcie_ep_func_conf_select()
194 	return pcie->drvdata->func_offset * func_no;  in ls_pcie_ep_func_conf_select()
219 	{ .compatible = "fsl,ls1028a-pcie-ep", .data = &ls1_ep_drvdata },
220 	{ .compatible = "fsl,ls1046a-pcie-ep", .data = &ls1_ep_drvdata },
221 	{ .compatible = "fsl,ls1088a-pcie-ep", .data = &ls2_ep_drvdata },
222 	{ .compatible = "fsl,ls2088a-pcie-ep", .data = &ls2_ep_drvdata },
223 	{ .compatible = "fsl,lx2160ar2-pcie-ep", .data = &lx2_ep_drvdata },
229 	struct device *dev = &pdev->dev;  in ls_pcie_ep_probe()  local
230 	struct dw_pcie *pci;  in ls_pcie_ep_probe()  local
237 	pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);  in ls_pcie_ep_probe()
239 		return -ENOMEM;  in ls_pcie_ep_probe()
241 	pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);  in ls_pcie_ep_probe()
242 	if (!pci)  in ls_pcie_ep_probe()
243 		return -ENOMEM;  in ls_pcie_ep_probe()
245 	ls_epc = devm_kzalloc(dev, sizeof(*ls_epc), GFP_KERNEL);  in ls_pcie_ep_probe()
247 		return -ENOMEM;  in ls_pcie_ep_probe()
249 	pcie->drvdata = of_device_get_match_data(dev);  in ls_pcie_ep_probe()
251 	pci->dev = dev;  in ls_pcie_ep_probe()
252 	pci->ops = pcie->drvdata->dw_pcie_ops;  in ls_pcie_ep_probe()
254 	ls_epc->bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4);  in ls_pcie_ep_probe()
255 	ls_epc->linkup_notifier = true;  in ls_pcie_ep_probe()
257 	pcie->pci = pci;  in ls_pcie_ep_probe()
258 	pcie->ls_epc = ls_epc;  in ls_pcie_ep_probe()
261 	pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);  in ls_pcie_ep_probe()
262 	if (IS_ERR(pci->dbi_base))  in ls_pcie_ep_probe()
263 		return PTR_ERR(pci->dbi_base);  in ls_pcie_ep_probe()
265 	pci->ep.ops = &ls_pcie_ep_ops;  in ls_pcie_ep_probe()
267 	pcie->big_endian = of_property_read_bool(dev->of_node, "big-endian");  in ls_pcie_ep_probe()
271 	offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);  in ls_pcie_ep_probe()
272 	pcie->lnkcap = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);  in ls_pcie_ep_probe()
274 	ret = dw_pcie_ep_init(&pci->ep);  in ls_pcie_ep_probe()
283 		.name = "layerscape-pcie-ep",