Lines Matching +full:syscon +full:- +full:pcie +full:- +full:id
1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Texas Instruments Keystone SoCs
5 * Copyright (C) 2013-2014 Texas Instruments., Ltd.
8 * Author: Murali Karicheri <m-karicheri2@ti.com>
9 * Implementation based on pci-exynos.c and pcie-designware.c
19 #include <linux/mfd/syscon.h>
31 #include "pcie-designware.h"
59 #define PCIE_LEGACY_IRQ_ENABLE_SET(n) (0x188 + (0x10 * ((n) - 1)))
60 #define PCIE_LEGACY_IRQ_ENABLE_CLR(n) (0x18c + (0x10 * ((n) - 1)))
84 #define ERR_NONFATAL BIT(2) /* Non-fatal error */
90 /* PCIE controller device IDs */
110 #define to_keystone_pcie(x) dev_get_drvdata((x)->dev)
123 /* PCI Device ID */
145 return readl(ks_pcie->va_app_base + offset); in ks_pcie_app_readl()
151 writel(val, ks_pcie->va_app_base + offset); in ks_pcie_app_writel()
158 u32 irq = data->hwirq; in ks_pcie_msi_irq_ack()
184 msi_target = ks_pcie->app.start + MSI_IRQ; in ks_pcie_compose_msi_msg()
185 msg->address_lo = lower_32_bits(msi_target); in ks_pcie_compose_msi_msg()
186 msg->address_hi = upper_32_bits(msi_target); in ks_pcie_compose_msi_msg()
187 msg->data = data->hwirq; in ks_pcie_compose_msi_msg()
189 dev_dbg(pci->dev, "msi#%d address_hi %#x address_lo %#x\n", in ks_pcie_compose_msi_msg()
190 (int)data->hwirq, msg->address_hi, msg->address_lo); in ks_pcie_compose_msi_msg()
196 return -EINVAL; in ks_pcie_msi_set_affinity()
203 u32 irq = data->hwirq; in ks_pcie_msi_mask()
209 raw_spin_lock_irqsave(&pp->lock, flags); in ks_pcie_msi_mask()
220 raw_spin_unlock_irqrestore(&pp->lock, flags); in ks_pcie_msi_mask()
227 u32 irq = data->hwirq; in ks_pcie_msi_unmask()
233 raw_spin_lock_irqsave(&pp->lock, flags); in ks_pcie_msi_unmask()
244 raw_spin_unlock_irqrestore(&pp->lock, flags); in ks_pcie_msi_unmask()
248 .name = "KEYSTONE-PCI-MSI",
257 * ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask registers
259 * PCIe host controller driver information.
278 * ks_pcie_clear_dbi_mode() - Disable DBI mode
280 * PCIe host controller driver information.
308 dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, SZ_4K - 1); in ks_pcie_msi_host_init()
316 dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, ks_pcie->app.start); in ks_pcie_msi_host_init()
318 pp->msi_irq_chip = &ks_pcie_msi_irq_chip; in ks_pcie_msi_host_init()
325 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_handle_legacy_irq()
326 struct device *dev = pci->dev; in ks_pcie_handle_legacy_irq()
333 generic_handle_domain_irq(ks_pcie->legacy_irq_domain, offset); in ks_pcie_handle_legacy_irq()
348 struct device *dev = ks_pcie->pci->dev; in ks_pcie_handle_error_irq()
366 if (!ks_pcie->is_am6 && (reg & ERR_AXI)) in ks_pcie_handle_error_irq()
369 if (reg & ERR_AER || (ks_pcie->is_am6 && (reg & AM6_ERR_AER))) in ks_pcie_handle_error_irq()
390 .name = "Keystone-PCI-Legacy-IRQ",
402 irq_set_chip_data(irq, d->host_data); in ks_pcie_init_legacy_irq_map()
415 u32 num_viewport = ks_pcie->num_viewport; in ks_pcie_setup_rc_app_regs()
416 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_setup_rc_app_regs()
417 struct dw_pcie_rp *pp = &pci->pp; in ks_pcie_setup_rc_app_regs()
423 entry = resource_list_first_type(&pp->bridge->windows, IORESOURCE_MEM); in ks_pcie_setup_rc_app_regs()
425 return -ENODEV; in ks_pcie_setup_rc_app_regs()
427 mem = entry->res; in ks_pcie_setup_rc_app_regs()
428 start = mem->start; in ks_pcie_setup_rc_app_regs()
429 end = mem->end; in ks_pcie_setup_rc_app_regs()
437 if (ks_pcie->is_am6) in ks_pcie_setup_rc_app_regs()
443 /* Using Direct 1:1 mapping of RC <-> PCI memory space */ in ks_pcie_setup_rc_app_regs()
462 struct dw_pcie_rp *pp = bus->sysdata; in ks_pcie_other_map_bus()
478 reg = CFG_BUS(bus->number) | CFG_DEVICE(PCI_SLOT(devfn)) | in ks_pcie_other_map_bus()
480 if (!pci_is_root_bus(bus->parent)) in ks_pcie_other_map_bus()
484 return pp->va_cfg0_base + where; in ks_pcie_other_map_bus()
500 * ks_pcie_link_up() - Check if link up
501 * @pci: A pointer to the dw_pcie structure which holds the DesignWare PCIe host
538 struct pci_bus *bus = dev->bus; in ks_pcie_quirk()
566 bridge = bus->self; in ks_pcie_quirk()
567 bus = bus->parent; in ks_pcie_quirk()
581 dev_info(&dev->dev, "limiting MRRS to 256 bytes\n"); in ks_pcie_quirk()
593 if (!bridge_dev || !bridge_dev->parent) in ks_pcie_quirk()
596 ks_pcie = dev_get_drvdata(bridge_dev->parent); in ks_pcie_quirk()
607 dev_info(&dev->dev, "limiting MRRS to 128 bytes\n"); in ks_pcie_quirk()
616 unsigned int irq = desc->irq_data.hwirq; in ks_pcie_msi_irq_handler()
618 u32 offset = irq - ks_pcie->msi_host_irq; in ks_pcie_msi_irq_handler()
619 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_msi_irq_handler()
620 struct dw_pcie_rp *pp = &pci->pp; in ks_pcie_msi_irq_handler()
621 struct device *dev = pci->dev; in ks_pcie_msi_irq_handler()
636 * MSI0 status bit 0-3 shows vectors 0, 8, 16, 24, MSI1 status bit in ks_pcie_msi_irq_handler()
645 generic_handle_domain_irq(pp->irq_domain, vector); in ks_pcie_msi_irq_handler()
652 * ks_pcie_legacy_irq_handler() - Handle legacy interrupt
662 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_legacy_irq_handler()
663 struct device *dev = pci->dev; in ks_pcie_legacy_irq_handler()
664 u32 irq_offset = irq - ks_pcie->legacy_host_irqs[0]; in ks_pcie_legacy_irq_handler()
681 struct device *dev = ks_pcie->pci->dev; in ks_pcie_config_msi_irq()
682 struct device_node *np = ks_pcie->np; in ks_pcie_config_msi_irq()
690 intc_np = of_get_child_by_name(np, "msi-interrupt-controller"); in ks_pcie_config_msi_irq()
692 if (ks_pcie->is_am6) in ks_pcie_config_msi_irq()
694 dev_warn(dev, "msi-interrupt-controller node is absent\n"); in ks_pcie_config_msi_irq()
695 return -EINVAL; in ks_pcie_config_msi_irq()
700 dev_err(dev, "No IRQ entries in msi-interrupt-controller\n"); in ks_pcie_config_msi_irq()
701 ret = -EINVAL; in ks_pcie_config_msi_irq()
708 ret = -EINVAL; in ks_pcie_config_msi_irq()
712 if (!ks_pcie->msi_host_irq) { in ks_pcie_config_msi_irq()
715 ret = -EINVAL; in ks_pcie_config_msi_irq()
718 ks_pcie->msi_host_irq = irq_data->hwirq; in ks_pcie_config_msi_irq()
735 struct device *dev = ks_pcie->pci->dev; in ks_pcie_config_legacy_irq()
737 struct device_node *np = ks_pcie->np; in ks_pcie_config_legacy_irq()
741 intc_np = of_get_child_by_name(np, "legacy-interrupt-controller"); in ks_pcie_config_legacy_irq()
744 * Since legacy interrupts are modeled as edge-interrupts in in ks_pcie_config_legacy_irq()
747 if (ks_pcie->is_am6) in ks_pcie_config_legacy_irq()
749 dev_warn(dev, "legacy-interrupt-controller node is absent\n"); in ks_pcie_config_legacy_irq()
750 return -EINVAL; in ks_pcie_config_legacy_irq()
755 dev_err(dev, "No IRQ entries in legacy-interrupt-controller\n"); in ks_pcie_config_legacy_irq()
756 ret = -EINVAL; in ks_pcie_config_legacy_irq()
763 ret = -EINVAL; in ks_pcie_config_legacy_irq()
766 ks_pcie->legacy_host_irqs[i] = irq; in ks_pcie_config_legacy_irq()
778 ret = -EINVAL; in ks_pcie_config_legacy_irq()
781 ks_pcie->legacy_irq_domain = legacy_irq_domain; in ks_pcie_config_legacy_irq()
805 regs->uregs[reg] = -1; in ks_pcie_fault()
806 regs->ARM_pc += 4; in ks_pcie_fault()
816 unsigned int id; in ks_pcie_init_id() local
818 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_init_id()
819 struct device *dev = pci->dev; in ks_pcie_init_id()
820 struct device_node *np = dev->of_node; in ks_pcie_init_id()
824 devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-id"); in ks_pcie_init_id()
829 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-id", 1, 0, &args); in ks_pcie_init_id()
833 ret = regmap_read(devctrl_regs, offset, &id); in ks_pcie_init_id()
838 dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, id & PCIE_VENDORID_MASK); in ks_pcie_init_id()
839 dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, id >> PCIE_DEVICEID_SHIFT); in ks_pcie_init_id()
851 pp->bridge->ops = &ks_pcie_ops; in ks_pcie_host_init()
852 if (!ks_pcie->is_am6) in ks_pcie_host_init()
853 pp->bridge->child_ops = &ks_child_pcie_ops; in ks_pcie_host_init()
869 pci->dbi_base + PCI_IO_BASE); in ks_pcie_host_init()
877 * PCIe access errors that result into OCP errors are caught by ARM as in ks_pcie_host_init()
925 ep->page_size = AM654_WIN_SIZE; in ks_pcie_am654_ep_init()
927 dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_0, APP_ADDR_SPACE_0 - 1); in ks_pcie_am654_ep_init()
933 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_am654_raise_legacy_irq()
967 dev_err(pci->dev, "UNKNOWN IRQ type\n"); in ks_pcie_am654_raise_irq()
968 return -EINVAL; in ks_pcie_am654_raise_irq()
1001 int num_lanes = ks_pcie->num_lanes; in ks_pcie_disable_phy()
1003 while (num_lanes--) { in ks_pcie_disable_phy()
1004 phy_power_off(ks_pcie->phy[num_lanes]); in ks_pcie_disable_phy()
1005 phy_exit(ks_pcie->phy[num_lanes]); in ks_pcie_disable_phy()
1013 int num_lanes = ks_pcie->num_lanes; in ks_pcie_enable_phy()
1016 ret = phy_reset(ks_pcie->phy[i]); in ks_pcie_enable_phy()
1020 ret = phy_init(ks_pcie->phy[i]); in ks_pcie_enable_phy()
1024 ret = phy_power_on(ks_pcie->phy[i]); in ks_pcie_enable_phy()
1026 phy_exit(ks_pcie->phy[i]); in ks_pcie_enable_phy()
1034 while (--i >= 0) { in ks_pcie_enable_phy()
1035 phy_power_off(ks_pcie->phy[i]); in ks_pcie_enable_phy()
1036 phy_exit(ks_pcie->phy[i]); in ks_pcie_enable_phy()
1044 struct device_node *np = dev->of_node; in ks_pcie_set_mode()
1047 struct regmap *syscon; in ks_pcie_set_mode() local
1052 syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-mode"); in ks_pcie_set_mode()
1053 if (IS_ERR(syscon)) in ks_pcie_set_mode()
1057 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-mode", 1, 0, &args); in ks_pcie_set_mode()
1064 ret = regmap_update_bits(syscon, offset, mask, val); in ks_pcie_set_mode()
1066 dev_err(dev, "failed to set pcie mode\n"); in ks_pcie_set_mode()
1076 struct device_node *np = dev->of_node; in ks_pcie_am654_set_mode()
1079 struct regmap *syscon; in ks_pcie_am654_set_mode() local
1084 syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-mode"); in ks_pcie_am654_set_mode()
1085 if (IS_ERR(syscon)) in ks_pcie_am654_set_mode()
1089 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-mode", 1, 0, &args); in ks_pcie_am654_set_mode()
1104 return -EINVAL; in ks_pcie_am654_set_mode()
1107 ret = regmap_update_bits(syscon, offset, mask, val); in ks_pcie_am654_set_mode()
1109 dev_err(dev, "failed to set pcie mode\n"); in ks_pcie_am654_set_mode()
1138 .compatible = "ti,keystone-pcie",
1142 .compatible = "ti,am654-pcie-rc",
1146 .compatible = "ti,am654-pcie-ep",
1155 struct device *dev = &pdev->dev; in ks_pcie_probe()
1156 struct device_node *np = dev->of_node; in ks_pcie_probe()
1176 return -EINVAL; in ks_pcie_probe()
1178 version = data->version; in ks_pcie_probe()
1179 host_ops = data->host_ops; in ks_pcie_probe()
1180 ep_ops = data->ep_ops; in ks_pcie_probe()
1181 mode = data->mode; in ks_pcie_probe()
1185 return -ENOMEM; in ks_pcie_probe()
1189 return -ENOMEM; in ks_pcie_probe()
1192 ks_pcie->va_app_base = devm_ioremap_resource(dev, res); in ks_pcie_probe()
1193 if (IS_ERR(ks_pcie->va_app_base)) in ks_pcie_probe()
1194 return PTR_ERR(ks_pcie->va_app_base); in ks_pcie_probe()
1196 ks_pcie->app = *res; in ks_pcie_probe()
1203 if (of_device_is_compatible(np, "ti,am654-pcie-rc")) in ks_pcie_probe()
1204 ks_pcie->is_am6 = true; in ks_pcie_probe()
1206 pci->dbi_base = base; in ks_pcie_probe()
1207 pci->dbi_base2 = base; in ks_pcie_probe()
1208 pci->dev = dev; in ks_pcie_probe()
1209 pci->ops = &ks_pcie_dw_pcie_ops; in ks_pcie_probe()
1210 pci->version = version; in ks_pcie_probe()
1217 "ks-pcie-error-irq", ks_pcie); in ks_pcie_probe()
1224 ret = of_property_read_u32(np, "num-lanes", &num_lanes); in ks_pcie_probe()
1230 return -ENOMEM; in ks_pcie_probe()
1234 return -ENOMEM; in ks_pcie_probe()
1237 snprintf(name, sizeof(name), "pcie-phy%d", i); in ks_pcie_probe()
1247 link[i] = device_link_add(dev, &phy[i]->dev, DL_FLAG_STATELESS); in ks_pcie_probe()
1249 ret = -EINVAL; in ks_pcie_probe()
1254 ks_pcie->np = np; in ks_pcie_probe()
1255 ks_pcie->pci = pci; in ks_pcie_probe()
1256 ks_pcie->link = link; in ks_pcie_probe()
1257 ks_pcie->num_lanes = num_lanes; in ks_pcie_probe()
1258 ks_pcie->phy = phy; in ks_pcie_probe()
1264 if (ret != -EPROBE_DEFER) in ks_pcie_probe()
1271 phy_pm_runtime_get_sync(ks_pcie->phy[i]); in ks_pcie_probe()
1277 phy_pm_runtime_put_sync(ks_pcie->phy[i]); in ks_pcie_probe()
1302 ret = -ENODEV; in ks_pcie_probe()
1306 ret = of_property_read_u32(np, "num-viewport", &num_viewport); in ks_pcie_probe()
1308 dev_err(dev, "unable to read *num-viewport* property\n"); in ks_pcie_probe()
1325 ks_pcie->num_viewport = num_viewport; in ks_pcie_probe()
1326 pci->pp.ops = host_ops; in ks_pcie_probe()
1327 ret = dw_pcie_host_init(&pci->pp); in ks_pcie_probe()
1333 ret = -ENODEV; in ks_pcie_probe()
1337 pci->ep.ops = ep_ops; in ks_pcie_probe()
1338 ret = dw_pcie_ep_init(&pci->ep); in ks_pcie_probe()
1356 while (--i >= 0 && link[i]) in ks_pcie_probe()
1365 struct device_link **link = ks_pcie->link; in ks_pcie_remove()
1366 int num_lanes = ks_pcie->num_lanes; in ks_pcie_remove()
1367 struct device *dev = &pdev->dev; in ks_pcie_remove()
1372 while (num_lanes--) in ks_pcie_remove()
1382 .name = "keystone-pcie",