82 	struct regmap		*iomuxc_gpr;  member
195 	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);  in imx6_pcie_configure_type()
341 		regmap_update_bits(imx6_pcie->iomuxc_gpr,  in imx6_pcie_init_phy()
352 			regmap_update_bits(imx6_pcie->iomuxc_gpr,  in imx6_pcie_init_phy()
358 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
362 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
367 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
371 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
374 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
377 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
380 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
383 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
386 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
400 	if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr,  in imx7d_pcie_wait_for_phy_pll_lock()
563 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_enable_ref_clk()
569 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_enable_ref_clk()
578 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_enable_ref_clk()
594 		regmap_update_bits(imx6_pcie->iomuxc_gpr, offset,  in imx6_pcie_enable_ref_clk()
597 		regmap_update_bits(imx6_pcie->iomuxc_gpr, offset,  in imx6_pcie_enable_ref_clk()
611 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_disable_ref_clk()
613 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_disable_ref_clk()
618 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_disable_ref_clk()
674 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_assert_core_reset()
678 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,  in imx6_pcie_assert_core_reset()
683 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
688 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
690 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
736 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,  in imx6_pcie_deassert_core_reset()
740 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_deassert_core_reset()
792 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_ltssm_enable()
816 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_ltssm_disable()
1122 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_pm_turnoff()
1125 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_pm_turnoff()
1329 	imx6_pcie->iomuxc_gpr =  in imx6_pcie_probe()
1331 	if (IS_ERR(imx6_pcie->iomuxc_gpr)) {  in imx6_pcie_probe()
1333 		return PTR_ERR(imx6_pcie->iomuxc_gpr);  in imx6_pcie_probe()