298 	struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);  in dino_mask_irq()  local
299 	int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);  in dino_mask_irq()
301 	DBG(KERN_WARNING "%s(0x%px, %d)\n", __func__, dino_dev, d->irq);  in dino_mask_irq()
304 	dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));  in dino_mask_irq()
305 	__raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);  in dino_mask_irq()
310 	struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);  in dino_unmask_irq()  local
311 	int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);  in dino_unmask_irq()
314 	DBG(KERN_WARNING "%s(0x%px, %d)\n", __func__, dino_dev, d->irq);  in dino_unmask_irq()
322 	__raw_readl(dino_dev->hba.base_addr+DINO_IPR);  in dino_unmask_irq()
325 	dino_dev->imr |= DINO_MASK_IRQ(local_irq);	/* used in dino_isr() */  in dino_unmask_irq()
326 	__raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);  in dino_unmask_irq()
337 	tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR);  in dino_unmask_irq()
341 		gsc_writel(dino_dev->gsc_irq.txn_data, dino_dev->gsc_irq.txn_addr);  in dino_unmask_irq()
349 	struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);  in dino_set_affinity_irq()  local
361 	dino_dev->gsc_irq.txn_addr = txn_affinity_addr(d->irq, cpu_irq);  in dino_set_affinity_irq()
362 	eim = ((u32) dino_dev->gsc_irq.txn_addr) | dino_dev->gsc_irq.txn_data;  in dino_set_affinity_irq()
363 	__raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0);  in dino_set_affinity_irq()
389 	struct dino_device *dino_dev = intr_dev;  in dino_isr()  local
395 	dino_dev->dino_irr0 =  in dino_isr()
397 	mask = __raw_readl(dino_dev->hba.base_addr+DINO_IRR0) & DINO_IRR_MASK;  in dino_isr()
405 		int irq = dino_dev->global_irq[local_irq];  in dino_isr()
419 	mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr;  in dino_isr()
424 		       dino_dev->hba.base_addr, mask);  in dino_isr()
472 	struct dino_device *dino_dev;  in pci_dev_is_behind_card_dino()  local
474 	dino_dev = DINO_DEV(parisc_walk_tree(dev->bus->bridge));  in pci_dev_is_behind_card_dino()
475 	return is_card_dino(&dino_dev->hba.dev->id);  in pci_dev_is_behind_card_dino()
511 	struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));  in dino_card_setup()  local
516 	res = &dino_dev->hba.lmmio_space;  in dino_card_setup()
524 		res->name = dino_dev->hba.lmmio_space.name;  in dino_card_setup()
527 	if (ccio_allocate_resource(dino_dev->hba.dev, res, _8MB,  in dino_card_setup()
542 	bus->resource[0] = &(dino_dev->hba.io_space);  in dino_card_setup()
601         struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));  in dino_fixup_bus()  local
608 	if (is_card_dino(&dino_dev->hba.dev->id)) {  in dino_fixup_bus()
609 		dino_card_setup(bus, dino_dev->hba.base_addr);  in dino_fixup_bus()
645 		if (is_card_dino(&dino_dev->hba.dev->id))  in dino_fixup_bus()
682 			dino_assign_irq(dino_dev, irq_pin, &dev->irq);  in dino_fixup_bus()
689 			dino_assign_irq(dino_dev, dev->irq, &dev->irq);  in dino_fixup_bus()
705 dino_card_init(struct dino_device *dino_dev)  in dino_card_init()  argument
710 	status = __raw_readl(dino_dev->hba.base_addr+DINO_IO_STATUS);  in dino_card_init()
713 				dino_dev->hba.base_addr+DINO_IO_COMMAND);  in dino_card_init()
717 	__raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_GMASK);  in dino_card_init()
718 	__raw_writel(0x00000001, dino_dev->hba.base_addr+DINO_IO_FBB_EN);  in dino_card_init()
719 	__raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_ICR);  in dino_card_init()
729 	__raw_writel( brdg_feat, dino_dev->hba.base_addr+DINO_BRDG_FEAT);  in dino_card_init()
736 	__raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_IO_ADDR_EN);  in dino_card_init()
738 	__raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_DAMODE);  in dino_card_init()
739 	__raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIROR);  in dino_card_init()
740 	__raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIWOR);  in dino_card_init()
742 	__raw_writel(0x00000040, dino_dev->hba.base_addr+DINO_MLTIM);  in dino_card_init()
743 	__raw_writel(0x00000080, dino_dev->hba.base_addr+DINO_IO_CONTROL);  in dino_card_init()
744 	__raw_writel(0x0000008c, dino_dev->hba.base_addr+DINO_TLTIM);  in dino_card_init()
747 	__raw_writel(0x0000007e, dino_dev->hba.base_addr+DINO_PAMR);  in dino_card_init()
748 	__raw_writel(0x0000007f, dino_dev->hba.base_addr+DINO_PAPR);  in dino_card_init()
749 	__raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_PAMR);  in dino_card_init()
756 	__raw_writel(0x0000004f, dino_dev->hba.base_addr+DINO_PCICMD);  in dino_card_init()
767 dino_bridge_init(struct dino_device *dino_dev, const char *name)  in dino_bridge_init()  argument
777 	io_addr = __raw_readl(dino_dev->hba.base_addr + DINO_IO_ADDR_EN);  in dino_bridge_init()
783 	res = &dino_dev->hba.lmmio_space;  in dino_bridge_init()
816 	res = &dino_dev->hba.lmmio_space;  in dino_bridge_init()
822 		result = ccio_request_resource(dino_dev->hba.dev, &res[i]);  in dino_bridge_init()
833 		struct dino_device *dino_dev, const char *name)  in dino_common_init()  argument
839 	pcibios_register_hba(&dino_dev->hba);  in dino_common_init()
851 	dev->irq = gsc_alloc_irq(&dino_dev->gsc_irq);  in dino_common_init()
852 	eim = ((u32) dino_dev->gsc_irq.txn_addr) | dino_dev->gsc_irq.txn_data;  in dino_common_init()
863 	status = request_irq(dev->irq, dino_isr, 0, name, dino_dev);  in dino_common_init()
874 	gsc_fixup_irqs(dev, dino_dev, dino_choose_irq);  in dino_common_init()
881 	__raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0);  in dino_common_init()
887 	__raw_readl(dino_dev->hba.base_addr+DINO_IRR0);  in dino_common_init()
890 	res = &dino_dev->hba.io_space;  in dino_common_init()
896 	res->start = HBA_PORT_BASE(dino_dev->hba.hba_num);  in dino_common_init()
903 		       dino_dev->hba.base_addr);  in dino_common_init()
934 	struct dino_device *dino_dev;	// Dino specific control struct  in dino_probe()  local
993 	dino_dev = kzalloc(sizeof(struct dino_device), GFP_KERNEL);  in dino_probe()
994 	if (!dino_dev) {  in dino_probe()
999 	dino_dev->hba.dev = dev;  in dino_probe()
1000 	dino_dev->hba.base_addr = ioremap(hpa, 4096);  in dino_probe()
1001 	dino_dev->hba.lmmio_space_offset = PCI_F_EXTEND;  in dino_probe()
1002 	spin_lock_init(&dino_dev->dinosaur_pen);  in dino_probe()
1003 	dino_dev->hba.iommu = ccio_get_iommu(dev);  in dino_probe()
1006 		dino_card_init(dino_dev);  in dino_probe()
1008 		dino_bridge_init(dino_dev, name);  in dino_probe()
1011 	if (dino_common_init(dev, dino_dev, name))  in dino_probe()
1014 	dev->dev.platform_data = dino_dev;  in dino_probe()
1016 	pci_add_resource_offset(&resources, &dino_dev->hba.io_space,  in dino_probe()
1017 				HBA_PORT_BASE(dino_dev->hba.hba_num));  in dino_probe()
1018 	if (dino_dev->hba.lmmio_space.flags)  in dino_probe()
1019 		pci_add_resource_offset(&resources, &dino_dev->hba.lmmio_space,  in dino_probe()
1020 					dino_dev->hba.lmmio_space_offset);  in dino_probe()
1021 	if (dino_dev->hba.elmmio_space.flags)  in dino_probe()
1022 		pci_add_resource_offset(&resources, &dino_dev->hba.elmmio_space,  in dino_probe()
1023 					dino_dev->hba.lmmio_space_offset);  in dino_probe()
1024 	if (dino_dev->hba.gmmio_space.flags)  in dino_probe()
1025 		pci_add_resource(&resources, &dino_dev->hba.gmmio_space);  in dino_probe()
1027 	dino_dev->hba.bus_num.start = dino_current_bus;  in dino_probe()
1028 	dino_dev->hba.bus_num.end = 255;  in dino_probe()
1029 	dino_dev->hba.bus_num.flags = IORESOURCE_BUS;  in dino_probe()
1030 	pci_add_resource(&resources, &dino_dev->hba.bus_num);  in dino_probe()
1035 	dino_dev->hba.hba_bus = bus = pci_create_root_bus(&dev->dev,  in dino_probe()