24  * the peer memory windows.
89  * inbound memory windows for each peer (where N is the number of peers).
99 	int peer, peer_widx;  in ntb_msi_setup_mws()  local
114 	for (peer = 0; peer < ntb_peer_port_count(ntb); peer++) {  in ntb_msi_setup_mws()
115 		peer_widx = ntb_peer_highest_mw_idx(ntb, peer);  in ntb_msi_setup_mws()
119 		ret = ntb_mw_get_align(ntb, peer, peer_widx, &addr_align,  in ntb_msi_setup_mws()
127 	for (peer = 0; peer < ntb_peer_port_count(ntb); peer++) {  in ntb_msi_setup_mws()
128 		peer_widx = ntb_peer_highest_mw_idx(ntb, peer);  in ntb_msi_setup_mws()
134 		ret = ntb_mw_get_align(ntb, peer, peer_widx, NULL,  in ntb_msi_setup_mws()
144 		ret = ntb_mw_set_trans(ntb, peer, peer_widx,  in ntb_msi_setup_mws()
156 	for (i = 0; i < peer; i++) {  in ntb_msi_setup_mws()
157 		peer_widx = ntb_peer_highest_mw_idx(ntb, peer);  in ntb_msi_setup_mws()
176 	int peer;  in ntb_msi_clear_mws()  local
179 	for (peer = 0; peer < ntb_peer_port_count(ntb); peer++) {  in ntb_msi_clear_mws()
180 		peer_widx = ntb_peer_highest_mw_idx(ntb, peer);  in ntb_msi_clear_mws()
184 		ntb_mw_clear_trans(ntb, peer, peer_widx);  in ntb_msi_clear_mws()
269  * it. The descriptor can then be sent to a peer to trigger
356  * ntb_msi_peer_trigger() - Trigger an interrupt handler on a peer
358  * @peer:	Peer index
361  * This function triggers an interrupt on a peer. It requires
362  * the descriptor structure to have been passed from that peer
367 int ntb_msi_peer_trigger(struct ntb_dev *ntb, int peer,  in ntb_msi_peer_trigger()  argument
375 	idx = desc->addr_offset / sizeof(*ntb->msi->peer_mws[peer]);  in ntb_msi_peer_trigger()
377 	iowrite32(desc->data, &ntb->msi->peer_mws[peer][idx]);  in ntb_msi_peer_trigger()
384  * ntb_msi_peer_addr() - Get the DMA address to trigger a peer's MSI interrupt
386  * @peer:	Peer index
397 int ntb_msi_peer_addr(struct ntb_dev *ntb, int peer,  in ntb_msi_peer_addr()  argument
401 	int peer_widx = ntb_peer_mw_count(ntb) - 1 - peer;  in ntb_msi_peer_addr()