Lines Matching +full:sar +full:- +full:threshold
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
12 #include "sar.h"
19 u32 bit_rate = report->bit_rate; in get_max_amsdu_len()
26 if (report->might_fallback_legacy) in get_max_amsdu_len()
41 return rtwdev->chip->max_amsdu_limit; in get_max_amsdu_len()
57 ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss; in get_mcs_ra_mask()
60 ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss; in get_mcs_ra_mask()
72 struct ieee80211_sta_he_cap cap = sta->deflink.he_cap; in get_he_ra_mask()
75 switch (sta->deflink.bandwidth) { in get_he_ra_mask()
140 struct cfg80211_bitrate_mask *mask = &rtwsta->mask; in rtw89_phy_ra_mask_cfg()
144 if (!rtwsta->use_cfg_mask) in rtw89_phy_ra_mask_cfg()
145 return -1; in rtw89_phy_ra_mask_cfg()
147 switch (chan->band_type) { in rtw89_phy_ra_mask_cfg()
150 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy, in rtw89_phy_ra_mask_cfg()
155 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, in rtw89_phy_ra_mask_cfg()
160 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy, in rtw89_phy_ra_mask_cfg()
164 rtw89_warn(rtwdev, "unhandled band type %d\n", chan->band_type); in rtw89_phy_ra_mask_cfg()
165 return -1; in rtw89_phy_ra_mask_cfg()
168 if (sta->deflink.he_cap.has_he) { in rtw89_phy_ra_mask_cfg()
169 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0], in rtw89_phy_ra_mask_cfg()
171 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1], in rtw89_phy_ra_mask_cfg()
173 } else if (sta->deflink.vht_cap.vht_supported) { in rtw89_phy_ra_mask_cfg()
174 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], in rtw89_phy_ra_mask_cfg()
176 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], in rtw89_phy_ra_mask_cfg()
178 } else if (sta->deflink.ht_cap.ht_supported) { in rtw89_phy_ra_mask_cfg()
179 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], in rtw89_phy_ra_mask_cfg()
181 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], in rtw89_phy_ra_mask_cfg()
203 struct cfg80211_bitrate_mask *mask = &rtwsta->mask; in rtw89_phy_ra_gi_ltf()
204 u8 band = chan->band_type; in rtw89_phy_ra_gi_ltf()
206 u8 he_gi = mask->control[nl_band].he_gi; in rtw89_phy_ra_gi_ltf()
207 u8 he_ltf = mask->control[nl_band].he_ltf; in rtw89_phy_ra_gi_ltf()
209 if (!rtwsta->use_cfg_mask) in rtw89_phy_ra_gi_ltf()
235 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_ra_sta_update()
236 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_phy_ra_sta_update()
237 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; in rtw89_phy_ra_sta_update()
238 struct rtw89_ra_info *ra = &rtwsta->ra; in rtw89_phy_ra_sta_update()
240 rtwvif->sub_entity_idx); in rtw89_phy_ra_sta_update()
241 struct ieee80211_vif *vif = rtwvif_to_vif(rtwsta->rtwvif); in rtw89_phy_ra_sta_update()
243 u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi); in rtw89_phy_ra_sta_update()
258 if (sta->deflink.he_cap.has_he) { in rtw89_phy_ra_sta_update()
263 if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[2] & in rtw89_phy_ra_sta_update()
266 if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[1] & in rtw89_phy_ra_sta_update()
270 } else if (sta->deflink.vht_cap.vht_supported) { in rtw89_phy_ra_sta_update()
271 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); in rtw89_phy_ra_sta_update()
278 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) in rtw89_phy_ra_sta_update()
280 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) in rtw89_phy_ra_sta_update()
282 } else if (sta->deflink.ht_cap.ht_supported) { in rtw89_phy_ra_sta_update()
285 ra_mask |= ((u64)sta->deflink.ht_cap.mcs.rx_mask[3] << 48) | in rtw89_phy_ra_sta_update()
286 ((u64)sta->deflink.ht_cap.mcs.rx_mask[2] << 36) | in rtw89_phy_ra_sta_update()
287 ((u64)sta->deflink.ht_cap.mcs.rx_mask[1] << 24) | in rtw89_phy_ra_sta_update()
288 ((u64)sta->deflink.ht_cap.mcs.rx_mask[0] << 12); in rtw89_phy_ra_sta_update()
290 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) in rtw89_phy_ra_sta_update()
292 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) in rtw89_phy_ra_sta_update()
296 switch (chan->band_type) { in rtw89_phy_ra_sta_update()
298 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ]; in rtw89_phy_ra_sta_update()
299 if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] & 0xf) in rtw89_phy_ra_sta_update()
301 if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] & 0xff0) in rtw89_phy_ra_sta_update()
305 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4; in rtw89_phy_ra_sta_update()
309 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_6GHZ] << 4; in rtw89_phy_ra_sta_update()
321 for (i = 0; i < rtwdev->hal.tx_nss; i++) in rtw89_phy_ra_sta_update()
338 switch (sta->deflink.bandwidth) { in rtw89_phy_ra_sta_update()
341 sgi = sta->deflink.vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
342 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160); in rtw89_phy_ra_sta_update()
346 sgi = sta->deflink.vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
347 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); in rtw89_phy_ra_sta_update()
351 sgi = sta->deflink.ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
352 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40); in rtw89_phy_ra_sta_update()
356 sgi = sta->deflink.ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
357 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20); in rtw89_phy_ra_sta_update()
361 if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[3] & in rtw89_phy_ra_sta_update()
363 ra->dcm_cap = 1; in rtw89_phy_ra_sta_update()
365 if (rate_pattern->enable && !vif->p2p) { in rtw89_phy_ra_sta_update()
367 ra_mask &= rate_pattern->ra_mask; in rtw89_phy_ra_sta_update()
368 mode = rate_pattern->ra_mode; in rtw89_phy_ra_sta_update()
371 ra->bw_cap = bw_mode; in rtw89_phy_ra_sta_update()
372 ra->er_cap = rtwsta->er_cap; in rtw89_phy_ra_sta_update()
373 ra->mode_ctrl = mode; in rtw89_phy_ra_sta_update()
374 ra->macid = rtwsta->mac_id; in rtw89_phy_ra_sta_update()
375 ra->stbc_cap = stbc_en; in rtw89_phy_ra_sta_update()
376 ra->ldpc_cap = ldpc_en; in rtw89_phy_ra_sta_update()
377 ra->ss_num = min(sta->deflink.rx_nss, rtwdev->hal.tx_nss) - 1; in rtw89_phy_ra_sta_update()
378 ra->en_sgi = sgi; in rtw89_phy_ra_sta_update()
379 ra->ra_mask = ra_mask; in rtw89_phy_ra_sta_update()
380 ra->fix_giltf_en = fix_giltf_en; in rtw89_phy_ra_sta_update()
381 ra->fix_giltf = fix_giltf; in rtw89_phy_ra_sta_update()
386 ra->fixed_csi_rate_en = false; in rtw89_phy_ra_sta_update()
387 ra->ra_csi_rate_en = true; in rtw89_phy_ra_sta_update()
388 ra->cr_tbl_sel = false; in rtw89_phy_ra_sta_update()
389 ra->band_num = rtwvif->phy_idx; in rtw89_phy_ra_sta_update()
390 ra->csi_bw = bw_mode; in rtw89_phy_ra_sta_update()
391 ra->csi_gi_ltf = RTW89_GILTF_LGI_4XHE32; in rtw89_phy_ra_sta_update()
392 ra->csi_mcs_ss_idx = 5; in rtw89_phy_ra_sta_update()
393 ra->csi_mode = csi_mode; in rtw89_phy_ra_sta_update()
399 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_ra_updata_sta()
400 struct rtw89_ra_info *ra = &rtwsta->ra; in rtw89_phy_ra_updata_sta()
405 ra->upd_mask = 1; in rtw89_phy_ra_updata_sta()
407 ra->upd_bw_nss_mask = 1; in rtw89_phy_ra_updata_sta()
411 ra->macid, in rtw89_phy_ra_updata_sta()
412 ra->bw_cap, in rtw89_phy_ra_updata_sta()
413 ra->ss_num, in rtw89_phy_ra_updata_sta()
414 ra->en_sgi, in rtw89_phy_ra_updata_sta()
415 ra->giltf); in rtw89_phy_ra_updata_sta()
436 if (next->enable) in __check_rate_pattern()
440 next->rate = rate_base + c; in __check_rate_pattern()
441 next->ra_mode = ra_mode; in __check_rate_pattern()
442 next->ra_mask = ra_mask; in __check_rate_pattern()
443 next->enable = true; in __check_rate_pattern()
459 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; in rtw89_phy_rate_pattern_vif()
462 rtwvif->sub_entity_idx); in rtw89_phy_rate_pattern_vif()
481 u8 band = chan->band_type; in rtw89_phy_rate_pattern_vif()
483 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen; in rtw89_phy_rate_pattern_vif()
484 u8 tx_nss = rtwdev->hal.tx_nss; in rtw89_phy_rate_pattern_vif()
490 mask->control[nl_band].he_mcs[i], in rtw89_phy_rate_pattern_vif()
497 mask->control[nl_band].vht_mcs[i], in rtw89_phy_rate_pattern_vif()
504 mask->control[nl_band].ht_mcs[i], in rtw89_phy_rate_pattern_vif()
512 sband = rtwdev->hw->wiphy->bands[nl_band]; in rtw89_phy_rate_pattern_vif()
517 mask->control[nl_band].legacy, in rtw89_phy_rate_pattern_vif()
518 BIT(sband->n_bitrates) - 1, false)) in rtw89_phy_rate_pattern_vif()
523 mask->control[nl_band].legacy, in rtw89_phy_rate_pattern_vif()
524 BIT(sband->n_bitrates) - 1, false)) in rtw89_phy_rate_pattern_vif()
531 rtwvif->rate_pattern = next_pattern; in rtw89_phy_rate_pattern_vif()
540 rtwvif->rate_pattern.enable = false; in rtw89_phy_rate_pattern_vif()
553 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_ra_update()
560 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_ra_assoc()
561 struct rtw89_ra_info *ra = &rtwsta->ra; in rtw89_phy_ra_assoc()
562 u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi) >> RSSI_FACTOR; in rtw89_phy_ra_assoc()
568 ra->init_rate_lv = 1; in rtw89_phy_ra_assoc()
570 ra->init_rate_lv = 2; in rtw89_phy_ra_assoc()
572 ra->init_rate_lv = 3; in rtw89_phy_ra_assoc()
574 ra->init_rate_lv = 0; in rtw89_phy_ra_assoc()
575 ra->upd_all = 1; in rtw89_phy_ra_assoc()
578 ra->macid, in rtw89_phy_ra_assoc()
579 ra->mode_ctrl, in rtw89_phy_ra_assoc()
580 ra->bw_cap, in rtw89_phy_ra_assoc()
581 ra->ss_num, in rtw89_phy_ra_assoc()
582 ra->init_rate_lv); in rtw89_phy_ra_assoc()
585 ra->dcm_cap, in rtw89_phy_ra_assoc()
586 ra->er_cap, in rtw89_phy_ra_assoc()
587 ra->ldpc_cap, in rtw89_phy_ra_assoc()
588 ra->stbc_cap, in rtw89_phy_ra_assoc()
589 ra->en_sgi, in rtw89_phy_ra_assoc()
590 ra->giltf); in rtw89_phy_ra_assoc()
599 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsc()
600 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsc()
601 u8 central_ch = chan->channel; in rtw89_phy_get_txsc()
615 txsc_idx = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
617 txsc_idx = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
624 tmp = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
626 tmp = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
648 txsc_idx = (10 - (pri_ch - central_ch)) >> 1; in rtw89_phy_get_txsc()
650 txsc_idx = ((central_ch - pri_ch) >> 1) + 5; in rtw89_phy_get_txsc()
674 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_read_rf()
675 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_read_rf()
678 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf()
731 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v1()
746 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_write_rf()
747 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_write_rf()
750 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf()
810 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v1()
824 return rtwdev->chip->ops->write_rf == rtw89_phy_write_rf_v1; in rtw89_chip_rf_v1()
830 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_bb_reset()
832 chip->ops->bb_reset(rtwdev, phy_idx); in rtw89_phy_bb_reset()
840 if (reg->addr == 0xfe) in rtw89_phy_config_bb_reg()
842 else if (reg->addr == 0xfd) in rtw89_phy_config_bb_reg()
844 else if (reg->addr == 0xfc) in rtw89_phy_config_bb_reg()
846 else if (reg->addr == 0xfb) in rtw89_phy_config_bb_reg()
848 else if (reg->addr == 0xfa) in rtw89_phy_config_bb_reg()
850 else if (reg->addr == 0xf9) in rtw89_phy_config_bb_reg()
853 rtw89_phy_write32(rtwdev, reg->addr, reg->data); in rtw89_phy_config_bb_reg()
876 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; in rtw89_phy_cfg_bb_gain_error()
885 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
889 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
893 gain->tia_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
915 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; in rtw89_phy_cfg_bb_rpl_ofst()
926 gain->rpl_ofst_20[gband][path] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
930 gain->rpl_ofst_40[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
935 gain->rpl_ofst_40[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
941 gain->rpl_ofst_80[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
946 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
952 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
958 gain->rpl_ofst_160[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
963 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
969 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
975 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
981 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
997 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; in rtw89_phy_cfg_bb_gain_bypass()
1006 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1010 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1024 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; in rtw89_phy_cfg_bb_gain_op1db()
1033 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1037 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1041 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1045 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1060 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_config_bb_gain()
1061 union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr }; in rtw89_phy_config_bb_gain()
1062 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_config_bb_gain()
1067 if (arg.path >= chip->rf_path_num) in rtw89_phy_config_bb_gain()
1077 rtw89_phy_cfg_bb_gain_error(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain()
1080 rtw89_phy_cfg_bb_rpl_ofst(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain()
1083 rtw89_phy_cfg_bb_gain_bypass(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain()
1086 rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain()
1090 if (efuse->rfe_type < 50) in rtw89_phy_config_bb_gain()
1096 arg.addr, reg->data, arg.cfg_type); in rtw89_phy_config_bb_gain()
1107 u16 idx = info->curr_idx % RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1108 u8 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1112 rf_path, info->curr_idx); in rtw89_phy_cofig_rf_reg_store()
1116 info->rtw89_phy_config_rf_h2c[page][idx] = in rtw89_phy_cofig_rf_reg_store()
1117 cpu_to_le32((reg->addr << 20) | reg->data); in rtw89_phy_cofig_rf_reg_store()
1118 info->curr_idx++; in rtw89_phy_cofig_rf_reg_store()
1124 u16 remain = info->curr_idx; in rtw89_phy_config_rf_reg_fw()
1133 ret = -EINVAL; in rtw89_phy_config_rf_reg_fw()
1137 for (i = 0; i < RTW89_H2C_RF_PAGE_NUM && remain; i++, remain -= len) { in rtw89_phy_config_rf_reg_fw()
1144 info->curr_idx = 0; in rtw89_phy_config_rf_reg_fw()
1154 u32 addr = reg->addr; in rtw89_phy_config_rf_reg_noio()
1172 if (reg->addr == 0xfe) { in rtw89_phy_config_rf_reg()
1174 } else if (reg->addr == 0xfd) { in rtw89_phy_config_rf_reg()
1176 } else if (reg->addr == 0xfc) { in rtw89_phy_config_rf_reg()
1178 } else if (reg->addr == 0xfb) { in rtw89_phy_config_rf_reg()
1180 } else if (reg->addr == 0xfa) { in rtw89_phy_config_rf_reg()
1182 } else if (reg->addr == 0xf9) { in rtw89_phy_config_rf_reg()
1185 rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data); in rtw89_phy_config_rf_reg()
1196 rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data); in rtw89_phy_config_rf_reg_v1()
1198 if (reg->addr < 0x100) in rtw89_phy_config_rf_reg_v1()
1219 for (i = 0; i < table->n_regs; i++) { in rtw89_phy_sel_headline()
1220 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1221 headline = get_phy_headline(reg->addr); in rtw89_phy_sel_headline()
1232 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1233 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1243 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1244 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1253 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1254 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1255 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1270 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1271 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1272 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1285 return -EINVAL; in rtw89_phy_sel_headline()
1297 enum rtw89_rf_path rf_path = table->rf_path; in rtw89_phy_init_reg()
1298 u8 rfe = rtwdev->efuse.rfe_type; in rtw89_phy_init_reg()
1299 u8 cv = rtwdev->hal.cv; in rtw89_phy_init_reg()
1315 cfg_target = get_phy_target(table->regs[headline_idx].addr); in rtw89_phy_init_reg()
1316 for (i = headline_size; i < table->n_regs; i++) { in rtw89_phy_init_reg()
1317 reg = &table->regs[i]; in rtw89_phy_init_reg()
1318 cond = get_phy_cond(reg->addr); in rtw89_phy_init_reg()
1322 target = get_phy_target(reg->addr); in rtw89_phy_init_reg()
1328 reg->addr, reg->data); in rtw89_phy_init_reg()
1360 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_bb_reg()
1361 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_bb_reg()
1365 bb_table = elm_info->bb_tbl ? elm_info->bb_tbl : chip->bb_table; in rtw89_phy_init_bb_reg()
1369 bb_gain_table = elm_info->bb_gain ? elm_info->bb_gain : chip->bb_gain_table; in rtw89_phy_init_bb_reg()
1387 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_reg()
1388 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_reg()
1397 for (path = RF_PATH_A; path < chip->rf_path_num; path++) { in rtw89_phy_init_rf_reg()
1398 rf_table = elm_info->rf_radio[path] ? in rtw89_phy_init_rf_reg()
1399 elm_info->rf_radio[path] : chip->rf_table[path]; in rtw89_phy_init_rf_reg()
1400 rf_reg_info->rf_path = rf_table->rf_path; in rtw89_phy_init_rf_reg()
1404 config = rf_table->config ? rf_table->config : in rtw89_phy_init_rf_reg()
1409 rf_reg_info->rf_path); in rtw89_phy_init_rf_reg()
1416 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_nctl()
1417 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_nctl()
1426 if (chip->chip_id != RTL8851B) in rtw89_phy_init_rf_nctl()
1428 if (chip->chip_id == RTL8852B) in rtw89_phy_init_rf_nctl()
1439 nctl_table = elm_info->rf_nctl ? elm_info->rf_nctl : chip->nctl_table; in rtw89_phy_init_rf_nctl()
1442 if (chip->nctl_post_table) in rtw89_phy_init_rf_nctl()
1443 rtw89_rfk_parser(rtwdev, chip->nctl_post_table); in rtw89_phy_init_rf_nctl()
1451 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_phy0_phy1_offset()
1483 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx()
1492 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_read32_idx()
1503 if (!rtwdev->dbcc_en) in rtw89_phy_set_phy_regs()
1515 for (i = 0; i < tbl->size; i++) { in rtw89_phy_write_reg3_tbl()
1516 reg3 = &tbl->reg3[i]; in rtw89_phy_write_reg3_tbl()
1517 rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data); in rtw89_phy_write_reg3_tbl()
1554 const struct rtw89_txpwr_byrate_cfg *cfg = tbl->data; in rtw89_phy_load_txpwr_byrate()
1555 const struct rtw89_txpwr_byrate_cfg *end = cfg + tbl->size; in rtw89_phy_load_txpwr_byrate()
1561 byr = _byr_seek(cfg->rs, &rtwdev->byr[cfg->band]); in rtw89_phy_load_txpwr_byrate()
1562 data = cfg->data; in rtw89_phy_load_txpwr_byrate()
1564 for (i = 0; i < cfg->len; i++, data >>= 8) { in rtw89_phy_load_txpwr_byrate()
1565 idx = _byr_idx(cfg->rs, cfg->nss, (cfg->shf + i)); in rtw89_phy_load_txpwr_byrate()
1574 const struct rtw89_chip_info *__c = (rtwdev)->chip; \
1575 (txpwr_rf) >> (__c->txpwr_factor_rf - __c->txpwr_factor_mac); \
1585 if (rate_desc->rs == RTW89_RS_CCK) in rtw89_phy_read_txpwr_byrate()
1588 if (!_byr_chk(rate_desc->rs, rate_desc->nss, rate_desc->idx)) { in rtw89_phy_read_txpwr_byrate()
1591 rate_desc->rs, rate_desc->nss, rate_desc->idx); in rtw89_phy_read_txpwr_byrate()
1596 byr = _byr_seek(rate_desc->rs, &rtwdev->byr[band]); in rtw89_phy_read_txpwr_byrate()
1597 idx = _byr_idx(rate_desc->rs, rate_desc->nss, rate_desc->idx); in rtw89_phy_read_txpwr_byrate()
1606 return (channel_6g - 1) / 2; in rtw89_channel_6g_to_idx()
1608 return (channel_6g - 3) / 2; in rtw89_channel_6g_to_idx()
1610 return (channel_6g - 5) / 2; in rtw89_channel_6g_to_idx()
1612 return (channel_6g - 7) / 2; in rtw89_channel_6g_to_idx()
1614 return (channel_6g - 9) / 2; in rtw89_channel_6g_to_idx()
1616 return (channel_6g - 11) / 2; in rtw89_channel_6g_to_idx()
1618 return (channel_6g - 13) / 2; in rtw89_channel_6g_to_idx()
1620 return (channel_6g - 15) / 2; in rtw89_channel_6g_to_idx()
1634 return channel - 1; in rtw89_channel_to_idx()
1636 return (channel - 36) / 2; in rtw89_channel_to_idx()
1638 return ((channel - 100) / 2) + 15; in rtw89_channel_to_idx()
1640 return ((channel - 149) / 2) + 38; in rtw89_channel_to_idx()
1650 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit()
1651 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit()
1652 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit()
1653 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit()
1654 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit()
1659 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit()
1660 s8 lmt = 0, sar; in rtw89_phy_read_txpwr_limit() local
1664 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
1668 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
1671 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
1675 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
1678 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit()
1682 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW] in rtw89_phy_read_txpwr_limit()
1692 sar = rtw89_query_sar(rtwdev, freq); in rtw89_phy_read_txpwr_limit()
1694 return min(lmt, sar); in rtw89_phy_read_txpwr_limit()
1713 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m()
1715 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_20m()
1717 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m()
1719 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_20m()
1728 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m()
1729 ntx, RTW89_RS_CCK, ch - 2); in rtw89_phy_fill_txpwr_limit_40m()
1730 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_40m()
1732 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m()
1734 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_40m()
1736 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_40m()
1737 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_40m()
1740 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_40m()
1753 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_80m()
1755 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_80m()
1757 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_80m()
1758 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_80m()
1760 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_80m()
1761 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_80m()
1764 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_80m()
1767 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_80m()
1769 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m()
1770 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_80m()
1773 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_80m()
1778 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m()
1783 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_80m()
1797 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_160m()
1801 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_160m()
1803 ntx, RTW89_RS_MCS, ch - 14); in rtw89_phy_fill_txpwr_limit_160m()
1804 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_160m()
1806 ntx, RTW89_RS_MCS, ch - 10); in rtw89_phy_fill_txpwr_limit_160m()
1807 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_160m()
1809 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_160m()
1810 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_160m()
1812 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_160m()
1813 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[4], band, in rtw89_phy_fill_txpwr_limit_160m()
1816 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[5], band, in rtw89_phy_fill_txpwr_limit_160m()
1819 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[6], band, in rtw89_phy_fill_txpwr_limit_160m()
1822 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[7], band, in rtw89_phy_fill_txpwr_limit_160m()
1827 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_160m()
1829 ntx, RTW89_RS_MCS, ch - 12); in rtw89_phy_fill_txpwr_limit_160m()
1830 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_160m()
1832 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m()
1833 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[2], band, in rtw89_phy_fill_txpwr_limit_160m()
1836 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[3], band, in rtw89_phy_fill_txpwr_limit_160m()
1841 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_160m()
1843 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m()
1844 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[1], band, in rtw89_phy_fill_txpwr_limit_160m()
1849 __fill_txpwr_limit_nonbf_bf(lmt->mcs_160m, band, in rtw89_phy_fill_txpwr_limit_160m()
1855 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m()
1860 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m()
1864 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m()
1869 lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m()
1878 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit()
1879 u8 pri_ch = chan->primary_channel; in rtw89_phy_fill_txpwr_limit()
1880 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit()
1881 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit()
1907 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit_ru()
1908 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit_ru()
1909 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit_ru()
1910 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit_ru()
1911 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit_ru()
1916 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit_ru()
1917 s8 lmt_ru = 0, sar; in rtw89_phy_read_txpwr_limit_ru() local
1921 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
1925 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
1928 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
1932 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
1935 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
1939 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW] in rtw89_phy_read_txpwr_limit_ru()
1949 sar = rtw89_query_sar(rtwdev, freq); in rtw89_phy_read_txpwr_limit_ru()
1951 return min(lmt_ru, sar); in rtw89_phy_read_txpwr_limit_ru()
1959 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m()
1962 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m()
1965 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m()
1975 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m()
1977 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m()
1978 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m()
1981 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m()
1983 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m()
1984 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m()
1987 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m()
1989 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m()
1990 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m()
2000 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2002 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m()
2003 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2005 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m()
2006 lmt_ru->ru26[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2009 lmt_ru->ru26[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2012 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2014 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m()
2015 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2017 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m()
2018 lmt_ru->ru52[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2021 lmt_ru->ru52[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2024 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2026 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m()
2027 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2029 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m()
2030 lmt_ru->ru106[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2033 lmt_ru->ru106[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m()
2043 static const int ofst[] = { -14, -10, -6, -2, 2, 6, 10, 14 }; in rtw89_phy_fill_txpwr_limit_ru_160m()
2048 lmt_ru->ru26[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m()
2052 lmt_ru->ru52[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m()
2056 lmt_ru->ru106[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m()
2069 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ru()
2070 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ru()
2071 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ru()
2099 u8 max_nss_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_byrate()
2107 u8 band = chan->band_type; in rtw89_phy_set_txpwr_byrate()
2108 u8 ch = chan->channel; in rtw89_phy_set_txpwr_byrate()
2160 u8 band = chan->band_type; in rtw89_phy_set_txpwr_offset()
2185 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit()
2187 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit()
2188 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit()
2221 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ru()
2223 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ru()
2224 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ru()
2261 struct rtw89_dev *rtwdev = ra_data->rtwdev; in rtw89_phy_c2h_ra_rpt_iter()
2262 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_c2h_ra_rpt_iter()
2264 (const struct rtw89_c2h_ra_rpt *)ra_data->c2h->data; in rtw89_phy_c2h_ra_rpt_iter()
2265 struct rtw89_ra_report *ra_report = &rtwsta->ra_report; in rtw89_phy_c2h_ra_rpt_iter()
2266 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_c2h_ra_rpt_iter()
2267 bool format_v1 = chip->chip_gen == RTW89_CHIP_BE; in rtw89_phy_c2h_ra_rpt_iter()
2274 mac_id = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MACID); in rtw89_phy_c2h_ra_rpt_iter()
2275 if (mac_id != rtwsta->mac_id) in rtw89_phy_c2h_ra_rpt_iter()
2278 rate = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MCSNSS); in rtw89_phy_c2h_ra_rpt_iter()
2279 bw = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW); in rtw89_phy_c2h_ra_rpt_iter()
2280 giltf = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_GILTF); in rtw89_phy_c2h_ra_rpt_iter()
2281 mode = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL); in rtw89_phy_c2h_ra_rpt_iter()
2284 t = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MCSNSS_B7); in rtw89_phy_c2h_ra_rpt_iter()
2286 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW_B2); in rtw89_phy_c2h_ra_rpt_iter()
2288 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL_B2); in rtw89_phy_c2h_ra_rpt_iter()
2298 memset(&ra_report->txrate, 0, sizeof(ra_report->txrate)); in rtw89_phy_c2h_ra_rpt_iter()
2302 ra_report->txrate.legacy = legacy_bitrate; in rtw89_phy_c2h_ra_rpt_iter()
2305 ra_report->txrate.flags |= RATE_INFO_FLAGS_MCS; in rtw89_phy_c2h_ra_rpt_iter()
2306 if (RTW89_CHK_FW_FEATURE(OLD_HT_RA_FORMAT, &rtwdev->fw)) in rtw89_phy_c2h_ra_rpt_iter()
2311 ra_report->txrate.mcs = rate; in rtw89_phy_c2h_ra_rpt_iter()
2313 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in rtw89_phy_c2h_ra_rpt_iter()
2314 mcs = ra_report->txrate.mcs & 0x07; in rtw89_phy_c2h_ra_rpt_iter()
2317 ra_report->txrate.flags |= RATE_INFO_FLAGS_VHT_MCS; in rtw89_phy_c2h_ra_rpt_iter()
2318 ra_report->txrate.mcs = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2321 ra_report->txrate.nss = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2325 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in rtw89_phy_c2h_ra_rpt_iter()
2326 mcs = ra_report->txrate.mcs; in rtw89_phy_c2h_ra_rpt_iter()
2329 ra_report->txrate.flags |= RATE_INFO_FLAGS_HE_MCS; in rtw89_phy_c2h_ra_rpt_iter()
2330 ra_report->txrate.mcs = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2333 ra_report->txrate.nss = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2337 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_0_8; in rtw89_phy_c2h_ra_rpt_iter()
2339 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_1_6; in rtw89_phy_c2h_ra_rpt_iter()
2341 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_3_2; in rtw89_phy_c2h_ra_rpt_iter()
2342 mcs = ra_report->txrate.mcs; in rtw89_phy_c2h_ra_rpt_iter()
2346 ra_report->txrate.bw = rtw89_hw_to_rate_info_bw(bw); in rtw89_phy_c2h_ra_rpt_iter()
2347 ra_report->bit_rate = cfg80211_calculate_bitrate(&ra_report->txrate); in rtw89_phy_c2h_ra_rpt_iter()
2348 ra_report->hw_rate = format_v1 ? in rtw89_phy_c2h_ra_rpt_iter()
2353 ra_report->might_fallback_legacy = mcs <= 2; in rtw89_phy_c2h_ra_rpt_iter()
2354 sta->deflink.agg.max_rc_amsdu_len = get_max_amsdu_len(rtwdev, ra_report); in rtw89_phy_c2h_ra_rpt_iter()
2355 rtwsta->max_agg_wait = sta->deflink.agg.max_rc_amsdu_len / 1500 - 1; in rtw89_phy_c2h_ra_rpt_iter()
2365 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_c2h_ra_rpt()
2407 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_get_xcap_reg()
2411 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_get_xcap_reg()
2413 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_get_xcap_reg()
2415 return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask); in rtw89_phy_cfo_get_xcap_reg()
2421 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_set_xcap_reg()
2425 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_set_xcap_reg()
2427 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_set_xcap_reg()
2429 rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val); in rtw89_phy_cfo_set_xcap_reg()
2435 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_set_crystal_cap()
2436 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_cfo_set_crystal_cap()
2439 if (!force && cfo->crystal_cap == crystal_cap) in rtw89_phy_cfo_set_crystal_cap()
2441 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8851B) { in rtw89_phy_cfo_set_crystal_cap()
2454 cfo->crystal_cap = sc_xi_val; in rtw89_phy_cfo_set_crystal_cap()
2455 cfo->x_cap_ofst = (s8)((int)cfo->crystal_cap - cfo->def_x_cap); in rtw89_phy_cfo_set_crystal_cap()
2460 cfo->x_cap_ofst); in rtw89_phy_cfo_set_crystal_cap()
2466 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_reset()
2469 cfo->def_x_cap = cfo->crystal_cap_default & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_reset()
2470 cfo->is_adjust = false; in rtw89_phy_cfo_reset()
2471 if (cfo->crystal_cap == cfo->def_x_cap) in rtw89_phy_cfo_reset()
2473 cap = cfo->crystal_cap; in rtw89_phy_cfo_reset()
2474 cap += (cap > cfo->def_x_cap ? -1 : 1); in rtw89_phy_cfo_reset()
2477 "(0x%x) approach to dflt_val=(0x%x)\n", cfo->crystal_cap, in rtw89_phy_cfo_reset()
2478 cfo->def_x_cap); in rtw89_phy_cfo_reset()
2483 const struct rtw89_reg_def *dcfo_comp = rtwdev->chip->dcfo_comp; in rtw89_dcfo_comp()
2484 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_dcfo_comp()
2498 sign = curr_cfo > 0 ? 1 : -1; in rtw89_dcfo_comp()
2501 if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) in rtw89_dcfo_comp()
2502 cfo_avg_312 = -cfo_avg_312; in rtw89_dcfo_comp()
2503 rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask, in rtw89_dcfo_comp()
2509 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_dcfo_comp_init()
2514 if (chip->cfo_hw_comp) in rtw89_dcfo_comp_init()
2523 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_init()
2524 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_cfo_init()
2526 cfo->crystal_cap_default = efuse->xtal_cap & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_init()
2527 cfo->crystal_cap = cfo->crystal_cap_default; in rtw89_phy_cfo_init()
2528 cfo->def_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_init()
2529 cfo->x_cap_ub = min_t(int, cfo->def_x_cap + CFO_BOUND, 0x7f); in rtw89_phy_cfo_init()
2530 cfo->x_cap_lb = max_t(int, cfo->def_x_cap - CFO_BOUND, 0x1); in rtw89_phy_cfo_init()
2531 cfo->is_adjust = false; in rtw89_phy_cfo_init()
2532 cfo->divergence_lock_en = false; in rtw89_phy_cfo_init()
2533 cfo->x_cap_ofst = 0; in rtw89_phy_cfo_init()
2534 cfo->lock_cnt = 0; in rtw89_phy_cfo_init()
2535 cfo->rtw89_multi_cfo_mode = RTW89_TP_BASED_AVG_MODE; in rtw89_phy_cfo_init()
2536 cfo->apply_compensation = false; in rtw89_phy_cfo_init()
2537 cfo->residual_cfo_acc = 0; in rtw89_phy_cfo_init()
2539 cfo->crystal_cap_default); in rtw89_phy_cfo_init()
2540 rtw89_phy_cfo_set_crystal_cap(rtwdev, cfo->crystal_cap_default, true); in rtw89_phy_cfo_init()
2543 cfo->cfo_timer_ms = 2000; in rtw89_phy_cfo_init()
2544 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_init()
2545 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_init()
2546 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_init()
2547 cfo->cfo_ul_ofdma_acc_mode = RTW89_CFO_UL_OFDMA_ACC_ENABLE; in rtw89_phy_cfo_init()
2553 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_crystal_cap_adjust()
2554 int crystal_cap = cfo->crystal_cap; in rtw89_phy_cfo_crystal_cap_adjust()
2558 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
2560 cfo->is_adjust = true; in rtw89_phy_cfo_crystal_cap_adjust()
2563 cfo->is_adjust = false; in rtw89_phy_cfo_crystal_cap_adjust()
2565 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
2569 sign = curr_cfo > 0 ? 1 : -1; in rtw89_phy_cfo_crystal_cap_adjust()
2585 cfo->crystal_cap, cfo->def_x_cap); in rtw89_phy_cfo_crystal_cap_adjust()
2590 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_average_cfo_calc()
2591 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_average_cfo_calc()
2597 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_average_cfo_calc()
2601 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_average_cfo_calc()
2603 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_average_cfo_calc()
2604 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_average_cfo_calc()
2606 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_average_cfo_calc()
2607 cfo->dcfo_avg = phy_div(cfo_khz_all << chip->dcfo_comp_sft, in rtw89_phy_average_cfo_calc()
2620 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_multi_sta_cfo_calc()
2621 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_multi_sta_cfo_calc()
2636 if (cfo->rtw89_multi_cfo_mode == RTW89_PKT_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
2639 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
2641 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_multi_sta_cfo_calc()
2642 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_multi_sta_cfo_calc()
2649 } else if (cfo->rtw89_multi_cfo_mode == RTW89_ENTRY_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
2652 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
2654 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
2655 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
2656 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
2659 cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
2661 sta_cnt = rtwdev->total_sta_assoc; in rtw89_phy_multi_sta_cfo_calc()
2667 } else if (cfo->rtw89_multi_cfo_mode == RTW89_TP_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
2669 cfo_tol = cfo->sta_cfo_tolerance; in rtw89_phy_multi_sta_cfo_calc()
2672 if (cfo->cfo_cnt[i] != 0) { in rtw89_phy_multi_sta_cfo_calc()
2673 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
2674 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
2677 cfo->cfo_avg[i] = cfo->pre_cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
2679 max_cfo_lb = max(cfo->cfo_avg[i] - cfo_tol, max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
2680 min_cfo_ub = min(cfo->cfo_avg[i] + cfo_tol, min_cfo_ub); in rtw89_phy_multi_sta_cfo_calc()
2681 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
2685 i, cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
2686 if (sta_cnt >= rtwdev->total_sta_assoc) in rtw89_phy_multi_sta_cfo_calc()
2689 tp_all = stats->rx_throughput; /* need tp for each entry */ in rtw89_phy_multi_sta_cfo_calc()
2704 min_cfo_ub - max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
2712 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
2720 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_statistics_reset()
2722 memset(&cfo->cfo_tail, 0, sizeof(cfo->cfo_tail)); in rtw89_phy_cfo_statistics_reset()
2723 memset(&cfo->cfo_cnt, 0, sizeof(cfo->cfo_cnt)); in rtw89_phy_cfo_statistics_reset()
2724 cfo->packet_count = 0; in rtw89_phy_cfo_statistics_reset()
2725 cfo->packet_count_pre = 0; in rtw89_phy_cfo_statistics_reset()
2726 cfo->cfo_avg_pre = 0; in rtw89_phy_cfo_statistics_reset()
2731 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_dm()
2734 u8 pre_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_dm()
2735 u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; in rtw89_phy_cfo_dm()
2737 cfo->dcfo_avg = 0; in rtw89_phy_cfo_dm()
2739 rtwdev->total_sta_assoc); in rtw89_phy_cfo_dm()
2740 if (rtwdev->total_sta_assoc == 0) { in rtw89_phy_cfo_dm()
2744 if (cfo->packet_count == 0) { in rtw89_phy_cfo_dm()
2748 if (cfo->packet_count == cfo->packet_count_pre) { in rtw89_phy_cfo_dm()
2752 if (rtwdev->total_sta_assoc == 1) in rtw89_phy_cfo_dm()
2760 if (cfo->divergence_lock_en) { in rtw89_phy_cfo_dm()
2761 cfo->lock_cnt++; in rtw89_phy_cfo_dm()
2762 if (cfo->lock_cnt > CFO_PERIOD_CNT) { in rtw89_phy_cfo_dm()
2763 cfo->divergence_lock_en = false; in rtw89_phy_cfo_dm()
2764 cfo->lock_cnt = 0; in rtw89_phy_cfo_dm()
2770 if (cfo->crystal_cap >= cfo->x_cap_ub || in rtw89_phy_cfo_dm()
2771 cfo->crystal_cap <= cfo->x_cap_lb) { in rtw89_phy_cfo_dm()
2772 cfo->divergence_lock_en = true; in rtw89_phy_cfo_dm()
2778 cfo->cfo_avg_pre = new_cfo; in rtw89_phy_cfo_dm()
2779 cfo->dcfo_avg_pre = cfo->dcfo_avg; in rtw89_phy_cfo_dm()
2780 x_cap_update = cfo->crystal_cap != pre_x_cap; in rtw89_phy_cfo_dm()
2782 rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap: D:%x C:%x->%x, ofst=%d\n", in rtw89_phy_cfo_dm()
2783 cfo->def_x_cap, pre_x_cap, cfo->crystal_cap, in rtw89_phy_cfo_dm()
2784 cfo->x_cap_ofst); in rtw89_phy_cfo_dm()
2786 if (cfo->dcfo_avg > 0) in rtw89_phy_cfo_dm()
2787 cfo->dcfo_avg -= CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
2789 cfo->dcfo_avg += CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
2791 rtw89_dcfo_comp(rtwdev, cfo->dcfo_avg); in rtw89_phy_cfo_dm()
2799 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track_work()
2801 mutex_lock(&rtwdev->mutex); in rtw89_phy_cfo_track_work()
2802 if (!cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track_work()
2806 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, in rtw89_phy_cfo_track_work()
2807 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_track_work()
2809 mutex_unlock(&rtwdev->mutex); in rtw89_phy_cfo_track_work()
2814 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_start_work()
2816 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, in rtw89_phy_cfo_start_work()
2817 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_start_work()
2822 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track()
2823 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_cfo_track()
2826 if (stats->rx_tf_periodic > CFO_TF_CNT_TH) in rtw89_phy_cfo_track()
2828 if (cfo->cfo_ul_ofdma_acc_mode == RTW89_CFO_UL_OFDMA_ACC_ENABLE && in rtw89_phy_cfo_track()
2832 switch (cfo->phy_cfo_status) { in rtw89_phy_cfo_track()
2834 if (stats->tx_throughput >= CFO_TP_UPPER) { in rtw89_phy_cfo_track()
2835 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_ENHANCE; in rtw89_phy_cfo_track()
2836 cfo->cfo_trig_by_timer_en = true; in rtw89_phy_cfo_track()
2837 cfo->cfo_timer_ms = CFO_COMP_PERIOD; in rtw89_phy_cfo_track()
2842 if (stats->tx_throughput <= CFO_TP_LOWER) in rtw89_phy_cfo_track()
2843 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
2845 cfo->phy_cfo_trk_cnt >= CFO_PERIOD_CNT) in rtw89_phy_cfo_track()
2846 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_HOLD; in rtw89_phy_cfo_track()
2848 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
2850 if (cfo->phy_cfo_status == RTW89_PHY_DCFO_STATE_NORMAL) { in rtw89_phy_cfo_track()
2851 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
2852 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
2856 if (stats->tx_throughput <= CFO_TP_LOWER) { in rtw89_phy_cfo_track()
2857 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
2858 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
2859 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
2861 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
2865 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
2866 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
2871 stats->tx_throughput, cfo->phy_cfo_status, in rtw89_phy_cfo_track()
2872 cfo->cfo_trig_by_timer_en, cfo->phy_cfo_trk_cnt, in rtw89_phy_cfo_track()
2873 ewma_thermal_read(&rtwdev->phystat.avg_thermal[0])); in rtw89_phy_cfo_track()
2874 if (cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track()
2882 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_parse()
2883 u8 macid = phy_ppdu->mac_id; in rtw89_phy_cfo_parse()
2890 cfo->cfo_tail[macid] += cfo_val; in rtw89_phy_cfo_parse()
2891 cfo->cfo_cnt[macid]++; in rtw89_phy_cfo_parse()
2892 cfo->packet_count++; in rtw89_phy_cfo_parse()
2897 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_assoc()
2899 rtwvif->sub_entity_idx); in rtw89_phy_ul_tb_assoc()
2900 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_assoc()
2902 if (!chip->support_ul_tb_ctrl) in rtw89_phy_ul_tb_assoc()
2905 rtwvif->def_tri_idx = in rtw89_phy_ul_tb_assoc()
2908 if (chip->chip_id == RTL8852B && rtwdev->hal.cv > CHIP_CBV) in rtw89_phy_ul_tb_assoc()
2909 rtwvif->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
2910 else if (chan->band_type >= RTW89_BAND_5G && in rtw89_phy_ul_tb_assoc()
2911 chan->band_width >= RTW89_CHANNEL_WIDTH_40) in rtw89_phy_ul_tb_assoc()
2912 rtwvif->dyn_tb_bedge_en = true; in rtw89_phy_ul_tb_assoc()
2914 rtwvif->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
2918 ul_tb_info->def_if_bandedge, rtwvif->def_tri_idx); in rtw89_phy_ul_tb_assoc()
2921 rtwvif->dyn_tb_bedge_en, ul_tb_info->dyn_tb_tri_en); in rtw89_phy_ul_tb_assoc()
2937 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_ul_tb_ctrl_check()
2940 if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_ul_tb_ctrl_check()
2943 if (!vif->cfg.assoc) in rtw89_phy_ul_tb_ctrl_check()
2946 if (stats->rx_tf_periodic > UL_TB_TF_CNT_L2H_TH) in rtw89_phy_ul_tb_ctrl_check()
2947 ul_tb_data->high_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
2948 else if (stats->rx_tf_periodic < UL_TB_TF_CNT_H2L_TH) in rtw89_phy_ul_tb_ctrl_check()
2949 ul_tb_data->low_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
2951 ul_tb_data->valid = true; in rtw89_phy_ul_tb_ctrl_check()
2952 ul_tb_data->def_tri_idx = rtwvif->def_tri_idx; in rtw89_phy_ul_tb_ctrl_check()
2953 ul_tb_data->dyn_tb_bedge_en = rtwvif->dyn_tb_bedge_en; in rtw89_phy_ul_tb_ctrl_check()
2958 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_ctrl_track()
2959 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_ctrl_track()
2963 if (!chip->support_ul_tb_ctrl) in rtw89_phy_ul_tb_ctrl_track()
2966 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_ul_tb_ctrl_track()
2982 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_ctrl_track()
2985 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_ctrl_track()
2989 if (ul_tb_info->dyn_tb_tri_en) { in rtw89_phy_ul_tb_ctrl_track()
3008 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_info_init()
3009 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_info_init()
3011 if (!chip->support_ul_tb_ctrl) in rtw89_phy_ul_tb_info_init()
3014 ul_tb_info->dyn_tb_tri_en = true; in rtw89_phy_ul_tb_info_init()
3015 ul_tb_info->def_if_bandedge = in rtw89_phy_ul_tb_info_init()
3022 ewma_rssi_init(&antdiv_sts->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
3023 ewma_rssi_init(&antdiv_sts->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
3024 ewma_rssi_init(&antdiv_sts->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
3025 antdiv_sts->pkt_cnt_cck = 0; in rtw89_phy_antdiv_sts_instance_reset()
3026 antdiv_sts->pkt_cnt_ofdm = 0; in rtw89_phy_antdiv_sts_instance_reset()
3027 antdiv_sts->pkt_cnt_non_legacy = 0; in rtw89_phy_antdiv_sts_instance_reset()
3028 antdiv_sts->evm = 0; in rtw89_phy_antdiv_sts_instance_reset()
3035 if (rtw89_get_data_rate_mode(rtwdev, phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) { in rtw89_phy_antdiv_sts_instance_add()
3036 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) { in rtw89_phy_antdiv_sts_instance_add()
3037 ewma_rssi_add(&stats->cck_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
3038 stats->pkt_cnt_cck++; in rtw89_phy_antdiv_sts_instance_add()
3040 ewma_rssi_add(&stats->ofdm_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
3041 stats->pkt_cnt_ofdm++; in rtw89_phy_antdiv_sts_instance_add()
3042 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
3045 ewma_rssi_add(&stats->non_legacy_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
3046 stats->pkt_cnt_non_legacy++; in rtw89_phy_antdiv_sts_instance_add()
3047 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
3053 if (stats->pkt_cnt_non_legacy >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
3054 stats->pkt_cnt_non_legacy >= stats->pkt_cnt_ofdm) in rtw89_phy_antdiv_sts_instance_get_rssi()
3055 return ewma_rssi_read(&stats->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
3056 else if (stats->pkt_cnt_ofdm >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
3057 stats->pkt_cnt_ofdm >= stats->pkt_cnt_non_legacy) in rtw89_phy_antdiv_sts_instance_get_rssi()
3058 return ewma_rssi_read(&stats->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
3060 return ewma_rssi_read(&stats->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
3065 return phy_div(stats->evm, stats->pkt_cnt_non_legacy + stats->pkt_cnt_ofdm); in rtw89_phy_antdiv_sts_instance_get_evm()
3071 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_parse()
3072 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_parse()
3074 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_parse()
3077 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->target_stats); in rtw89_phy_antdiv_parse()
3079 if (!antdiv->get_stats) in rtw89_phy_antdiv_parse()
3082 if (hal->antenna_rx == RF_A) in rtw89_phy_antdiv_parse()
3083 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->main_stats); in rtw89_phy_antdiv_parse()
3084 else if (hal->antenna_rx == RF_B) in rtw89_phy_antdiv_parse()
3085 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->aux_stats); in rtw89_phy_antdiv_parse()
3118 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_sts_reset()
3120 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_sts_reset()
3121 rtw89_phy_antdiv_sts_instance_reset(&antdiv->main_stats); in rtw89_phy_antdiv_sts_reset()
3122 rtw89_phy_antdiv_sts_instance_reset(&antdiv->aux_stats); in rtw89_phy_antdiv_sts_reset()
3127 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_init()
3128 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_init()
3130 if (!hal->ant_diversity) in rtw89_phy_antdiv_init()
3133 antdiv->get_stats = false; in rtw89_phy_antdiv_init()
3134 antdiv->rssi_pre = 0; in rtw89_phy_antdiv_init()
3141 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_thermal_update()
3145 for (i = 0; i < rtwdev->chip->rf_path_num; i++) { in rtw89_phy_stat_thermal_update()
3148 ewma_thermal_add(&phystat->avg_thermal[i], th); in rtw89_phy_stat_thermal_update()
3152 ewma_thermal_read(&phystat->avg_thermal[i])); in rtw89_phy_stat_thermal_update()
3165 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_stat_rssi_update_iter()
3168 struct rtw89_phy_ch_info *ch_info = rssi_data->ch_info; in rtw89_phy_stat_rssi_update_iter()
3171 rssi_curr = ewma_rssi_read(&rtwsta->avg_rssi); in rtw89_phy_stat_rssi_update_iter()
3173 if (rssi_curr < ch_info->rssi_min) { in rtw89_phy_stat_rssi_update_iter()
3174 ch_info->rssi_min = rssi_curr; in rtw89_phy_stat_rssi_update_iter()
3175 ch_info->rssi_min_macid = rtwsta->mac_id; in rtw89_phy_stat_rssi_update_iter()
3178 if (rtwsta->prev_rssi == 0) { in rtw89_phy_stat_rssi_update_iter()
3179 rtwsta->prev_rssi = rssi_curr; in rtw89_phy_stat_rssi_update_iter()
3180 } else if (abs((int)rtwsta->prev_rssi - (int)rssi_curr) > (3 << RSSI_FACTOR)) { in rtw89_phy_stat_rssi_update_iter()
3181 rtwsta->prev_rssi = rssi_curr; in rtw89_phy_stat_rssi_update_iter()
3182 rssi_data->rssi_changed = true; in rtw89_phy_stat_rssi_update_iter()
3191 rssi_data.ch_info = &rtwdev->ch_info; in rtw89_phy_stat_rssi_update()
3192 rssi_data.ch_info->rssi_min = U8_MAX; in rtw89_phy_stat_rssi_update()
3193 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_stat_rssi_update()
3202 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_init()
3205 for (i = 0; i < rtwdev->chip->rf_path_num; i++) in rtw89_phy_stat_init()
3206 ewma_thermal_init(&phystat->avg_thermal[i]); in rtw89_phy_stat_init()
3210 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_init()
3211 memset(&phystat->last_pkt_stat, 0, sizeof(phystat->last_pkt_stat)); in rtw89_phy_stat_init()
3216 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_track()
3221 phystat->last_pkt_stat = phystat->cur_pkt_stat; in rtw89_phy_stat_track()
3222 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_track()
3227 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_us_to_idx()
3229 return time_us >> (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_us_to_idx()
3234 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_idx_to_us()
3236 return idx << (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_idx_to_us()
3241 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_top_setting_init()
3242 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_top_setting_init()
3243 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_top_setting_init()
3245 env->ccx_manual_ctrl = false; in rtw89_phy_ccx_top_setting_init()
3246 env->ccx_ongoing = false; in rtw89_phy_ccx_top_setting_init()
3247 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_top_setting_init()
3248 env->ccx_period = 0; in rtw89_phy_ccx_top_setting_init()
3249 env->ccx_unit_idx = RTW89_CCX_32_US; in rtw89_phy_ccx_top_setting_init()
3251 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->en_mask, 1); in rtw89_phy_ccx_top_setting_init()
3252 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->trig_opt_mask, 1); in rtw89_phy_ccx_top_setting_init()
3253 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_top_setting_init()
3254 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->edcca_opt_mask, in rtw89_phy_ccx_top_setting_init()
3261 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_get_report()
3265 numer = report * score + (env->ccx_period >> 1); in rtw89_phy_ccx_get_report()
3266 if (env->ccx_period) in rtw89_phy_ccx_get_report()
3267 ret = numer / env->ccx_period; in rtw89_phy_ccx_get_report()
3269 return ret >= score ? score - 1 : ret; in rtw89_phy_ccx_get_report()
3303 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_racing_release()
3306 "lv:(%d)->(0)\n", env->ccx_rac_lv); in rtw89_phy_ccx_racing_release()
3308 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_release()
3309 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_racing_release()
3310 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ccx_racing_release()
3316 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_th_update_check()
3317 bool is_update = env->ifs_clm_app != para->ifs_clm_app; in rtw89_phy_ifs_clm_th_update_check()
3319 u16 *ifs_th_l = env->ifs_clm_th_l; in rtw89_phy_ifs_clm_th_update_check()
3320 u16 *ifs_th_h = env->ifs_clm_th_h; in rtw89_phy_ifs_clm_th_update_check()
3327 switch (para->ifs_clm_app) { in rtw89_phy_ifs_clm_th_update_check()
3338 ifs_th0_us = para->ifs_clm_manual_th0; in rtw89_phy_ifs_clm_th_update_check()
3339 ifs_th_times = para->ifs_clm_manual_th_times; in rtw89_phy_ifs_clm_th_update_check()
3345 /* Set sampling threshold for 4 different regions, unit in idx_cnt. in rtw89_phy_ifs_clm_th_update_check()
3346 * low[i] = high[i-1] + 1 in rtw89_phy_ifs_clm_th_update_check()
3347 * high[i] = high[i-1] * ifs_th_times in rtw89_phy_ifs_clm_th_update_check()
3354 ifs_th_l[i] = ifs_th_h[i - 1] + 1; in rtw89_phy_ifs_clm_th_update_check()
3355 ifs_th_h_us[i] = ifs_th_h_us[i - 1] * ifs_th_times; in rtw89_phy_ifs_clm_th_update_check()
3369 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set_th_reg()
3370 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_set_th_reg()
3371 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set_th_reg()
3374 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
3375 env->ifs_clm_th_l[0]); in rtw89_phy_ifs_clm_set_th_reg()
3376 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
3377 env->ifs_clm_th_l[1]); in rtw89_phy_ifs_clm_set_th_reg()
3378 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
3379 env->ifs_clm_th_l[2]); in rtw89_phy_ifs_clm_set_th_reg()
3380 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
3381 env->ifs_clm_th_l[3]); in rtw89_phy_ifs_clm_set_th_reg()
3383 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
3384 env->ifs_clm_th_h[0]); in rtw89_phy_ifs_clm_set_th_reg()
3385 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
3386 env->ifs_clm_th_h[1]); in rtw89_phy_ifs_clm_set_th_reg()
3387 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
3388 env->ifs_clm_th_h[2]); in rtw89_phy_ifs_clm_set_th_reg()
3389 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
3390 env->ifs_clm_th_h[3]); in rtw89_phy_ifs_clm_set_th_reg()
3395 i + 1, env->ifs_clm_th_l[i], env->ifs_clm_th_h[i]); in rtw89_phy_ifs_clm_set_th_reg()
3400 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_setting_init()
3401 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_setting_init()
3402 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_setting_init()
3405 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ifs_clm_setting_init()
3406 env->ifs_clm_mntr_time = 0; in rtw89_phy_ifs_clm_setting_init()
3412 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_collect_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
3413 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
3414 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
3415 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
3416 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
3422 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_racing_ctrl()
3428 return -EINVAL; in rtw89_phy_ccx_racing_ctrl()
3432 "ccx_ongoing=%d, level:(%d)->(%d)\n", env->ccx_ongoing, in rtw89_phy_ccx_racing_ctrl()
3433 env->ccx_rac_lv, level); in rtw89_phy_ccx_racing_ctrl()
3435 if (env->ccx_ongoing) { in rtw89_phy_ccx_racing_ctrl()
3436 if (level <= env->ccx_rac_lv) in rtw89_phy_ccx_racing_ctrl()
3437 ret = -EINVAL; in rtw89_phy_ccx_racing_ctrl()
3439 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_ctrl()
3443 env->ccx_rac_lv = level; in rtw89_phy_ccx_racing_ctrl()
3453 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_trigger()
3454 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_trigger()
3455 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_trigger()
3457 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 0); in rtw89_phy_ccx_trigger()
3458 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 0); in rtw89_phy_ccx_trigger()
3459 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 1); in rtw89_phy_ccx_trigger()
3460 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_trigger()
3462 env->ccx_ongoing = true; in rtw89_phy_ccx_trigger()
3467 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_get_utility()
3471 env->ifs_clm_tx_ratio = in rtw89_phy_ifs_clm_get_utility()
3472 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_tx, PERCENT); in rtw89_phy_ifs_clm_get_utility()
3473 env->ifs_clm_edcca_excl_cca_ratio = in rtw89_phy_ifs_clm_get_utility()
3474 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_edcca_excl_cca, in rtw89_phy_ifs_clm_get_utility()
3476 env->ifs_clm_cck_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
3477 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
3478 env->ifs_clm_ofdm_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
3479 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
3480 env->ifs_clm_cck_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
3481 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
3483 env->ifs_clm_ofdm_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
3484 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
3486 env->ifs_clm_cck_fa_permil = in rtw89_phy_ifs_clm_get_utility()
3487 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
3488 env->ifs_clm_ofdm_fa_permil = in rtw89_phy_ifs_clm_get_utility()
3489 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
3492 if (env->ifs_clm_his[i] > ENV_MNTR_IFSCLM_HIS_MAX) { in rtw89_phy_ifs_clm_get_utility()
3493 env->ifs_clm_ifs_avg[i] = ENV_MNTR_FAIL_DWORD; in rtw89_phy_ifs_clm_get_utility()
3495 env->ifs_clm_ifs_avg[i] = in rtw89_phy_ifs_clm_get_utility()
3497 env->ifs_clm_avg[i]); in rtw89_phy_ifs_clm_get_utility()
3500 res = rtw89_phy_ccx_idx_to_us(rtwdev, env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_utility()
3501 res += env->ifs_clm_his[i] >> 1; in rtw89_phy_ifs_clm_get_utility()
3502 if (env->ifs_clm_his[i]) in rtw89_phy_ifs_clm_get_utility()
3503 res /= env->ifs_clm_his[i]; in rtw89_phy_ifs_clm_get_utility()
3506 env->ifs_clm_cca_avg[i] = res; in rtw89_phy_ifs_clm_get_utility()
3510 "IFS-CLM ratio {Tx, EDCCA_exclu_cca} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
3511 env->ifs_clm_tx_ratio, env->ifs_clm_edcca_excl_cca_ratio); in rtw89_phy_ifs_clm_get_utility()
3513 "IFS-CLM FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
3514 env->ifs_clm_cck_fa_ratio, env->ifs_clm_ofdm_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
3516 "IFS-CLM FA permil {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
3517 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil); in rtw89_phy_ifs_clm_get_utility()
3519 "IFS-CLM CCA_exclu_FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
3520 env->ifs_clm_cck_cca_excl_fa_ratio, in rtw89_phy_ifs_clm_get_utility()
3521 env->ifs_clm_ofdm_cca_excl_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
3526 i + 1, env->ifs_clm_his[i], env->ifs_clm_ifs_avg[i], in rtw89_phy_ifs_clm_get_utility()
3527 env->ifs_clm_cca_avg[i]); in rtw89_phy_ifs_clm_get_utility()
3532 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_get_result()
3533 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_get_result()
3534 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_get_result()
3537 if (rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
3538 ccx->ifs_cnt_done_mask) == 0) { in rtw89_phy_ifs_clm_get_result()
3544 env->ifs_clm_tx = in rtw89_phy_ifs_clm_get_result()
3545 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
3546 ccx->ifs_clm_tx_cnt_msk); in rtw89_phy_ifs_clm_get_result()
3547 env->ifs_clm_edcca_excl_cca = in rtw89_phy_ifs_clm_get_result()
3548 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
3549 ccx->ifs_clm_edcca_excl_cca_fa_mask); in rtw89_phy_ifs_clm_get_result()
3550 env->ifs_clm_cckcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
3551 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
3552 ccx->ifs_clm_cckcca_excl_fa_mask); in rtw89_phy_ifs_clm_get_result()
3553 env->ifs_clm_ofdmcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
3554 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
3555 ccx->ifs_clm_ofdmcca_excl_fa_mask); in rtw89_phy_ifs_clm_get_result()
3556 env->ifs_clm_cckfa = in rtw89_phy_ifs_clm_get_result()
3557 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
3558 ccx->ifs_clm_cck_fa_mask); in rtw89_phy_ifs_clm_get_result()
3559 env->ifs_clm_ofdmfa = in rtw89_phy_ifs_clm_get_result()
3560 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
3561 ccx->ifs_clm_ofdm_fa_mask); in rtw89_phy_ifs_clm_get_result()
3563 env->ifs_clm_his[0] = in rtw89_phy_ifs_clm_get_result()
3564 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
3565 ccx->ifs_t1_his_mask); in rtw89_phy_ifs_clm_get_result()
3566 env->ifs_clm_his[1] = in rtw89_phy_ifs_clm_get_result()
3567 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
3568 ccx->ifs_t2_his_mask); in rtw89_phy_ifs_clm_get_result()
3569 env->ifs_clm_his[2] = in rtw89_phy_ifs_clm_get_result()
3570 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
3571 ccx->ifs_t3_his_mask); in rtw89_phy_ifs_clm_get_result()
3572 env->ifs_clm_his[3] = in rtw89_phy_ifs_clm_get_result()
3573 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
3574 ccx->ifs_t4_his_mask); in rtw89_phy_ifs_clm_get_result()
3576 env->ifs_clm_avg[0] = in rtw89_phy_ifs_clm_get_result()
3577 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
3578 ccx->ifs_t1_avg_mask); in rtw89_phy_ifs_clm_get_result()
3579 env->ifs_clm_avg[1] = in rtw89_phy_ifs_clm_get_result()
3580 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
3581 ccx->ifs_t2_avg_mask); in rtw89_phy_ifs_clm_get_result()
3582 env->ifs_clm_avg[2] = in rtw89_phy_ifs_clm_get_result()
3583 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
3584 ccx->ifs_t3_avg_mask); in rtw89_phy_ifs_clm_get_result()
3585 env->ifs_clm_avg[3] = in rtw89_phy_ifs_clm_get_result()
3586 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
3587 ccx->ifs_t4_avg_mask); in rtw89_phy_ifs_clm_get_result()
3589 env->ifs_clm_cca[0] = in rtw89_phy_ifs_clm_get_result()
3590 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
3591 ccx->ifs_t1_cca_mask); in rtw89_phy_ifs_clm_get_result()
3592 env->ifs_clm_cca[1] = in rtw89_phy_ifs_clm_get_result()
3593 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
3594 ccx->ifs_t2_cca_mask); in rtw89_phy_ifs_clm_get_result()
3595 env->ifs_clm_cca[2] = in rtw89_phy_ifs_clm_get_result()
3596 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
3597 ccx->ifs_t3_cca_mask); in rtw89_phy_ifs_clm_get_result()
3598 env->ifs_clm_cca[3] = in rtw89_phy_ifs_clm_get_result()
3599 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
3600 ccx->ifs_t4_cca_mask); in rtw89_phy_ifs_clm_get_result()
3602 env->ifs_clm_total_ifs = in rtw89_phy_ifs_clm_get_result()
3603 rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
3604 ccx->ifs_total_mask); in rtw89_phy_ifs_clm_get_result()
3606 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "IFS-CLM total_ifs = %d\n", in rtw89_phy_ifs_clm_get_result()
3607 env->ifs_clm_total_ifs); in rtw89_phy_ifs_clm_get_result()
3610 env->ifs_clm_tx, env->ifs_clm_edcca_excl_cca); in rtw89_phy_ifs_clm_get_result()
3612 "IFS-CLM FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
3613 env->ifs_clm_cckfa, env->ifs_clm_ofdmfa); in rtw89_phy_ifs_clm_get_result()
3615 "IFS-CLM CCA_exclu_FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
3616 env->ifs_clm_cckcca_excl_fa, env->ifs_clm_ofdmcca_excl_fa); in rtw89_phy_ifs_clm_get_result()
3621 "T%d:[%d, %d, %d]\n", i + 1, env->ifs_clm_his[i], in rtw89_phy_ifs_clm_get_result()
3622 env->ifs_clm_avg[i], env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_result()
3632 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set()
3633 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_set()
3634 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set()
3638 if (para->mntr_time == 0) { in rtw89_phy_ifs_clm_set()
3641 return -EINVAL; in rtw89_phy_ifs_clm_set()
3644 if (rtw89_phy_ccx_racing_ctrl(rtwdev, para->rac_lv)) in rtw89_phy_ifs_clm_set()
3645 return -EINVAL; in rtw89_phy_ifs_clm_set()
3647 if (para->mntr_time != env->ifs_clm_mntr_time) { in rtw89_phy_ifs_clm_set()
3648 rtw89_phy_ccx_ms_to_period_unit(rtwdev, para->mntr_time, in rtw89_phy_ifs_clm_set()
3650 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
3651 ccx->ifs_clm_period_mask, period); in rtw89_phy_ifs_clm_set()
3652 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
3653 ccx->ifs_clm_cnt_unit_mask, in rtw89_phy_ifs_clm_set()
3657 "Update IFS-CLM time ((%d)) -> ((%d))\n", in rtw89_phy_ifs_clm_set()
3658 env->ifs_clm_mntr_time, para->mntr_time); in rtw89_phy_ifs_clm_set()
3660 env->ifs_clm_mntr_time = para->mntr_time; in rtw89_phy_ifs_clm_set()
3661 env->ccx_period = (u16)period; in rtw89_phy_ifs_clm_set()
3662 env->ccx_unit_idx = (u8)unit_idx; in rtw89_phy_ifs_clm_set()
3666 env->ifs_clm_app = para->ifs_clm_app; in rtw89_phy_ifs_clm_set()
3675 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_env_monitor_track()
3679 env->ccx_watchdog_result = RTW89_PHY_ENV_MON_CCX_FAIL; in rtw89_phy_env_monitor_track()
3680 if (env->ccx_manual_ctrl) { in rtw89_phy_env_monitor_track()
3688 env->ccx_watchdog_result |= RTW89_PHY_ENV_MON_IFS_CLM; in rtw89_phy_env_monitor_track()
3702 env->ccx_watchdog_result, chk_result); in rtw89_phy_env_monitor_track()
3711 *ie_page -= 1; in rtw89_physts_ie_page_valid()
3740 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_physts_set_ie_bitmap()
3746 if (chip->chip_id == RTL8852A) in rtw89_physts_set_ie_bitmap()
3772 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_physts_enable_fail_report()
3773 const struct rtw89_physts_regs *physts = phy->physts; in rtw89_physts_enable_fail_report()
3776 rtw89_phy_write32_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
3777 physts->dis_trigger_fail_mask); in rtw89_physts_enable_fail_report()
3778 rtw89_phy_write32_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
3779 physts->dis_trigger_brk_mask); in rtw89_physts_enable_fail_report()
3781 rtw89_phy_write32_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
3782 physts->dis_trigger_fail_mask); in rtw89_physts_enable_fail_report()
3783 rtw89_phy_write32_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
3784 physts->dis_trigger_brk_mask); in rtw89_physts_enable_fail_report()
3818 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_dig_read_gain_table()
3819 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_read_gain_table()
3829 gain_arr = dig->lna_gain_g; in rtw89_phy_dig_read_gain_table()
3831 cfg = chip->dig_table->cfg_lna_g; in rtw89_phy_dig_read_gain_table()
3835 gain_arr = dig->tia_gain_g; in rtw89_phy_dig_read_gain_table()
3837 cfg = chip->dig_table->cfg_tia_g; in rtw89_phy_dig_read_gain_table()
3841 gain_arr = dig->lna_gain_a; in rtw89_phy_dig_read_gain_table()
3843 cfg = chip->dig_table->cfg_lna_a; in rtw89_phy_dig_read_gain_table()
3847 gain_arr = dig->tia_gain_a; in rtw89_phy_dig_read_gain_table()
3849 cfg = chip->dig_table->cfg_tia_a; in rtw89_phy_dig_read_gain_table()
3856 for (i = 0; i < cfg->size; i++) { in rtw89_phy_dig_read_gain_table()
3857 tmp = rtw89_phy_read32_mask(rtwdev, cfg->table[i].addr, in rtw89_phy_dig_read_gain_table()
3858 cfg->table[i].mask); in rtw89_phy_dig_read_gain_table()
3870 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_gain_para()
3874 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_update_gain_para()
3879 dig->ib_pkpwr = sign_extend32(tmp >> DIG_GAIN_SHIFT, U8_MAX_BIT); in rtw89_phy_dig_update_gain_para()
3880 dig->ib_pbk = rtw89_phy_read32_mask(rtwdev, R_PATH0_IB_PBK, in rtw89_phy_dig_update_gain_para()
3883 dig->ib_pkpwr, dig->ib_pbk); in rtw89_phy_dig_update_gain_para()
3897 struct rtw89_phy_ch_info *ch_info = &rtwdev->ch_info; in rtw89_phy_dig_update_rssi_info()
3898 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_rssi_info()
3899 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_rssi_info()
3902 dig->igi_rssi = ch_info->rssi_min >> 1; in rtw89_phy_dig_update_rssi_info()
3905 dig->igi_rssi = rssi_nolink; in rtw89_phy_dig_update_rssi_info()
3911 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_para()
3913 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_para()
3916 switch (chan->band_type) { in rtw89_phy_dig_update_para()
3918 dig->lna_gain = dig->lna_gain_g; in rtw89_phy_dig_update_para()
3919 dig->tia_gain = dig->tia_gain_g; in rtw89_phy_dig_update_para()
3921 dig->force_gaincode_idx_en = false; in rtw89_phy_dig_update_para()
3922 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
3926 dig->lna_gain = dig->lna_gain_a; in rtw89_phy_dig_update_para()
3927 dig->tia_gain = dig->tia_gain_a; in rtw89_phy_dig_update_para()
3929 dig->force_gaincode_idx_en = true; in rtw89_phy_dig_update_para()
3930 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
3933 memcpy(dig->fa_th, fa_th_src, sizeof(dig->fa_th)); in rtw89_phy_dig_update_para()
3934 memcpy(dig->igi_rssi_th, igi_rssi_th, sizeof(dig->igi_rssi_th)); in rtw89_phy_dig_update_para()
3943 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_para_reset()
3945 dig->cur_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
3946 dig->cur_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
3947 dig->cur_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
3948 dig->force_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
3949 dig->force_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
3950 dig->force_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
3952 dig->dyn_igi_max = igi_max_performance_mode; in rtw89_phy_dig_para_reset()
3953 dig->dyn_igi_min = dynamic_igi_min; in rtw89_phy_dig_para_reset()
3954 dig->dyn_pd_th_max = dynamic_pd_threshold_max; in rtw89_phy_dig_para_reset()
3955 dig->pd_low_th_ofst = pd_low_th_offset; in rtw89_phy_dig_para_reset()
3956 dig->is_linked_pre = false; in rtw89_phy_dig_para_reset()
3967 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_lna_idx_by_rssi()
3970 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_lna_idx_by_rssi()
3972 else if (rssi < dig->igi_rssi_th[1]) in rtw89_phy_dig_lna_idx_by_rssi()
3974 else if (rssi < dig->igi_rssi_th[2]) in rtw89_phy_dig_lna_idx_by_rssi()
3976 else if (rssi < dig->igi_rssi_th[3]) in rtw89_phy_dig_lna_idx_by_rssi()
3978 else if (rssi < dig->igi_rssi_th[4]) in rtw89_phy_dig_lna_idx_by_rssi()
3988 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_tia_idx_by_rssi()
3991 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_tia_idx_by_rssi()
4004 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_rxb_idx_by_rssi()
4005 s8 lna_gain = dig->lna_gain[set->lna_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
4006 s8 tia_gain = dig->tia_gain[set->tia_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
4011 rxb_idx_tmp += dig->ib_pkpwr - dig->ib_pbk - wb_rssi; in rtw89_phy_dig_rxb_idx_by_rssi()
4023 set->lna_idx = rtw89_phy_dig_lna_idx_by_rssi(rtwdev, rssi); in rtw89_phy_dig_gaincode_by_rssi()
4024 set->tia_idx = rtw89_phy_dig_tia_idx_by_rssi(rtwdev, rssi); in rtw89_phy_dig_gaincode_by_rssi()
4025 set->rxb_idx = rtw89_phy_dig_rxb_idx_by_rssi(rtwdev, rssi, set); in rtw89_phy_dig_gaincode_by_rssi()
4029 rssi, set->lna_idx, set->tia_idx, set->rxb_idx); in rtw89_phy_dig_gaincode_by_rssi()
4036 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_igi_offset_by_env()
4037 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_dig_igi_offset_by_env()
4039 u8 igi_offset = dig->fa_rssi_ofst; in rtw89_phy_dig_igi_offset_by_env()
4042 fa_ratio = env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil; in rtw89_phy_dig_igi_offset_by_env()
4044 if (fa_ratio < dig->fa_th[0]) in rtw89_phy_dig_igi_offset_by_env()
4046 else if (fa_ratio < dig->fa_th[1]) in rtw89_phy_dig_igi_offset_by_env()
4048 else if (fa_ratio < dig->fa_th[2]) in rtw89_phy_dig_igi_offset_by_env()
4050 else if (fa_ratio < dig->fa_th[3]) in rtw89_phy_dig_igi_offset_by_env()
4061 dig->fa_rssi_ofst = igi_offset; in rtw89_phy_dig_igi_offset_by_env()
4064 "fa_th: [+6 (%d) +4 (%d) +2 (%d) 0 (%d) -2 ]\n", in rtw89_phy_dig_igi_offset_by_env()
4065 dig->fa_th[3], dig->fa_th[2], dig->fa_th[1], dig->fa_th[0]); in rtw89_phy_dig_igi_offset_by_env()
4069 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
4070 env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
4076 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_lna_idx()
4078 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
4079 dig_regs->p0_lna_init.mask, lna_idx); in rtw89_phy_dig_set_lna_idx()
4080 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
4081 dig_regs->p1_lna_init.mask, lna_idx); in rtw89_phy_dig_set_lna_idx()
4086 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_tia_idx()
4088 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
4089 dig_regs->p0_tia_init.mask, tia_idx); in rtw89_phy_dig_set_tia_idx()
4090 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
4091 dig_regs->p1_tia_init.mask, tia_idx); in rtw89_phy_dig_set_tia_idx()
4096 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_rxb_idx()
4098 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
4099 dig_regs->p0_rxb_init.mask, rxb_idx); in rtw89_phy_dig_set_rxb_idx()
4100 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
4101 dig_regs->p1_rxb_init.mask, rxb_idx); in rtw89_phy_dig_set_rxb_idx()
4118 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_sdagc_follow_pagc_config()
4120 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
4121 dig_regs->p0_p20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
4122 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
4123 dig_regs->p0_s20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
4124 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
4125 dig_regs->p1_p20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
4126 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
4127 dig_regs->p1_s20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
4134 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_config_igi()
4136 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_config_igi()
4139 if (dig->force_gaincode_idx_en) { in rtw89_phy_dig_config_igi()
4140 rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); in rtw89_phy_dig_config_igi()
4144 rtw89_phy_dig_gaincode_by_rssi(rtwdev, dig->igi_fa_rssi, in rtw89_phy_dig_config_igi()
4145 &dig->cur_gaincode); in rtw89_phy_dig_config_igi()
4146 rtw89_phy_dig_set_igi_cr(rtwdev, dig->cur_gaincode); in rtw89_phy_dig_config_igi()
4154 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_dyn_pd_th()
4155 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_dig_dyn_pd_th()
4156 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_dyn_pd_th()
4157 u8 final_rssi = 0, under_region = dig->pd_low_th_ofst; in rtw89_phy_dig_dyn_pd_th()
4181 dig->dyn_pd_th_max = dig->igi_rssi; in rtw89_phy_dig_dyn_pd_th()
4183 final_rssi = min_t(u8, rssi, dig->igi_rssi); in rtw89_phy_dig_dyn_pd_th()
4188 pd_val = (ofdm_cca_th - under_region - PD_TH_MIN_RSSI) >> 1; in rtw89_phy_dig_dyn_pd_th()
4197 rtw89_phy_write32_mask(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
4198 dig_regs->pd_lower_bound_mask, pd_val); in rtw89_phy_dig_dyn_pd_th()
4199 rtw89_phy_write32_mask(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
4200 dig_regs->pd_spatial_reuse_en, enable); in rtw89_phy_dig_dyn_pd_th()
4202 if (!rtwdev->hal.support_cckpd) in rtw89_phy_dig_dyn_pd_th()
4205 cck_cca_th = max_t(s8, final_rssi - under_region, CCKPD_TH_MIN_RSSI); in rtw89_phy_dig_dyn_pd_th()
4206 pd_val = (u32)(cck_cca_th - IGI_RSSI_MAX); in rtw89_phy_dig_dyn_pd_th()
4212 rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_reg, in rtw89_phy_dig_dyn_pd_th()
4213 dig_regs->bmode_cca_rssi_limit_en, enable); in rtw89_phy_dig_dyn_pd_th()
4214 rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_lower_bound_reg, in rtw89_phy_dig_dyn_pd_th()
4215 dig_regs->bmode_rssi_nocca_low_th_mask, pd_val); in rtw89_phy_dig_dyn_pd_th()
4220 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_reset()
4222 dig->bypass_dig = false; in rtw89_phy_dig_reset()
4224 rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); in rtw89_phy_dig_reset()
4233 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig()
4234 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig()
4236 if (unlikely(dig->bypass_dig)) { in rtw89_phy_dig()
4237 dig->bypass_dig = false; in rtw89_phy_dig()
4241 if (!dig->is_linked_pre && is_linked) { in rtw89_phy_dig()
4244 } else if (dig->is_linked_pre && !is_linked) { in rtw89_phy_dig()
4248 dig->is_linked_pre = is_linked; in rtw89_phy_dig()
4253 dig->dyn_igi_min = (dig->igi_rssi > IGI_RSSI_MIN) ? in rtw89_phy_dig()
4254 dig->igi_rssi - IGI_RSSI_MIN : 0; in rtw89_phy_dig()
4255 dig->dyn_igi_max = dig->dyn_igi_min + IGI_OFFSET_MAX; in rtw89_phy_dig()
4256 dig->igi_fa_rssi = dig->dyn_igi_min + dig->fa_rssi_ofst; in rtw89_phy_dig()
4258 dig->igi_fa_rssi = clamp(dig->igi_fa_rssi, dig->dyn_igi_min, in rtw89_phy_dig()
4259 dig->dyn_igi_max); in rtw89_phy_dig()
4263 dig->igi_rssi, dig->dyn_igi_max, dig->dyn_igi_min, in rtw89_phy_dig()
4264 dig->igi_fa_rssi); in rtw89_phy_dig()
4268 rtw89_phy_dig_dyn_pd_th(rtwdev, dig->igi_fa_rssi, dig->dyn_pd_th_en); in rtw89_phy_dig()
4270 if (dig->dyn_pd_th_en && dig->igi_fa_rssi > dig->dyn_pd_th_max) in rtw89_phy_dig()
4278 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_phy_tx_path_div_sta_iter()
4279 struct rtw89_dev *rtwdev = rtwsta->rtwdev; in rtw89_phy_tx_path_div_sta_iter()
4280 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_phy_tx_path_div_sta_iter()
4281 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_tx_path_div_sta_iter()
4286 if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION || sta->tdls) in rtw89_phy_tx_path_div_sta_iter()
4294 rssi_a = ewma_rssi_read(&rtwsta->rssi[RF_PATH_A]); in rtw89_phy_tx_path_div_sta_iter()
4295 rssi_b = ewma_rssi_read(&rtwsta->rssi[RF_PATH_B]); in rtw89_phy_tx_path_div_sta_iter()
4304 if (hal->antenna_tx == candidate) in rtw89_phy_tx_path_div_sta_iter()
4307 hal->antenna_tx = candidate; in rtw89_phy_tx_path_div_sta_iter()
4310 if (hal->antenna_tx == RF_A) { in rtw89_phy_tx_path_div_sta_iter()
4313 } else if (hal->antenna_tx == RF_B) { in rtw89_phy_tx_path_div_sta_iter()
4321 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_tx_path_div_track()
4324 if (!hal->tx_path_diversity) in rtw89_phy_tx_path_div_track()
4327 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_tx_path_div_track()
4337 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_set_ant()
4340 if (!hal->ant_diversity || hal->antenna_tx == 0) in rtw89_phy_antdiv_set_ant()
4343 if (hal->antenna_tx == RF_B) { in rtw89_phy_antdiv_set_ant()
4363 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_swap_hal_antenna()
4365 hal->antenna_rx = hal->antenna_rx == RF_A ? RF_B : RF_A; in rtw89_phy_swap_hal_antenna()
4366 hal->antenna_tx = hal->antenna_rx; in rtw89_phy_swap_hal_antenna()
4371 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_decision_state()
4372 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_decision_state()
4378 antdiv->get_stats = false; in rtw89_phy_antdiv_decision_state()
4379 antdiv->training_count = 0; in rtw89_phy_antdiv_decision_state()
4381 main_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
4382 main_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
4383 aux_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
4384 aux_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
4403 hal->antenna_tx = candidate; in rtw89_phy_antdiv_decision_state()
4404 hal->antenna_rx = candidate; in rtw89_phy_antdiv_decision_state()
4409 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_training_state()
4412 if (antdiv->training_count % 2 == 0) { in rtw89_phy_antdiv_training_state()
4413 if (antdiv->training_count == 0) in rtw89_phy_antdiv_training_state()
4416 antdiv->get_stats = true; in rtw89_phy_antdiv_training_state()
4419 antdiv->get_stats = false; in rtw89_phy_antdiv_training_state()
4426 antdiv->training_count++; in rtw89_phy_antdiv_training_state()
4427 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, in rtw89_phy_antdiv_training_state()
4435 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_work()
4437 mutex_lock(&rtwdev->mutex); in rtw89_phy_antdiv_work()
4439 if (antdiv->training_count <= ANTDIV_TRAINNING_CNT) { in rtw89_phy_antdiv_work()
4446 mutex_unlock(&rtwdev->mutex); in rtw89_phy_antdiv_work()
4451 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_track()
4452 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_track()
4455 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_track()
4458 rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->target_stats); in rtw89_phy_antdiv_track()
4459 rssi_pre = antdiv->rssi_pre; in rtw89_phy_antdiv_track()
4460 antdiv->rssi_pre = rssi; in rtw89_phy_antdiv_track()
4461 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_track()
4463 if (abs((int)rssi - (int)rssi_pre) < ANTDIV_RSSI_DIFF_TH) in rtw89_phy_antdiv_track()
4466 antdiv->training_count = 0; in rtw89_phy_antdiv_track()
4467 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, 0); in rtw89_phy_antdiv_track()
4478 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_dm_init()
4495 rtw89_load_txpwr_table(rtwdev, chip->byr_table); in rtw89_phy_dm_init()
4503 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_set_bss_color()
4507 if (!vif->bss_conf.he_support || !vif->cfg.assoc) in rtw89_phy_set_bss_color()
4510 bss_color = vif->bss_conf.he_bss_color.color; in rtw89_phy_set_bss_color()
4512 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_VLD0, 0x1, in rtw89_phy_set_bss_color()
4514 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_TGT, in rtw89_phy_set_bss_color()
4516 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_STAID, in rtw89_phy_set_bss_color()
4517 vif->cfg.aid, phy_idx); in rtw89_phy_set_bss_color()
4523 rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); in _rfk_write_rf()
4529 rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); in _rfk_write32_mask()
4535 rtw89_phy_write32_set(rtwdev, def->addr, def->mask); in _rfk_write32_set()
4541 rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); in _rfk_write32_clr()
4547 udelay(def->data); in _rfk_delay()
4564 const struct rtw89_reg5_def *p = tbl->defs; in rtw89_rfk_parser()
4565 const struct rtw89_reg5_def *end = tbl->defs + tbl->size; in rtw89_rfk_parser()
4568 _rfk_handler[p->flag](rtwdev, p); in rtw89_rfk_parser()
4649 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
4663 data = chip->tssi_dbw_table->data[bandedge_cfg]; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
4715 for (idx = last; idx >= first; idx--) in rtw89_encode_chan_idx()
4726 (central_ch - rtw89_ch_base_table[idx]) >> 1); in rtw89_encode_chan_idx()
4753 u32 reg = rtwdev->chip->edcca_lvl_reg; in rtw89_phy_config_edcca()
4754 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_config_edcca()
4758 hal->edcca_bak = rtw89_phy_read32(rtwdev, reg); in rtw89_phy_config_edcca()
4759 val = hal->edcca_bak; in rtw89_phy_config_edcca()
4765 rtw89_phy_write32(rtwdev, reg, hal->edcca_bak); in rtw89_phy_config_edcca()