91 		rtw89_err(rtwdev, "[ERR]lte not ready(W)\n");  in rtw89_mac_write_lte()
107 		rtw89_err(rtwdev, "[ERR]lte not ready(W)\n");  in rtw89_mac_read_lte()
722 		rtw89_err(rtwdev, "Bad set-err-status value 0x%08x\n", err);  in rtw89_mac_set_err_status()
729 		rtw89_err(rtwdev, "FW doesn't receive previous msg\n");  in rtw89_mac_set_err_status()
1287 			rtw89_err(rtwdev, "firmware failed to ack for %s ps mode\n",  in rtw89_mac_power_mode_change()
1326 		rtw89_err(rtwdev, "MAC has already powered on\n");  in rtw89_mac_power_switch()
1666 		rtw89_err(rtwdev, "[ERR]WDE DLE doesn't support 256 byte!\n");  in dle_mix_cfg()
1683 		rtw89_err(rtwdev, "[ERR]PLE DLE doesn't support 64 byte!\n");  in dle_mix_cfg()
1761 		rtw89_err(rtwdev, "[ERR]support SCC mode only\n");  in rtw89_mac_resize_ple_rx_quota()
1770 		rtw89_err(rtwdev, "[ERR]get_dle_mem_cfg\n");  in rtw89_mac_resize_ple_rx_quota()
1815 		rtw89_err(rtwdev, "[ERR]get_dle_mem_cfg\n");  in dle_init()
1823 			rtw89_err(rtwdev, "[ERR]get_dle_ext_mem_cfg %d\n",  in dle_init()
1833 		rtw89_err(rtwdev, "[ERR]wd/dle mem cfg\n");  in dle_init()
1843 		rtw89_err(rtwdev, "[ERR] dle mix cfg\n");  in dle_init()
1854 		rtw89_err(rtwdev, "[ERR]WDE cfg ready\n");  in dle_init()
1862 		rtw89_err(rtwdev, "[ERR]PLE cfg ready\n");  in dle_init()
1869 	rtw89_err(rtwdev, "[ERR]trxcfg wde 0x8900 = %x\n",  in dle_init()
1871 	rtw89_err(rtwdev, "[ERR]trxcfg ple 0x8D00 = %x\n",  in dle_init()
1970 		rtw89_err(rtwdev, "[ERR]STA scheduler init\n");  in sta_sch_init()
2040 		rtw89_err(rtwdev, "[ERR]DLE init %d\n", ret);  in dmac_init()
2046 		rtw89_err(rtwdev, "[ERR]preload init %d\n", ret);  in dmac_init()
2052 		rtw89_err(rtwdev, "[ERR]HCI FC init %d\n", ret);  in dmac_init()
2058 		rtw89_err(rtwdev, "[ERR]STA SCH init %d\n", ret);  in dmac_init()
2064 		rtw89_err(rtwdev, "[ERR]MPDU Proc init %d\n", ret);  in dmac_init()
2070 		rtw89_err(rtwdev, "[ERR]Security Engine init %d\n", ret);  in dmac_init()
2097 		rtw89_err(rtwdev, "[ERR]ADDR_CAM reset\n");  in addr_cam_init()
2164 		rtw89_err(rtwdev, "[ERR]set rx filter fwd target err\n");  in rtw89_mac_typ_fltr_opt()
2179 		rtw89_err(rtwdev, "[ERR]set rx filter type err\n");  in rtw89_mac_typ_fltr_opt()
2473 		rtw89_err(rtwdev, "[ERR]get_dle_mem_cfg\n");  in is_qta_dbcc()
2548 		rtw89_err(rtwdev, "[ERR]CMAC%d SCH init %d\n", mac_idx, ret);  in cmac_init()
2554 		rtw89_err(rtwdev, "[ERR]CMAC%d ADDR_CAM reset %d\n", mac_idx,  in cmac_init()
2561 		rtw89_err(rtwdev, "[ERR]CMAC%d RX filter init %d\n", mac_idx,  in cmac_init()
2568 		rtw89_err(rtwdev, "[ERR]CMAC%d CCA CTRL init %d\n", mac_idx,  in cmac_init()
2575 		rtw89_err(rtwdev, "[ERR]CMAC%d NAV CTRL init %d\n", mac_idx,  in cmac_init()
2582 		rtw89_err(rtwdev, "[ERR]CMAC%d Spatial Reuse init %d\n",  in cmac_init()
2589 		rtw89_err(rtwdev, "[ERR]CMAC%d TMAC init %d\n", mac_idx, ret);  in cmac_init()
2595 		rtw89_err(rtwdev, "[ERR]CMAC%d TRXPTCL init %d\n", mac_idx, ret);  in cmac_init()
2601 		rtw89_err(rtwdev, "[ERR]CMAC%d RMAC init %d\n", mac_idx, ret);  in cmac_init()
2607 		rtw89_err(rtwdev, "[ERR]CMAC%d Com init %d\n", mac_idx, ret);  in cmac_init()
2613 		rtw89_err(rtwdev, "[ERR]CMAC%d PTCL init %d\n", mac_idx, ret);  in cmac_init()
2619 		rtw89_err(rtwdev, "[ERR]CMAC%d DMA init %d\n", mac_idx, ret);  in cmac_init()
2960 		rtw89_err(rtwdev, "[ERR]wd/dle mem cfg\n");  in dle_quota_change()
2966 		rtw89_err(rtwdev, "[ERR]wd/dle mem cfg\n");  in dle_quota_change()
2974 		rtw89_err(rtwdev, "[ERR]WDE DLE buf req\n");  in dle_quota_change()
2986 		rtw89_err(rtwdev, "[ERR]WDE DLE enqueue to head\n");  in dle_quota_change()
2992 		rtw89_err(rtwdev, "[ERR]PLE DLE buf req\n");  in dle_quota_change()
3004 		rtw89_err(rtwdev, "[ERR]PLE DLE enqueue to head\n");  in dle_quota_change()
3043 		rtw89_err(rtwdev, "[ERR]stop sch tx %d\n", ret);  in band1_enable()
3056 		rtw89_err(rtwdev, "[ERR]tx idle poll %d\n", ret);  in band1_enable()
3062 		rtw89_err(rtwdev, "[ERR]DLE quota change %d\n", ret);  in band1_enable()
3073 		rtw89_err(rtwdev, "[ERR]CMAC1 resume sch tx %d\n", ret);  in band1_enable()
3079 		rtw89_err(rtwdev, "[ERR]CMAC1 func en %d\n", ret);  in band1_enable()
3085 		rtw89_err(rtwdev, "[ERR]CMAC1 init %d\n", ret);  in band1_enable()
3299 		rtw89_err(rtwdev, "MAC%d mac_idx%d is not ready\n",  in rtw89_mac_enable_imr()
3350 			rtw89_err(rtwdev, "[ERR] band1_enable %d\n", ret);  in rtw89_mac_dbcc_enable()
3356 			rtw89_err(rtwdev, "[ERR] enable CMAC1 IMR %d\n", ret);  in rtw89_mac_dbcc_enable()
3360 		rtw89_err(rtwdev, "[ERR] disable dbcc is not implemented not\n");  in rtw89_mac_dbcc_enable()
3394 		rtw89_err(rtwdev, "[ERR]DMAC init %d\n", ret);  in rtw89_mac_trx_init()
3400 		rtw89_err(rtwdev, "[ERR]CMAC%d init %d\n", 0, ret);  in rtw89_mac_trx_init()
3407 			rtw89_err(rtwdev, "[ERR]dbcc_enable init %d\n", ret);  in rtw89_mac_trx_init()
3414 		rtw89_err(rtwdev, "[ERR] enable DMAC IMR %d\n", ret);  in rtw89_mac_trx_init()
3420 		rtw89_err(rtwdev, "[ERR] to enable CMAC0 IMR %d\n", ret);  in rtw89_mac_trx_init()
3428 		rtw89_err(rtwdev, "[ERR] set host rpr %d\n", ret);  in rtw89_mac_trx_init()
3556 		rtw89_err(rtwdev, "[ERR]DLE pre init %d\n", ret);  in rtw89_mac_dmac_pre_init()
3562 		rtw89_err(rtwdev, "[ERR]HCI FC pre init %d\n", ret);  in rtw89_mac_dmac_pre_init()
4764 		rtw89_err(rtwdev, "[TXPWR] addr=0x%x exceed txpwr cr\n",  in rtw89_mac_get_txpwr_cr()
4771 			rtw89_err(rtwdev,  in rtw89_mac_get_txpwr_cr()
4781 	rtw89_err(rtwdev, "[TXPWR] check txpwr cr 0x%x(phy%d) fail\n",  in rtw89_mac_get_txpwr_cr()
4878 		rtw89_err(rtwdev, "Read R_AX_LTE_SW_CFG_2 fail!\n");  in rtw89_mac_coex_init()
4884 		rtw89_err(rtwdev, "Write R_AX_LTE_SW_CFG_2 fail!\n");  in rtw89_mac_coex_init()
5008 		rtw89_err(rtwdev, "Write LTE fail!\n");  in rtw89_mac_cfg_gnt()