Lines Matching +full:0 +full:x0019
10 #define SDIO_LOCAL_OFFSET 0x10250000
11 #define WLAN_IOREG_OFFSET 0x10260000
12 #define FIRMWARE_FIFO_OFFSET 0x10270000
13 #define TX_HIQ_OFFSET 0x10310000
14 #define TX_MIQ_OFFSET 0x10320000
15 #define TX_LOQ_OFFSET 0x10330000
16 #define TX_EPQ_OFFSET 0x10350000
17 #define RX_RX0FF_OFFSET 0x10340000
19 #define RTW_SDIO_BUS_MSK 0xffff0000
20 #define SDIO_LOCAL_REG_MSK 0x00000fff
21 #define WLAN_IOREG_REG_MSK 0x0000ffff
24 #define REG_SDIO_TX_CTRL (SDIO_LOCAL_OFFSET + 0x0000)
27 #define REG_SDIO_TIMEOUT (SDIO_LOCAL_OFFSET + 0x0002)
30 #define REG_SDIO_HIMR (SDIO_LOCAL_OFFSET + 0x0014)
31 #define REG_SDIO_HIMR_RX_REQUEST BIT(0)
56 #define REG_SDIO_HISR (SDIO_LOCAL_OFFSET + 0x0018)
57 #define REG_SDIO_HISR_RX_REQUEST BIT(0)
82 #define REG_SDIO_HCPWM (SDIO_LOCAL_OFFSET + 0x0019)
84 #define REG_SDIO_RX0_REQ_LEN (SDIO_LOCAL_OFFSET + 0x001C)
86 #define REG_SDIO_OQT_FREE_PG (SDIO_LOCAL_OFFSET + 0x001E)
88 #define REG_SDIO_FREE_TXPG (SDIO_LOCAL_OFFSET + 0x0020)
90 #define REG_SDIO_HCPWM1 (SDIO_LOCAL_OFFSET + 0x0024)
92 #define REG_SDIO_HCPWM2 (SDIO_LOCAL_OFFSET + 0x0026)
94 #define REG_SDIO_FREE_TXPG_SEQ (SDIO_LOCAL_OFFSET + 0x0028)
96 #define REG_SDIO_HTSFR_INFO (SDIO_LOCAL_OFFSET + 0x0030)
97 #define REG_SDIO_HCPWM1_V2 (SDIO_LOCAL_OFFSET + 0x0038)
99 #define REG_SDIO_H2C (SDIO_LOCAL_OFFSET + 0x0060)
101 #define REG_SDIO_HRPWM1 (SDIO_LOCAL_OFFSET + 0x0080)
103 #define REG_SDIO_HRPWM2 (SDIO_LOCAL_OFFSET + 0x0082)
105 #define REG_SDIO_HPS_CLKR (SDIO_LOCAL_OFFSET + 0x0084)
107 #define REG_SDIO_HSUS_CTRL (SDIO_LOCAL_OFFSET + 0x0086)
108 #define BIT_HCI_SUS_REQ BIT(0)
111 #define REG_SDIO_HIMR_ON (SDIO_LOCAL_OFFSET + 0x0090)
113 #define REG_SDIO_HISR_ON (SDIO_LOCAL_OFFSET + 0x0091)
115 #define REG_SDIO_INDIRECT_REG_CFG (SDIO_LOCAL_OFFSET + 0x0040)
121 #define REG_SDIO_INDIRECT_REG_DATA (SDIO_LOCAL_OFFSET + 0x0044)
125 #define REG_SDIO_CMD_ADDR_SDIO_REG 0
134 #define RTW_SDIO_ADDR_RX_RX0FF_GEN(_id) (0x0e000 | ((_id) & 0x3))