rtlwifi/rtl8821ae/pwrseq.h

26 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
29 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1 \
32 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
35 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
38 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0 \
41 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},
45 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04 \
48 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04 \
51 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0 \
54 	PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US \
57 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
60 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x2A \
63 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x02, 0 \
66 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
69 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0 \
74 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xc0}, \
76 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xE0}, \
78 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07 \
81 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00 \
84 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xff \
87 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0 \
90 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0 \
93 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, BIT7 \
96 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, BIT0 \
99 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, BIT4 \
102 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x02, 0 \
105 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3 \
110 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
113 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, 0 \
116 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, 0 \
119 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, 0 \
122 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00 \
125 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00 \
130 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
133 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x05 \
136 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xcc}, \
138 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xF0, 0xEC}, \
140 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07 \
143 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00 \
146 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xff \
149 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0 \
152 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, BIT7 \
155 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, BIT0 \
158 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, 0 \
161 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, BIT4 \
164 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x02, 0 \
167 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20 \
170 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
173 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
176 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3 \
181 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0 \
184 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, 0 \
187 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x01, 0 \
190 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, 0 \
193 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00 \
196 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00 \
199 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
202 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
205 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2 \
208 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0 \
213 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7 \
218 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
223 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF \
226 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F \
229 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0 \
232 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0 \
235 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0 \
238 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0 \
241 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04 \
244 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x04 \
247 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0 \
250 	PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US \
253 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
256 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03 \
259 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
262 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \
270 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84 \
273 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84 \
276 	PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS \
279 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0 \
282 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0 \
285 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0 \
288 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
291 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF \
294 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0 \
297 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0 \
371 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0 \
375 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0 \
379 	PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS \
383 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0 \
386 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0 \
389 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , BIT0 \
392 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1 \
395 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , 0 \
398 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0 \
401 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
404 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3), 0 \
407 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0 \
410 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0 \
413 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0 \
416 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4) \
420 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0 \
423 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
426 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
429 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
432 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0 \
435 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
438 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3A \
441 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF , 0x82  \
444 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 , BIT6  \
449 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0 \
452 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0 \
456 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
459 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
462 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0 \
466 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \
470 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0 \
475 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3) \
479 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3 \
482 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4 \
485 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20 \
488 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4 \
499 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0 \
508 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0 \
511 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0 \
516 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20 \
520 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3 \
523 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2 \
526 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1 \
529 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4 \
540 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0 \
549 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0 \
552 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0 \
555 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0 \
558 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0 \
563 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4 \
567 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20 \
570 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0 \
573 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7 \
578 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
583 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF \
586 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF \
589 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0 \
592 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0 \
595 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0 \
598 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0 \
601 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0 \
604 	PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US \
607 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
610 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03 \
613 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
616 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00 \
619 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \
627 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84 \
630 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84 \
633 	PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS \
636 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0 \
639 	PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0 \
642 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0 \
645 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
648 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF \
651 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0 \
654 	PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0 \