Lines Matching refs:digtable

411 	struct dig_t *digtable = &rtlpriv->dm_digtable;  in rtl92s_backoff_enable_flag()  local
414 if (falsealm_cnt->cnt_all > digtable->fa_highthresh) { in rtl92s_backoff_enable_flag()
415 if ((digtable->back_val - 6) < in rtl92s_backoff_enable_flag()
416 digtable->backoffval_range_min) in rtl92s_backoff_enable_flag()
417 digtable->back_val = digtable->backoffval_range_min; in rtl92s_backoff_enable_flag()
419 digtable->back_val -= 6; in rtl92s_backoff_enable_flag()
420 } else if (falsealm_cnt->cnt_all < digtable->fa_lowthresh) { in rtl92s_backoff_enable_flag()
421 if ((digtable->back_val + 6) > in rtl92s_backoff_enable_flag()
422 digtable->backoffval_range_max) in rtl92s_backoff_enable_flag()
423 digtable->back_val = in rtl92s_backoff_enable_flag()
424 digtable->backoffval_range_max; in rtl92s_backoff_enable_flag()
426 digtable->back_val += 6; in rtl92s_backoff_enable_flag()
433 struct dig_t *digtable = &rtlpriv->dm_digtable; in _rtl92s_dm_initial_gain_sta_beforeconnect() local
438 if ((digtable->pre_sta_cstate == digtable->cur_sta_cstate) || in _rtl92s_dm_initial_gain_sta_beforeconnect()
439 (digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT)) { in _rtl92s_dm_initial_gain_sta_beforeconnect()
440 if (digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT) { in _rtl92s_dm_initial_gain_sta_beforeconnect()
444 if (digtable->backoff_enable_flag) in _rtl92s_dm_initial_gain_sta_beforeconnect()
447 digtable->back_val = DM_DIG_BACKOFF_MAX; in _rtl92s_dm_initial_gain_sta_beforeconnect()
449 if ((digtable->rssi_val + 10 - digtable->back_val) > in _rtl92s_dm_initial_gain_sta_beforeconnect()
450 digtable->rx_gain_max) in _rtl92s_dm_initial_gain_sta_beforeconnect()
451 digtable->cur_igvalue = in _rtl92s_dm_initial_gain_sta_beforeconnect()
452 digtable->rx_gain_max; in _rtl92s_dm_initial_gain_sta_beforeconnect()
453 else if ((digtable->rssi_val + 10 - digtable->back_val) in _rtl92s_dm_initial_gain_sta_beforeconnect()
454 < digtable->rx_gain_min) in _rtl92s_dm_initial_gain_sta_beforeconnect()
455 digtable->cur_igvalue = in _rtl92s_dm_initial_gain_sta_beforeconnect()
456 digtable->rx_gain_min; in _rtl92s_dm_initial_gain_sta_beforeconnect()
458 digtable->cur_igvalue = digtable->rssi_val + 10 in _rtl92s_dm_initial_gain_sta_beforeconnect()
459 - digtable->back_val; in _rtl92s_dm_initial_gain_sta_beforeconnect()
462 digtable->cur_igvalue = in _rtl92s_dm_initial_gain_sta_beforeconnect()
463 (digtable->cur_igvalue > 0x33) ? in _rtl92s_dm_initial_gain_sta_beforeconnect()
464 digtable->cur_igvalue : 0x33; in _rtl92s_dm_initial_gain_sta_beforeconnect()
467 digtable->cur_igvalue = in _rtl92s_dm_initial_gain_sta_beforeconnect()
468 digtable->rx_gain_max; in _rtl92s_dm_initial_gain_sta_beforeconnect()
478 digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; in _rtl92s_dm_initial_gain_sta_beforeconnect()
481 digtable->back_val = DM_DIG_BACKOFF_MAX; in _rtl92s_dm_initial_gain_sta_beforeconnect()
482 digtable->cur_igvalue = rtlpriv->phy.default_initialgain[0]; in _rtl92s_dm_initial_gain_sta_beforeconnect()
483 digtable->pre_igvalue = 0; in _rtl92s_dm_initial_gain_sta_beforeconnect()
488 if (digtable->pre_igvalue != rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, in _rtl92s_dm_initial_gain_sta_beforeconnect()
492 if ((digtable->pre_igvalue != digtable->cur_igvalue) || in _rtl92s_dm_initial_gain_sta_beforeconnect()
497 initial_gain = (u8)digtable->cur_igvalue; in _rtl92s_dm_initial_gain_sta_beforeconnect()
502 digtable->pre_igvalue = digtable->cur_igvalue; in _rtl92s_dm_initial_gain_sta_beforeconnect()
544 struct dig_t *digtable = &rtlpriv->dm_digtable; in _rtl92s_dm_ctrl_initgain_byrssi() local
553 if (digtable->dig_enable_flag == false) in _rtl92s_dm_ctrl_initgain_byrssi()
630 struct dig_t *digtable = &rtlpriv->dm_digtable; in _rtl92s_dm_init_dig() local
633 digtable->dig_enable_flag = true; in _rtl92s_dm_init_dig()
634 digtable->backoff_enable_flag = true; in _rtl92s_dm_init_dig()
638 digtable->dig_algorithm = DIG_ALGO_BY_TOW_PORT; in _rtl92s_dm_init_dig()
640 digtable->dig_algorithm = in _rtl92s_dm_init_dig()
643 digtable->dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI; in _rtl92s_dm_init_dig()
644 digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; in _rtl92s_dm_init_dig()
646 digtable->dig_dbgmode = DM_DBG_OFF; in _rtl92s_dm_init_dig()
647 digtable->dig_slgorithm_switch = 0; in _rtl92s_dm_init_dig()
650 digtable->dig_state = DM_STA_DIG_MAX; in _rtl92s_dm_init_dig()
651 digtable->dig_highpwrstate = DM_STA_DIG_MAX; in _rtl92s_dm_init_dig()
653 digtable->cur_sta_cstate = DIG_STA_DISCONNECT; in _rtl92s_dm_init_dig()
654 digtable->pre_sta_cstate = DIG_STA_DISCONNECT; in _rtl92s_dm_init_dig()
655 digtable->cur_ap_cstate = DIG_AP_DISCONNECT; in _rtl92s_dm_init_dig()
656 digtable->pre_ap_cstate = DIG_AP_DISCONNECT; in _rtl92s_dm_init_dig()
658 digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; in _rtl92s_dm_init_dig()
659 digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; in _rtl92s_dm_init_dig()
661 digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW; in _rtl92s_dm_init_dig()
662 digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH; in _rtl92s_dm_init_dig()
664 digtable->rssi_highpower_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW; in _rtl92s_dm_init_dig()
665 digtable->rssi_highpower_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH; in _rtl92s_dm_init_dig()
668 digtable->rssi_val = 50; in _rtl92s_dm_init_dig()
669 digtable->back_val = DM_DIG_BACKOFF_MAX; in _rtl92s_dm_init_dig()
670 digtable->rx_gain_max = DM_DIG_MAX; in _rtl92s_dm_init_dig()
672 digtable->rx_gain_min = DM_DIG_MIN; in _rtl92s_dm_init_dig()
674 digtable->backoffval_range_max = DM_DIG_BACKOFF_MAX; in _rtl92s_dm_init_dig()
675 digtable->backoffval_range_min = DM_DIG_BACKOFF_MIN; in _rtl92s_dm_init_dig()