Lines Matching refs:val32
482 u32 val32, value = 0xffffffff; in rtl8710b_indirect_read32() local
497 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_indirect_read32()
498 while ((val32 & BIT(31)) && (--polling_count > 0)); in rtl8710b_indirect_read32()
502 __func__, addr, val32); in rtl8710b_indirect_read32()
518 u32 val32; in rtl8710b_indirect_write32() local
533 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_indirect_write32()
534 while ((val32 & BIT(31)) && (--polling_count > 0)); in rtl8710b_indirect_write32()
538 __func__, val, addr, val32); in rtl8710b_indirect_write32()
558 u32 val32; in rtl8710b_read_efuse8() local
567 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_read_efuse8()
569 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_read_efuse8()
570 if (!(val32 & BIT(31))) in rtl8710b_read_efuse8()
577 val32 = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B); in rtl8710b_read_efuse8()
579 *data = val32 & 0xff; in rtl8710b_read_efuse8()
700 u32 val32; in rtl8710bu_config_channel() local
716 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
717 u32p_replace_bits(&val32, channel, MODE_AG_CHANNEL_MASK); in rtl8710bu_config_channel()
718 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
731 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
732 u32p_replace_bits(&val32, ht40, FPGA_RF_MODE); in rtl8710bu_config_channel()
733 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
735 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE); in rtl8710bu_config_channel()
736 u32p_replace_bits(&val32, ht40, FPGA_RF_MODE); in rtl8710bu_config_channel()
737 rtl8xxxu_write32(priv, REG_FPGA1_RF_MODE, val32); in rtl8710bu_config_channel()
741 val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM); in rtl8710bu_config_channel()
742 u32p_replace_bits(&val32, !sec_ch_above, CCK0_SIDEBAND); in rtl8710bu_config_channel()
743 rtl8xxxu_write32(priv, REG_CCK0_SYSTEM, val32); in rtl8710bu_config_channel()
747 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
748 val32 |= GENMASK(10, 8); in rtl8710bu_config_channel()
749 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
752 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
753 val32 |= BIT(14) | BIT(12); in rtl8710bu_config_channel()
754 val32 &= ~BIT(13); in rtl8710bu_config_channel()
755 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
758 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT); in rtl8710bu_config_channel()
759 val32 &= ~GENMASK(31, 30); in rtl8710bu_config_channel()
760 rtl8xxxu_write32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT, val32); in rtl8710bu_config_channel()
763 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT); in rtl8710bu_config_channel()
764 val32 &= ~BIT(29); in rtl8710bu_config_channel()
765 val32 |= BIT(28); in rtl8710bu_config_channel()
766 rtl8xxxu_write32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT, val32); in rtl8710bu_config_channel()
769 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_RX_AFE); in rtl8710bu_config_channel()
770 val32 &= ~BIT(29); in rtl8710bu_config_channel()
771 val32 |= BIT(28); in rtl8710bu_config_channel()
772 rtl8xxxu_write32(priv, REG_OFDM0_XA_RX_AFE, val32); in rtl8710bu_config_channel()
774 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_RF_INT_OE); in rtl8710bu_config_channel()
775 val32 &= ~BIT(30); in rtl8710bu_config_channel()
776 val32 |= BIT(29); in rtl8710bu_config_channel()
777 rtl8xxxu_write32(priv, REG_FPGA0_XB_RF_INT_OE, val32); in rtl8710bu_config_channel()
780 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
781 val32 &= ~BIT(19); in rtl8710bu_config_channel()
782 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
784 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
785 val32 &= ~GENMASK(23, 20); in rtl8710bu_config_channel()
786 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
788 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
789 val32 &= ~GENMASK(27, 24); in rtl8710bu_config_channel()
790 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
793 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
794 val32 &= ~MODE_AG_BW_MASK; in rtl8710bu_config_channel()
795 val32 |= MODE_AG_BW_40MHZ_8723B; in rtl8710bu_config_channel()
796 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
798 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
799 val32 |= BIT(19); in rtl8710bu_config_channel()
800 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
802 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
803 val32 &= ~GENMASK(23, 20); in rtl8710bu_config_channel()
804 val32 |= BIT(23); in rtl8710bu_config_channel()
805 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
807 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
808 val32 &= ~GENMASK(27, 24); in rtl8710bu_config_channel()
809 val32 |= BIT(27) | BIT(25); in rtl8710bu_config_channel()
810 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
813 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
814 val32 &= ~MODE_AG_BW_MASK; in rtl8710bu_config_channel()
815 val32 |= MODE_AG_BW_20MHZ_8723B; in rtl8710bu_config_channel()
816 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
839 u32 val32; in rtl8710bu_init_statistics() local
848 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_init_statistics()
849 val32 |= 0xff; in rtl8710bu_init_statistics()
850 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_init_statistics()
853 val32 = rtl8xxxu_read32(priv, REG_NHM_TH9_TH10_8723B); in rtl8710bu_init_statistics()
854 val32 &= ~(BIT(8) | BIT(9) | BIT(10)); in rtl8710bu_init_statistics()
855 val32 |= BIT(8); in rtl8710bu_init_statistics()
856 rtl8xxxu_write32(priv, REG_NHM_TH9_TH10_8723B, val32); in rtl8710bu_init_statistics()
859 val32 = rtl8xxxu_read32(priv, REG_OFDM0_FA_RSTC); in rtl8710bu_init_statistics()
860 val32 |= BIT(7); in rtl8710bu_init_statistics()
861 rtl8xxxu_write32(priv, REG_OFDM0_FA_RSTC, val32); in rtl8710bu_init_statistics()
870 u32 val32; in rtl8710b_read_efuse() local
872 val32 = rtl8710b_read_syson_reg(priv, REG_SYS_EEPROM_CTRL0_8710B); in rtl8710b_read_efuse()
873 priv->boot_eeprom = u32_get_bits(val32, EEPROM_BOOT); in rtl8710b_read_efuse()
874 priv->has_eeprom = u32_get_bits(val32, EEPROM_ENABLE); in rtl8710b_read_efuse()
978 u32 val32; in rtl8710bu_init_phy_bb() local
981 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_init_phy_bb()
982 val32 |= GENMASK(17, 16) | GENMASK(26, 24); in rtl8710bu_init_phy_bb()
983 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_init_phy_bb()
1009 u32 reg_eac, reg_e94, reg_e9c, val32, path_sel_bb; in rtl8710bu_iqk_path_a() local
1019 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1020 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_iqk_path_a()
1021 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1026 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_iqk_path_a()
1027 val32 |= 0x80000; in rtl8710bu_iqk_path_a()
1028 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_iqk_path_a()
1034 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_iqk_path_a()
1035 val32 |= BIT(11); in rtl8710bu_iqk_path_a()
1036 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_iqk_path_a()
1037 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_iqk_path_a()
1038 u32p_replace_bits(&val32, 0x1ed, 0x00fff); in rtl8710bu_iqk_path_a()
1039 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_iqk_path_a()
1042 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1043 u32p_replace_bits(&val32, 0x808000, 0xffffff00); in rtl8710bu_iqk_path_a()
1044 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1067 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1068 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_iqk_path_a()
1069 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1071 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_iqk_path_a()
1072 val32 &= ~BIT(11); in rtl8710bu_iqk_path_a()
1073 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_iqk_path_a()
1093 u32 reg_ea4, reg_eac, reg_e94, reg_e9c, val32, path_sel_bb, tmp; in rtl8710bu_rx_iqk_path_a() local
1103 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1104 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1105 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1108 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_rx_iqk_path_a()
1109 val32 |= 0x80000; in rtl8710bu_rx_iqk_path_a()
1110 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_rx_iqk_path_a()
1116 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1117 val32 |= BIT(11); in rtl8710bu_rx_iqk_path_a()
1118 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1119 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_rx_iqk_path_a()
1120 u32p_replace_bits(&val32, 0xf, 0x003e0); in rtl8710bu_rx_iqk_path_a()
1121 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_rx_iqk_path_a()
1126 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1127 u32p_replace_bits(&val32, 0x808000, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1128 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1169 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1170 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1171 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1173 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1174 val32 &= ~BIT(11); in rtl8710bu_rx_iqk_path_a()
1175 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1180 val32 = 0x80007c00 | (reg_e94 & 0x3ff0000) | ((reg_e9c & 0x3ff0000) >> 16); in rtl8710bu_rx_iqk_path_a()
1181 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1186 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1187 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1188 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1190 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_rx_iqk_path_a()
1191 val32 |= 0x80000; in rtl8710bu_rx_iqk_path_a()
1192 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_rx_iqk_path_a()
1200 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1201 val32 |= BIT(11); in rtl8710bu_rx_iqk_path_a()
1202 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1203 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_rx_iqk_path_a()
1204 u32p_replace_bits(&val32, 0x2a, 0x00fff); in rtl8710bu_rx_iqk_path_a()
1205 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_rx_iqk_path_a()
1210 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1211 u32p_replace_bits(&val32, 0x808000, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1212 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1240 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1241 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1242 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1244 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1245 val32 &= ~BIT(11); in rtl8710bu_rx_iqk_path_a()
1246 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1274 u32 i, val32, rx_initial_gain, lok_result; in rtl8710bu_phy_iqcalibrate() local
1318 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM1); in rtl8710bu_phy_iqcalibrate()
1319 priv->pi_enabled = u32_get_bits(val32, FPGA0_HSSI_PARM1_PI); in rtl8710bu_phy_iqcalibrate()
1329 val32 = rtl8xxxu_read32(priv, REG_TX_PTCL_CTRL); in rtl8710bu_phy_iqcalibrate()
1330 val32 |= 0x00ff0000; in rtl8710bu_phy_iqcalibrate()
1331 rtl8xxxu_write32(priv, REG_TX_PTCL_CTRL, val32); in rtl8710bu_phy_iqcalibrate()
1338 val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING); in rtl8710bu_phy_iqcalibrate()
1339 val32 |= 0x0f000000; in rtl8710bu_phy_iqcalibrate()
1340 rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32); in rtl8710bu_phy_iqcalibrate()
1347 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_phy_iqcalibrate()
1348 u32p_replace_bits(&val32, 0x808000, 0xffffff00); in rtl8710bu_phy_iqcalibrate()
1349 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_phy_iqcalibrate()
1357 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A); in rtl8710bu_phy_iqcalibrate()
1358 result[t][0] = (val32 >> 16) & 0x3ff; in rtl8710bu_phy_iqcalibrate()
1360 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A); in rtl8710bu_phy_iqcalibrate()
1361 result[t][1] = (val32 >> 16) & 0x3ff; in rtl8710bu_phy_iqcalibrate()
1373 val32 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2); in rtl8710bu_phy_iqcalibrate()
1374 result[t][2] = (val32 >> 16) & 0x3ff; in rtl8710bu_phy_iqcalibrate()
1376 val32 = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8710bu_phy_iqcalibrate()
1377 result[t][3] = (val32 >> 16) & 0x3ff; in rtl8710bu_phy_iqcalibrate()
1389 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_phy_iqcalibrate()
1390 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_phy_iqcalibrate()
1391 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_phy_iqcalibrate()
1410 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1411 u32p_replace_bits(&val32, 0x50, 0x000000ff); in rtl8710bu_phy_iqcalibrate()
1412 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8710bu_phy_iqcalibrate()
1413 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1414 u32p_replace_bits(&val32, rx_initial_gain & 0xff, 0x000000ff); in rtl8710bu_phy_iqcalibrate()
1415 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8710bu_phy_iqcalibrate()
1534 u32 val32; in rtl8710bu_active_to_emu() local
1538 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_active_to_emu()
1539 val32 &= ~GENMASK(26, 24); in rtl8710bu_active_to_emu()
1540 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_active_to_emu()
1543 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_active_to_emu()
1544 val32 &= ~GENMASK(17, 16); in rtl8710bu_active_to_emu()
1545 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_active_to_emu()
1572 u32 val32; in rtl8710bu_active_to_lps() local
1584 val32 = rtl8xxxu_read32(priv, REG_SCH_TX_CMD); in rtl8710bu_active_to_lps()
1585 if (!val32) { in rtl8710bu_active_to_lps()
1627 u32 val32; in rtl8710bu_power_on() local
1684 val32 = rtl8710b_read_syson_reg(priv, 0x138); in rtl8710bu_power_on()
1685 val32 &= ~BIT(5); in rtl8710bu_power_on()
1686 rtl8710b_write_syson_reg(priv, 0x138, val32); in rtl8710bu_power_on()
1693 u32 val32; in rtl8710bu_power_off() local
1702 val32 = rtl8710b_read_syson_reg(priv, 0x138); in rtl8710bu_power_off()
1703 val32 |= BIT(5); in rtl8710bu_power_off()
1704 rtl8710b_write_syson_reg(priv, 0x138, val32); in rtl8710bu_power_off()
1739 u32 val32; in rtl8710b_enable_rf() local
1743 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_enable_rf()
1744 val32 &= ~(OFDM_RF_PATH_RX_MASK | OFDM_RF_PATH_TX_MASK); in rtl8710b_enable_rf()
1745 val32 |= OFDM_RF_PATH_RX_A | OFDM_RF_PATH_TX_A; in rtl8710b_enable_rf()
1746 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_enable_rf()
1753 u32 val32; in rtl8710b_disable_rf() local
1755 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_disable_rf()
1756 val32 &= ~OFDM_RF_PATH_TX_MASK; in rtl8710b_disable_rf()
1757 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_disable_rf()
1780 u32 val32; in rtl8710b_set_crystal_cap() local
1785 val32 = rtl8710b_read_syson_reg(priv, REG_SYS_XTAL_CTRL0_8710B); in rtl8710b_set_crystal_cap()
1791 u32_get_bits(val32, XTAL1), in rtl8710b_set_crystal_cap()
1792 u32_get_bits(val32, XTAL0), in rtl8710b_set_crystal_cap()
1795 u32p_replace_bits(&val32, crystal_cap, XTAL1); in rtl8710b_set_crystal_cap()
1796 u32p_replace_bits(&val32, crystal_cap, XTAL0); in rtl8710b_set_crystal_cap()
1797 rtl8710b_write_syson_reg(priv, REG_SYS_XTAL_CTRL0_8710B, val32); in rtl8710b_set_crystal_cap()