Lines Matching refs:rt2x00mmio_register_write
63 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_write()
91 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_read()
121 rt2x00mmio_register_write(rt2x00dev, RFCSR, reg); in rt2500pci_rf_write()
155 rt2x00mmio_register_write(rt2x00dev, CSR21, reg); in rt2500pci_eepromregister_write()
163 .write = rt2x00mmio_register_write,
217 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2500pci_brightness_set()
231 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2500pci_blink_set()
278 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_config_filter()
298 rt2x00mmio_register_write(rt2x00dev, BCNCSR1, reg); in rt2500pci_config_intf()
305 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_config_intf()
335 rt2x00mmio_register_write(rt2x00dev, TXCSR1, reg); in rt2500pci_config_erp()
342 rt2x00mmio_register_write(rt2x00dev, ARCSR2, reg); in rt2500pci_config_erp()
349 rt2x00mmio_register_write(rt2x00dev, ARCSR3, reg); in rt2500pci_config_erp()
356 rt2x00mmio_register_write(rt2x00dev, ARCSR4, reg); in rt2500pci_config_erp()
363 rt2x00mmio_register_write(rt2x00dev, ARCSR5, reg); in rt2500pci_config_erp()
367 rt2x00mmio_register_write(rt2x00dev, ARCSR1, erp->basic_rates); in rt2500pci_config_erp()
372 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_config_erp()
377 rt2x00mmio_register_write(rt2x00dev, CSR18, reg); in rt2500pci_config_erp()
382 rt2x00mmio_register_write(rt2x00dev, CSR19, reg); in rt2500pci_config_erp()
391 rt2x00mmio_register_write(rt2x00dev, CSR12, reg); in rt2500pci_config_erp()
462 rt2x00mmio_register_write(rt2x00dev, BBPCSR1, reg); in rt2500pci_config_ant()
556 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_config_retry_limit()
576 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
579 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
583 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
725 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_start_queue()
732 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_start_queue()
748 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
753 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
758 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
776 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_stop_queue()
781 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_stop_queue()
788 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_stop_queue()
855 rt2x00mmio_register_write(rt2x00dev, TXCSR2, reg); in rt2500pci_init_queues()
861 rt2x00mmio_register_write(rt2x00dev, TXCSR3, reg); in rt2500pci_init_queues()
867 rt2x00mmio_register_write(rt2x00dev, TXCSR5, reg); in rt2500pci_init_queues()
873 rt2x00mmio_register_write(rt2x00dev, TXCSR4, reg); in rt2500pci_init_queues()
879 rt2x00mmio_register_write(rt2x00dev, TXCSR6, reg); in rt2500pci_init_queues()
884 rt2x00mmio_register_write(rt2x00dev, RXCSR1, reg); in rt2500pci_init_queues()
890 rt2x00mmio_register_write(rt2x00dev, RXCSR2, reg); in rt2500pci_init_queues()
899 rt2x00mmio_register_write(rt2x00dev, PSCSR0, 0x00020002); in rt2500pci_init_registers()
900 rt2x00mmio_register_write(rt2x00dev, PSCSR1, 0x00000002); in rt2500pci_init_registers()
901 rt2x00mmio_register_write(rt2x00dev, PSCSR2, 0x00020002); in rt2500pci_init_registers()
902 rt2x00mmio_register_write(rt2x00dev, PSCSR3, 0x00000002); in rt2500pci_init_registers()
908 rt2x00mmio_register_write(rt2x00dev, TIMECSR, reg); in rt2500pci_init_registers()
913 rt2x00mmio_register_write(rt2x00dev, CSR9, reg); in rt2500pci_init_registers()
920 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_init_registers()
931 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_init_registers()
933 rt2x00mmio_register_write(rt2x00dev, CNT3, 0); in rt2500pci_init_registers()
944 rt2x00mmio_register_write(rt2x00dev, TXCSR8, reg); in rt2500pci_init_registers()
951 rt2x00mmio_register_write(rt2x00dev, ARTCSR0, reg); in rt2500pci_init_registers()
958 rt2x00mmio_register_write(rt2x00dev, ARTCSR1, reg); in rt2500pci_init_registers()
965 rt2x00mmio_register_write(rt2x00dev, ARTCSR2, reg); in rt2500pci_init_registers()
976 rt2x00mmio_register_write(rt2x00dev, RXCSR3, reg); in rt2500pci_init_registers()
986 rt2x00mmio_register_write(rt2x00dev, PCICSR, reg); in rt2500pci_init_registers()
988 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0x3f3b3100); in rt2500pci_init_registers()
990 rt2x00mmio_register_write(rt2x00dev, GPIOCSR, 0x0000ff00); in rt2500pci_init_registers()
991 rt2x00mmio_register_write(rt2x00dev, TESTCSR, 0x000000f0); in rt2500pci_init_registers()
996 rt2x00mmio_register_write(rt2x00dev, MACCSR0, 0x00213223); in rt2500pci_init_registers()
997 rt2x00mmio_register_write(rt2x00dev, MACCSR1, 0x00235518); in rt2500pci_init_registers()
1001 rt2x00mmio_register_write(rt2x00dev, MACCSR2, reg); in rt2500pci_init_registers()
1010 rt2x00mmio_register_write(rt2x00dev, RALINKCSR, reg); in rt2500pci_init_registers()
1012 rt2x00mmio_register_write(rt2x00dev, BBPCSR1, 0x82188200); in rt2500pci_init_registers()
1014 rt2x00mmio_register_write(rt2x00dev, TXACKCSR0, 0x00000020); in rt2500pci_init_registers()
1020 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2500pci_init_registers()
1025 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2500pci_init_registers()
1124 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2500pci_toggle_irq()
1139 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_toggle_irq()
1171 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0); in rt2500pci_disable_radio()
1190 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2500pci_set_state()
1203 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2500pci_set_state()
1329 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_write_beacon()
1350 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_write_beacon()
1445 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_enable_interrupt()
1473 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_txstatus_tasklet()
1507 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2500pci_interrupt()
1546 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_interrupt()
1954 rt2x00mmio_register_write(rt2x00dev, GPIOCSR, reg); in rt2500pci_probe_hw()