Lines Matching refs:rt2x00mmio_register_write
63 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2400pci_bbp_write()
91 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2400pci_bbp_read()
121 rt2x00mmio_register_write(rt2x00dev, RFCSR, reg); in rt2400pci_rf_write()
155 rt2x00mmio_register_write(rt2x00dev, CSR21, reg); in rt2400pci_eepromregister_write()
163 .write = rt2x00mmio_register_write,
217 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2400pci_brightness_set()
231 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2400pci_blink_set()
274 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2400pci_config_filter()
292 rt2x00mmio_register_write(rt2x00dev, BCNCSR1, reg); in rt2400pci_config_intf()
299 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_config_intf()
330 rt2x00mmio_register_write(rt2x00dev, TXCSR1, reg); in rt2400pci_config_erp()
337 rt2x00mmio_register_write(rt2x00dev, ARCSR2, reg); in rt2400pci_config_erp()
344 rt2x00mmio_register_write(rt2x00dev, ARCSR3, reg); in rt2400pci_config_erp()
351 rt2x00mmio_register_write(rt2x00dev, ARCSR4, reg); in rt2400pci_config_erp()
358 rt2x00mmio_register_write(rt2x00dev, ARCSR5, reg); in rt2400pci_config_erp()
362 rt2x00mmio_register_write(rt2x00dev, ARCSR1, erp->basic_rates); in rt2400pci_config_erp()
367 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2400pci_config_erp()
372 rt2x00mmio_register_write(rt2x00dev, CSR18, reg); in rt2400pci_config_erp()
377 rt2x00mmio_register_write(rt2x00dev, CSR19, reg); in rt2400pci_config_erp()
386 rt2x00mmio_register_write(rt2x00dev, CSR12, reg); in rt2400pci_config_erp()
508 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2400pci_config_retry_limit()
528 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2400pci_config_ps()
531 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2400pci_config_ps()
535 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2400pci_config_ps()
564 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2400pci_config_cw()
636 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2400pci_start_queue()
643 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_start_queue()
659 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2400pci_kick_queue()
664 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2400pci_kick_queue()
669 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2400pci_kick_queue()
687 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2400pci_stop_queue()
692 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2400pci_stop_queue()
699 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_stop_queue()
770 rt2x00mmio_register_write(rt2x00dev, TXCSR2, reg); in rt2400pci_init_queues()
776 rt2x00mmio_register_write(rt2x00dev, TXCSR3, reg); in rt2400pci_init_queues()
782 rt2x00mmio_register_write(rt2x00dev, TXCSR5, reg); in rt2400pci_init_queues()
788 rt2x00mmio_register_write(rt2x00dev, TXCSR4, reg); in rt2400pci_init_queues()
794 rt2x00mmio_register_write(rt2x00dev, TXCSR6, reg); in rt2400pci_init_queues()
799 rt2x00mmio_register_write(rt2x00dev, RXCSR1, reg); in rt2400pci_init_queues()
805 rt2x00mmio_register_write(rt2x00dev, RXCSR2, reg); in rt2400pci_init_queues()
814 rt2x00mmio_register_write(rt2x00dev, PSCSR0, 0x00020002); in rt2400pci_init_registers()
815 rt2x00mmio_register_write(rt2x00dev, PSCSR1, 0x00000002); in rt2400pci_init_registers()
816 rt2x00mmio_register_write(rt2x00dev, PSCSR2, 0x00023f20); in rt2400pci_init_registers()
817 rt2x00mmio_register_write(rt2x00dev, PSCSR3, 0x00000002); in rt2400pci_init_registers()
823 rt2x00mmio_register_write(rt2x00dev, TIMECSR, reg); in rt2400pci_init_registers()
828 rt2x00mmio_register_write(rt2x00dev, CSR9, reg); in rt2400pci_init_registers()
839 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_init_registers()
841 rt2x00mmio_register_write(rt2x00dev, CNT3, 0x3f080000); in rt2400pci_init_registers()
848 rt2x00mmio_register_write(rt2x00dev, ARCSR0, reg); in rt2400pci_init_registers()
857 rt2x00mmio_register_write(rt2x00dev, RXCSR3, reg); in rt2400pci_init_registers()
859 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0x3f3b3100); in rt2400pci_init_registers()
864 rt2x00mmio_register_write(rt2x00dev, MACCSR0, 0x00217223); in rt2400pci_init_registers()
865 rt2x00mmio_register_write(rt2x00dev, MACCSR1, 0x00235518); in rt2400pci_init_registers()
869 rt2x00mmio_register_write(rt2x00dev, MACCSR2, reg); in rt2400pci_init_registers()
876 rt2x00mmio_register_write(rt2x00dev, RALINKCSR, reg); in rt2400pci_init_registers()
882 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2400pci_init_registers()
887 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2400pci_init_registers()
970 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2400pci_toggle_irq()
985 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2400pci_toggle_irq()
1018 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0); in rt2400pci_disable_radio()
1037 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2400pci_set_state()
1050 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2400pci_set_state()
1177 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_write_beacon()
1201 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_write_beacon()
1317 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2400pci_enable_interrupt()
1345 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2400pci_txstatus_tasklet()
1379 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2400pci_interrupt()
1418 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2400pci_interrupt()
1629 rt2x00mmio_register_write(rt2x00dev, GPIOCSR, reg); in rt2400pci_probe_hw()