17 mt76x0_set_wlan_state(struct mt76x02_dev *dev, u32 val, bool enable)  in mt76x0_set_wlan_state()  argument
33 	mt76_wr(dev, MT_WLAN_FUN_CTRL, val);  in mt76x0_set_wlan_state()
40 	if (enable && !mt76_poll(dev, MT_CMB_CTRL, mask, mask, 2000))  in mt76x0_set_wlan_state()
41 		dev_err(dev->mt76.dev, "PLL and XTAL check failed\n");  in mt76x0_set_wlan_state()
44 void mt76x0_chip_onoff(struct mt76x02_dev *dev, bool enable, bool reset)  in mt76x0_chip_onoff()  argument
48 	val = mt76_rr(dev, MT_WLAN_FUN_CTRL);  in mt76x0_chip_onoff()
57 			mt76_wr(dev, MT_WLAN_FUN_CTRL, val);  in mt76x0_chip_onoff()
65 	mt76_wr(dev, MT_WLAN_FUN_CTRL, val);  in mt76x0_chip_onoff()
68 	mt76x0_set_wlan_state(dev, val, enable);  in mt76x0_chip_onoff()
72 static void mt76x0_reset_csr_bbp(struct mt76x02_dev *dev)  in mt76x0_reset_csr_bbp()  argument
74 	mt76_wr(dev, MT_MAC_SYS_CTRL,  in mt76x0_reset_csr_bbp()
78 	mt76_clear(dev, MT_MAC_SYS_CTRL,  in mt76x0_reset_csr_bbp()
83 #define RANDOM_WRITE(dev, tab)			\  argument
84 	mt76_wr_rp(dev, MT_MCU_MEMMAP_WLAN,	\
87 static int mt76x0_init_bbp(struct mt76x02_dev *dev)  in mt76x0_init_bbp()  argument
91 	ret = mt76x0_phy_wait_bbp_ready(dev);  in mt76x0_init_bbp()
95 	RANDOM_WRITE(dev, mt76x0_bbp_init_tab);  in mt76x0_init_bbp()
102 			mt76_wr(dev, pair->reg, pair->value);  in mt76x0_init_bbp()
105 	RANDOM_WRITE(dev, mt76x0_dcoc_tab);  in mt76x0_init_bbp()
110 static void mt76x0_init_mac_registers(struct mt76x02_dev *dev)  in mt76x0_init_mac_registers()  argument
112 	RANDOM_WRITE(dev, common_mac_reg_table);  in mt76x0_init_mac_registers()
115 	RANDOM_WRITE(dev, mt76x0_mac_reg_table);  in mt76x0_init_mac_registers()
118 	mt76_clear(dev, MT_MAC_SYS_CTRL, 0x3);  in mt76x0_init_mac_registers()
121 	mt76_set(dev, MT_EXT_CCA_CFG, 0xf000);  in mt76x0_init_mac_registers()
123 	mt76_clear(dev, MT_FCE_L2_STUFF, MT_FCE_L2_STUFF_WR_MPDU_LEN_EN);  in mt76x0_init_mac_registers()
133 	mt76_rmw(dev, MT_WMM_CTRL, 0x3ff, 0x201);  in mt76x0_init_mac_registers()
136 void mt76x0_mac_stop(struct mt76x02_dev *dev)  in mt76x0_mac_stop()  argument
140 	mt76_clear(dev, MT_TXOP_CTRL_CFG, MT_TXOP_ED_CCA_EN);  in mt76x0_mac_stop()
143 	while (i-- && ((mt76_rr(dev, 0x0438) & 0xffffffff) ||  in mt76x0_mac_stop()
144 		       (mt76_rr(dev, 0x0a30) & 0x000000ff) ||  in mt76x0_mac_stop()
145 		       (mt76_rr(dev, 0x0a34) & 0x00ff00ff)))  in mt76x0_mac_stop()
148 	if (!mt76_poll(dev, MT_MAC_STATUS, MT_MAC_STATUS_TX, 0, 1000))  in mt76x0_mac_stop()
149 		dev_warn(dev->mt76.dev, "Warning: MAC TX did not stop!\n");  in mt76x0_mac_stop()
151 	mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_RX |  in mt76x0_mac_stop()
156 		if (!(mt76_rr(dev, MT_RXQ_STA) & 0x00ff0000) &&  in mt76x0_mac_stop()
157 		    !mt76_rr(dev, 0x0a30) &&  in mt76x0_mac_stop()
158 		    !mt76_rr(dev, 0x0a34)) {  in mt76x0_mac_stop()
166 	if (!mt76_poll(dev, MT_MAC_STATUS, MT_MAC_STATUS_RX, 0, 1000))  in mt76x0_mac_stop()
167 		dev_warn(dev->mt76.dev, "Warning: MAC RX did not stop!\n");  in mt76x0_mac_stop()
171 int mt76x0_init_hardware(struct mt76x02_dev *dev)  in mt76x0_init_hardware()  argument
175 	if (!mt76x02_wait_for_wpdma(&dev->mt76, 1000))  in mt76x0_init_hardware()
179 	if (!mt76x02_wait_for_mac(&dev->mt76))  in mt76x0_init_hardware()
182 	mt76x0_reset_csr_bbp(dev);  in mt76x0_init_hardware()
183 	ret = mt76x02_mcu_function_select(dev, Q_SELECT, 1);  in mt76x0_init_hardware()
187 	mt76x0_init_mac_registers(dev);  in mt76x0_init_hardware()
189 	if (!mt76x02_wait_for_txrx_idle(&dev->mt76))  in mt76x0_init_hardware()
192 	ret = mt76x0_init_bbp(dev);  in mt76x0_init_hardware()
196 	dev->mt76.rxfilter = mt76_rr(dev, MT_RX_FILTR_CFG);  in mt76x0_init_hardware()
200 			mt76x02_mac_shared_key_setup(dev, i, k, NULL);  in mt76x0_init_hardware()
203 		mt76x02_mac_wcid_setup(dev, i, 0, NULL);  in mt76x0_init_hardware()
205 	ret = mt76x0_eeprom_init(dev);  in mt76x0_init_hardware()
209 	mt76x0_phy_init(dev);  in mt76x0_init_hardware()
216 mt76x0_init_txpower(struct mt76x02_dev *dev,  in mt76x0_init_txpower()  argument
227 		mt76x0_get_tx_power_per_rate(dev, chan, &t);  in mt76x0_init_txpower()
228 		mt76x0_get_power_info(dev, chan, &tp);  in mt76x0_init_txpower()
236 int mt76x0_register_device(struct mt76x02_dev *dev)  in mt76x0_register_device()  argument
240 	ret = mt76x02_init_device(dev);  in mt76x0_register_device()
244 	mt76x02_config_mac_addr_list(dev);  in mt76x0_register_device()
246 	ret = mt76_register_device(&dev->mt76, true, mt76x02_rates,  in mt76x0_register_device()
251 	if (dev->mphy.cap.has_5ghz) {  in mt76x0_register_device()
254 		sband = &dev->mphy.sband_5g.sband;  in mt76x0_register_device()
256 		mt76x0_init_txpower(dev, sband);  in mt76x0_register_device()
259 	if (dev->mphy.cap.has_2ghz)  in mt76x0_register_device()
260 		mt76x0_init_txpower(dev, &dev->mphy.sband_2g.sband);  in mt76x0_register_device()
262 	mt76x02_init_debugfs(dev);  in mt76x0_register_device()