20 mt76x0_efuse_physical_size_check(struct mt76x02_dev *dev)  in mt76x0_efuse_physical_size_check()  argument
26 	ret = mt76x02_get_efuse_data(dev, MT_EE_USAGE_MAP_START, data,  in mt76x0_efuse_physical_size_check()
40 		dev_err(dev->mt76.dev,  in mt76x0_efuse_physical_size_check()
48 static void mt76x0_set_chip_cap(struct mt76x02_dev *dev)  in mt76x0_set_chip_cap()  argument
50 	u16 nic_conf0 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0);  in mt76x0_set_chip_cap()
51 	u16 nic_conf1 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1);  in mt76x0_set_chip_cap()
53 	mt76x02_eeprom_parse_hw_cap(dev);  in mt76x0_set_chip_cap()
54 	dev_dbg(dev->mt76.dev, "2GHz %d 5GHz %d\n",  in mt76x0_set_chip_cap()
55 		dev->mphy.cap.has_2ghz, dev->mphy.cap.has_5ghz);  in mt76x0_set_chip_cap()
57 	if (dev->no_2ghz) {  in mt76x0_set_chip_cap()
58 		dev->mphy.cap.has_2ghz = false;  in mt76x0_set_chip_cap()
59 		dev_dbg(dev->mt76.dev, "mask out 2GHz support\n");  in mt76x0_set_chip_cap()
62 	if (is_mt7630(dev)) {  in mt76x0_set_chip_cap()
63 		dev->mphy.cap.has_5ghz = false;  in mt76x0_set_chip_cap()
64 		dev_dbg(dev->mt76.dev, "mask out 5GHz support\n");  in mt76x0_set_chip_cap()
71 		dev_dbg(dev->mt76.dev,  in mt76x0_set_chip_cap()
74 	if (!mt76x02_field_valid(nic_conf0 >> 8))  in mt76x0_set_chip_cap()
79 		dev_err(dev->mt76.dev, "invalid tx-rx stream\n");  in mt76x0_set_chip_cap()
82 static void mt76x0_set_temp_offset(struct mt76x02_dev *dev)  in mt76x0_set_temp_offset()  argument
86 	val = mt76x02_eeprom_get(dev, MT_EE_2G_TARGET_POWER) >> 8;  in mt76x0_set_temp_offset()
88 		dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8);  in mt76x0_set_temp_offset()
90 		dev->cal.rx.temp_offset = -10;  in mt76x0_set_temp_offset()
93 static void mt76x0_set_freq_offset(struct mt76x02_dev *dev)  in mt76x0_set_freq_offset()  argument
95 	struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;  in mt76x0_set_freq_offset()
98 	val = mt76x02_eeprom_get(dev, MT_EE_FREQ_OFFSET);  in mt76x0_set_freq_offset()
103 	val = mt76x02_eeprom_get(dev, MT_EE_TSSI_BOUND4) >> 8;  in mt76x0_set_freq_offset()
107 	caldata->freq_offset -= mt76x02_sign_extend(val, 8);  in mt76x0_set_freq_offset()
110 void mt76x0_read_rx_gain(struct mt76x02_dev *dev)  in mt76x0_read_rx_gain()  argument
112 	struct ieee80211_channel *chan = dev->mphy.chandef.chan;  in mt76x0_read_rx_gain()
113 	struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;  in mt76x0_read_rx_gain()
118 	mt76x02_get_rx_gain(dev, chan->band, &rssi_offset, &lna_2g, lna_5g);  in mt76x0_read_rx_gain()
119 	caldata->lna_gain = mt76x02_get_lna_gain(dev, &lna_2g, lna_5g, chan);  in mt76x0_read_rx_gain()
122 		val = rssi_offset >> (8 * i);  in mt76x0_read_rx_gain()
130 static s8 mt76x0_get_delta(struct mt76x02_dev *dev)  in mt76x0_get_delta()  argument
132 	struct cfg80211_chan_def *chandef = &dev->mphy.chandef;  in mt76x0_get_delta()
136 		val = mt76x02_eeprom_get(dev, MT_EE_5G_TARGET_POWER) >> 8;  in mt76x0_get_delta()
140 		data = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40);  in mt76x0_get_delta()
142 			val = data >> 8;  in mt76x0_get_delta()
152 void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev,  in mt76x0_get_tx_power_per_rate()  argument
163 	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_BYRATE_BASE);  in mt76x0_get_tx_power_per_rate()
165 	t->cck[2] = t->cck[3] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
169 	val = mt76x02_eeprom_get(dev, addr);  in mt76x0_get_tx_power_per_rate()
171 	t->ofdm[2] = t->ofdm[3] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
175 	val = mt76x02_eeprom_get(dev, addr);  in mt76x0_get_tx_power_per_rate()
177 	t->ofdm[6] = t->ofdm[7] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
181 	val = mt76x02_eeprom_get(dev, addr);  in mt76x0_get_tx_power_per_rate()
183 	t->ht[2] = t->ht[3] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
186 	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 8 : 0x126;  in mt76x0_get_tx_power_per_rate()
187 	val = mt76x02_eeprom_get(dev, addr);  in mt76x0_get_tx_power_per_rate()
189 	t->ht[6] = t->ht[7] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
191 	/* vht mcs 8, 9 5GHz */  in mt76x0_get_tx_power_per_rate()
192 	val = mt76x02_eeprom_get(dev, 0x12c);  in mt76x0_get_tx_power_per_rate()
194 	t->vht[1] = s6_to_s8(val >> 8);  in mt76x0_get_tx_power_per_rate()
196 	delta = mt76x0_tssi_enabled(dev) ? 0 : mt76x0_get_delta(dev);  in mt76x0_get_tx_power_per_rate()
200 void mt76x0_get_power_info(struct mt76x02_dev *dev,  in mt76x0_get_power_info()  argument
207 		{   2,  0 }, {   4,  2 }, {   6,  4 }, {   8,  6 },  in mt76x0_get_power_info()
208 		{  10,  8 }, {  12, 10 }, {  14, 12 }, {  38,  0 },  in mt76x0_get_power_info()
209 		{  44,  2 }, {  48,  4 }, {  54,  6 }, {  60,  8 },  in mt76x0_get_power_info()
219 	if (mt76x0_tssi_enabled(dev)) {  in mt76x0_get_power_info()
223 			data = mt76x02_eeprom_get(dev, MT_EE_5G_TARGET_POWER);  in mt76x0_get_power_info()
225 			data = mt76x02_eeprom_get(dev, MT_EE_2G_TARGET_POWER);  in mt76x0_get_power_info()
226 		target_power = (data & 0xff) - dev->rate_power.ofdm[7];  in mt76x0_get_power_info()
227 		*tp = target_power + mt76x0_get_delta(dev);  in mt76x0_get_power_info()
250 			offset = 8;  in mt76x0_get_power_info()
267 	data = mt76x02_eeprom_get(dev, addr);  in mt76x0_get_power_info()
268 	*tp = data >> (8 * idx);  in mt76x0_get_power_info()
273 static int mt76x0_check_eeprom(struct mt76x02_dev *dev)  in mt76x0_check_eeprom()  argument
277 	val = get_unaligned_le16(dev->mt76.eeprom.data);  in mt76x0_check_eeprom()
279 		val = get_unaligned_le16(dev->mt76.eeprom.data +  in mt76x0_check_eeprom()
287 		dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n",  in mt76x0_check_eeprom()
293 static int mt76x0_load_eeprom(struct mt76x02_dev *dev)  in mt76x0_load_eeprom()  argument
297 	found = mt76_eeprom_init(&dev->mt76, MT76X0_EEPROM_SIZE);  in mt76x0_load_eeprom()
301 	if (found && !mt76x0_check_eeprom(dev))  in mt76x0_load_eeprom()
304 	found = mt76x0_efuse_physical_size_check(dev);  in mt76x0_load_eeprom()
308 	return mt76x02_get_efuse_data(dev, 0, dev->mt76.eeprom.data,  in mt76x0_load_eeprom()
312 int mt76x0_eeprom_init(struct mt76x02_dev *dev)  in mt76x0_eeprom_init()  argument
318 	err = mt76x0_load_eeprom(dev);  in mt76x0_eeprom_init()
322 	data = mt76x02_eeprom_get(dev, MT_EE_VERSION);  in mt76x0_eeprom_init()
323 	version = data >> 8;  in mt76x0_eeprom_init()
327 		dev_warn(dev->mt76.dev,  in mt76x0_eeprom_init()
330 	dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n",  in mt76x0_eeprom_init()
333 	memcpy(dev->mphy.macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR,  in mt76x0_eeprom_init()
335 	mt76_eeprom_override(&dev->mphy);  in mt76x0_eeprom_init()
336 	mt76x02_mac_setaddr(dev, dev->mphy.macaddr);  in mt76x0_eeprom_init()
338 	mt76x0_set_chip_cap(dev);  in mt76x0_eeprom_init()
339 	mt76x0_set_freq_offset(dev);  in mt76x0_eeprom_init()
340 	mt76x0_set_temp_offset(dev);  in mt76x0_eeprom_init()