mt76/mt7615/mac.h

1 /* SPDX-License-Identifier: ISC */
15 #define MT_RXD0_NORMAL_IP_SUM		BIT(23)
27 #define MT_RXD1_NORMAL_HDR_TRANS	BIT(23)
49 #define MT_RXD2_NORMAL_AMSDU_ERR	BIT(23)
54 #define MT_RXD2_NORMAL_CM		BIT(18)
64 #define MT_RXD3_NORMAL_WOL		GENMASK(18, 14)
82 #define MT_RXV1_NUM_RX			GENMASK(23, 22)
86 #define MT_RXV1_HT_AGGR			BIT(18)
102 #define MT_RXV3_IB_RSSI			GENMASK(23, 16)
105 #define MT_RXV4_RCPI2			GENMASK(23, 16)
112 #define MT_RXV6_NF2			GENMASK(23, 16)
159 #define MT_TXD0_IP_SUM			BIT(23)
165 #define MT_TXD1_TID			GENMASK(23, 21)
168 #define MT_TXD1_HDR_PAD			GENMASK(18, 17)
179 #define MT_TXD2_MAX_TX_TIME		GENMASK(23, 16)
220 /* MT7663 DW7 HW-AMSDU */
243 #define MT_TXS0_QUEUE_TIMEOUT		BIT(18)
246 #define MT_TXS0_ACK_ERROR_MASK		GENMASK(18, 16)
265 #define MT_TXS2_RXV_SEQNO		GENMASK(23, 16)
270 #define MT_TXS3_F1_TSSI1		GENMASK(23, 12)
275 #define MT_TXS4_F1_TSSI3		GENMASK(23, 12)
279 #define MT_TXS5_F1_NOISE_2		GENMASK(23, 16)
284 #define MT_TXS6_F1_RCPI_2		GENMASK(23, 16)