115 	return iwl_dbg_tlv_add(tlv, &trans->dbg.debug_info_tlv_list);  in iwl_dbg_tlv_alloc_debug_info()
153 	trans->dbg.fw_mon_cfg[alloc_id] = *alloc;  in iwl_dbg_tlv_alloc_buf_alloc()
184 	return iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].hcmd_list);  in iwl_dbg_tlv_alloc_hcmd()
228 		trans->dbg.imr_data.sram_addr =  in iwl_dbg_tlv_alloc_region()
230 		trans->dbg.imr_data.sram_size =  in iwl_dbg_tlv_alloc_region()
235 	active_reg = &trans->dbg.active_regions[id];  in iwl_dbg_tlv_alloc_region()
275 	trans->dbg.last_tp_resetfw = 0xFF;  in iwl_dbg_tlv_alloc_trigger()
286 	ret = iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].trig_list);  in iwl_dbg_tlv_alloc_trigger()
313 	return iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].config_list);  in iwl_dbg_tlv_config_set()
330 		&trans->dbg.external_ini_cfg : &trans->dbg.internal_ini_cfg;  in iwl_dbg_tlv_alloc()
345 	    !(domain & trans->dbg.domains_bitmap)) {  in iwl_dbg_tlv_alloc()
348 			     domain, trans->dbg.domains_bitmap);  in iwl_dbg_tlv_alloc()
382 	struct list_head *timer_list = &trans->dbg.periodic_trig_list;  in iwl_dbg_tlv_del_timers()
403 	fw_mon = &trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_fragments_free()
428 	for (i = 0; i < ARRAY_SIZE(trans->dbg.active_regions); i++) {  in iwl_dbg_tlv_free()
430 			&trans->dbg.active_regions[i];  in iwl_dbg_tlv_free()
437 				 &trans->dbg.debug_info_tlv_list, list) {  in iwl_dbg_tlv_free()
442 	for (i = 0; i < ARRAY_SIZE(trans->dbg.time_point); i++) {  in iwl_dbg_tlv_free()
444 			&trans->dbg.time_point[i];  in iwl_dbg_tlv_free()
472 	for (i = 0; i < ARRAY_SIZE(trans->dbg.fw_mon_ini); i++)  in iwl_dbg_tlv_free()
527 	INIT_LIST_HEAD(&trans->dbg.debug_info_tlv_list);  in iwl_dbg_tlv_init()
528 	INIT_LIST_HEAD(&trans->dbg.periodic_trig_list);  in iwl_dbg_tlv_init()
530 	for (i = 0; i < ARRAY_SIZE(trans->dbg.time_point); i++) {  in iwl_dbg_tlv_init()
532 			&trans->dbg.time_point[i];  in iwl_dbg_tlv_init()
592 	fw_mon_cfg = &fwrt->trans->dbg.fw_mon_cfg[alloc_id];  in iwl_dbg_tlv_alloc_fragments()
593 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_alloc_fragments()
669 	if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) !=  in iwl_dbg_tlv_apply_buffer()
673 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_apply_buffer()
751 	if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) !=  in iwl_dbg_tlv_update_dram()
758 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_update_dram()
798 		&fwrt->trans->dbg.fw_mon_ini[IWL_FW_INI_ALLOCATION_ID_DBGC1].frags[0];  in iwl_dbg_tlv_update_drams()
814 		if (fwrt->trans->dbg.fw_mon_cfg[i].buf_location ==  in iwl_dbg_tlv_update_drams()
902 			struct iwl_dram_data *frags = &fwrt->trans->dbg.fw_mon_ini[1].frags[0];  in iwl_dbg_tlv_apply_config()
941 			fwrt->trans->dbg.ucode_preset = debug_token_config;  in iwl_dbg_tlv_apply_config()
975 		&fwrt->trans->dbg.time_point[IWL_FW_INI_TIME_POINT_PERIODIC].active_trig_list;  in iwl_dbg_tlv_set_periodic_trigs()
1018 			      &fwrt->trans->dbg.periodic_trig_list);  in iwl_dbg_tlv_set_periodic_trigs()
1241 		fwrt->trans->dbg.restart_required = FALSE;  in iwl_dbg_tlv_tp_trigger()
1246 			     fwrt->trans->dbg.restart_required,  in iwl_dbg_tlv_tp_trigger()
1247 			     fwrt->trans->dbg.last_tp_resetfw);  in iwl_dbg_tlv_tp_trigger()
1251 			fwrt->trans->dbg.restart_required = TRUE;  in iwl_dbg_tlv_tp_trigger()
1253 			   fwrt->trans->dbg.last_tp_resetfw ==  in iwl_dbg_tlv_tp_trigger()
1255 			fwrt->trans->dbg.restart_required = FALSE;  in iwl_dbg_tlv_tp_trigger()
1256 			fwrt->trans->dbg.last_tp_resetfw = 0xFF;  in iwl_dbg_tlv_tp_trigger()
1261 			fwrt->trans->dbg.restart_required = TRUE;  in iwl_dbg_tlv_tp_trigger()
1266 			fwrt->trans->dbg.restart_required = FALSE;  in iwl_dbg_tlv_tp_trigger()
1267 			fwrt->trans->dbg.last_tp_resetfw =  in iwl_dbg_tlv_tp_trigger()
1283 	enum iwl_fw_ini_buffer_location *ini_dest = &fwrt->trans->dbg.ini_dest;  in iwl_dbg_tlv_init_cfg()
1290 			     fwrt->trans->dbg.domains_bitmap);  in iwl_dbg_tlv_init_cfg()
1292 		for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.time_point); i++) {  in iwl_dbg_tlv_init_cfg()
1294 				&fwrt->trans->dbg.time_point[i];  in iwl_dbg_tlv_init_cfg()
1309 			&fwrt->trans->dbg.fw_mon_cfg[i];  in iwl_dbg_tlv_init_cfg()
1336 	for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions) && failed_alloc; i++) {  in iwl_dbg_tlv_init_cfg()
1339 			&fwrt->trans->dbg.active_regions[i];  in iwl_dbg_tlv_init_cfg()
1343 			fwrt->trans->dbg.unsupported_region_msk |= BIT(i);  in iwl_dbg_tlv_init_cfg()
1359 		fwrt->trans->dbg.unsupported_region_msk |= BIT(i);  in iwl_dbg_tlv_init_cfg()
1378 	hcmd_list = &fwrt->trans->dbg.time_point[tp_id].hcmd_list;  in _iwl_dbg_tlv_time_point()
1379 	trig_list = &fwrt->trans->dbg.time_point[tp_id].active_trig_list;  in _iwl_dbg_tlv_time_point()
1380 	conf_list = &fwrt->trans->dbg.time_point[tp_id].config_list;  in _iwl_dbg_tlv_time_point()