Lines Matching refs:PR_EEP
82 PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0])); in ar9287_dump_modal_eeprom()
83 PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1])); in ar9287_dump_modal_eeprom()
84 PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon)); in ar9287_dump_modal_eeprom()
85 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); in ar9287_dump_modal_eeprom()
86 PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]); in ar9287_dump_modal_eeprom()
87 PR_EEP("Switch Settle", modal_hdr->switchSettling); in ar9287_dump_modal_eeprom()
88 PR_EEP("Chain0 TxRxAtten", modal_hdr->txRxAttenCh[0]); in ar9287_dump_modal_eeprom()
89 PR_EEP("Chain1 TxRxAtten", modal_hdr->txRxAttenCh[1]); in ar9287_dump_modal_eeprom()
90 PR_EEP("Chain0 RxTxMargin", modal_hdr->rxTxMarginCh[0]); in ar9287_dump_modal_eeprom()
91 PR_EEP("Chain1 RxTxMargin", modal_hdr->rxTxMarginCh[1]); in ar9287_dump_modal_eeprom()
92 PR_EEP("ADC Desired size", modal_hdr->adcDesiredSize); in ar9287_dump_modal_eeprom()
93 PR_EEP("txEndToXpaOff", modal_hdr->txEndToXpaOff); in ar9287_dump_modal_eeprom()
94 PR_EEP("txEndToRxOn", modal_hdr->txEndToRxOn); in ar9287_dump_modal_eeprom()
95 PR_EEP("txFrameToXpaOn", modal_hdr->txFrameToXpaOn); in ar9287_dump_modal_eeprom()
96 PR_EEP("CCA Threshold)", modal_hdr->thresh62); in ar9287_dump_modal_eeprom()
97 PR_EEP("Chain0 NF Threshold", modal_hdr->noiseFloorThreshCh[0]); in ar9287_dump_modal_eeprom()
98 PR_EEP("Chain1 NF Threshold", modal_hdr->noiseFloorThreshCh[1]); in ar9287_dump_modal_eeprom()
99 PR_EEP("xpdGain", modal_hdr->xpdGain); in ar9287_dump_modal_eeprom()
100 PR_EEP("External PD", modal_hdr->xpd); in ar9287_dump_modal_eeprom()
101 PR_EEP("Chain0 I Coefficient", modal_hdr->iqCalICh[0]); in ar9287_dump_modal_eeprom()
102 PR_EEP("Chain1 I Coefficient", modal_hdr->iqCalICh[1]); in ar9287_dump_modal_eeprom()
103 PR_EEP("Chain0 Q Coefficient", modal_hdr->iqCalQCh[0]); in ar9287_dump_modal_eeprom()
104 PR_EEP("Chain1 Q Coefficient", modal_hdr->iqCalQCh[1]); in ar9287_dump_modal_eeprom()
105 PR_EEP("pdGainOverlap", modal_hdr->pdGainOverlap); in ar9287_dump_modal_eeprom()
106 PR_EEP("xPA Bias Level", modal_hdr->xpaBiasLvl); in ar9287_dump_modal_eeprom()
107 PR_EEP("txFrameToDataStart", modal_hdr->txFrameToDataStart); in ar9287_dump_modal_eeprom()
108 PR_EEP("txFrameToPaOn", modal_hdr->txFrameToPaOn); in ar9287_dump_modal_eeprom()
109 PR_EEP("HT40 Power Inc.", modal_hdr->ht40PowerIncForPdadc); in ar9287_dump_modal_eeprom()
110 PR_EEP("Chain0 bswAtten", modal_hdr->bswAtten[0]); in ar9287_dump_modal_eeprom()
111 PR_EEP("Chain1 bswAtten", modal_hdr->bswAtten[1]); in ar9287_dump_modal_eeprom()
112 PR_EEP("Chain0 bswMargin", modal_hdr->bswMargin[0]); in ar9287_dump_modal_eeprom()
113 PR_EEP("Chain1 bswMargin", modal_hdr->bswMargin[1]); in ar9287_dump_modal_eeprom()
114 PR_EEP("HT40 Switch Settle", modal_hdr->swSettleHt40); in ar9287_dump_modal_eeprom()
115 PR_EEP("AR92x7 Version", modal_hdr->version); in ar9287_dump_modal_eeprom()
116 PR_EEP("DriverBias1", modal_hdr->db1); in ar9287_dump_modal_eeprom()
117 PR_EEP("DriverBias2", modal_hdr->db1); in ar9287_dump_modal_eeprom()
118 PR_EEP("CCK OutputBias", modal_hdr->ob_cck); in ar9287_dump_modal_eeprom()
119 PR_EEP("PSK OutputBias", modal_hdr->ob_psk); in ar9287_dump_modal_eeprom()
120 PR_EEP("QAM OutputBias", modal_hdr->ob_qam); in ar9287_dump_modal_eeprom()
121 PR_EEP("PAL_OFF OutputBias", modal_hdr->ob_pal_off); in ar9287_dump_modal_eeprom()
141 PR_EEP("Major Version", ath9k_hw_ar9287_get_eeprom_ver(ah)); in ath9k_hw_ar9287_dump_eeprom()
142 PR_EEP("Minor Version", ath9k_hw_ar9287_get_eeprom_rev(ah)); in ath9k_hw_ar9287_dump_eeprom()
143 PR_EEP("Checksum", le16_to_cpu(pBase->checksum)); in ath9k_hw_ar9287_dump_eeprom()
144 PR_EEP("Length", le16_to_cpu(pBase->length)); in ath9k_hw_ar9287_dump_eeprom()
145 PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0])); in ath9k_hw_ar9287_dump_eeprom()
146 PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1])); in ath9k_hw_ar9287_dump_eeprom()
147 PR_EEP("TX Mask", pBase->txMask); in ath9k_hw_ar9287_dump_eeprom()
148 PR_EEP("RX Mask", pBase->rxMask); in ath9k_hw_ar9287_dump_eeprom()
149 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); in ath9k_hw_ar9287_dump_eeprom()
150 PR_EEP("Allow 2GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11G)); in ath9k_hw_ar9287_dump_eeprom()
151 PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
153 PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
155 PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
157 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
159 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); in ath9k_hw_ar9287_dump_eeprom()
160 PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
161 PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
162 PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
163 PR_EEP("Power Table Offset", pBase->pwrTableOffset); in ath9k_hw_ar9287_dump_eeprom()
164 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl); in ath9k_hw_ar9287_dump_eeprom()