484 	struct ar9003_rxs *rxsp = buf_addr;  in ath9k_hw_process_rxdesc_edma()  local
487 	if ((rxsp->status11 & AR_RxDone) == 0)  in ath9k_hw_process_rxdesc_edma()
490 	if (MS(rxsp->ds_info, AR_DescId) != 0x168c)  in ath9k_hw_process_rxdesc_edma()
493 	if ((rxsp->ds_info & (AR_TxRxDesc | AR_CtrlStat)) != 0)  in ath9k_hw_process_rxdesc_edma()
501 	rxs->rs_datalen = rxsp->status2 & AR_DataLen;  in ath9k_hw_process_rxdesc_edma()
502 	rxs->rs_tstamp =  rxsp->status3;  in ath9k_hw_process_rxdesc_edma()
505 	rxs->rs_rssi = MS(rxsp->status5, AR_RxRSSICombined);  in ath9k_hw_process_rxdesc_edma()
506 	rxs->rs_rssi_ctl[0] = MS(rxsp->status1, AR_RxRSSIAnt00);  in ath9k_hw_process_rxdesc_edma()
507 	rxs->rs_rssi_ctl[1] = MS(rxsp->status1, AR_RxRSSIAnt01);  in ath9k_hw_process_rxdesc_edma()
508 	rxs->rs_rssi_ctl[2] = MS(rxsp->status1, AR_RxRSSIAnt02);  in ath9k_hw_process_rxdesc_edma()
509 	rxs->rs_rssi_ext[0] = MS(rxsp->status5, AR_RxRSSIAnt10);  in ath9k_hw_process_rxdesc_edma()
510 	rxs->rs_rssi_ext[1] = MS(rxsp->status5, AR_RxRSSIAnt11);  in ath9k_hw_process_rxdesc_edma()
511 	rxs->rs_rssi_ext[2] = MS(rxsp->status5, AR_RxRSSIAnt12);  in ath9k_hw_process_rxdesc_edma()
513 	if (rxsp->status11 & AR_RxKeyIdxValid)  in ath9k_hw_process_rxdesc_edma()
514 		rxs->rs_keyix = MS(rxsp->status11, AR_KeyIdx);  in ath9k_hw_process_rxdesc_edma()
518 	rxs->rs_rate = MS(rxsp->status1, AR_RxRate);  in ath9k_hw_process_rxdesc_edma()
519 	rxs->rs_more = (rxsp->status2 & AR_RxMore) ? 1 : 0;  in ath9k_hw_process_rxdesc_edma()
521 	rxs->rs_firstaggr = (rxsp->status11 & AR_RxFirstAggr) ? 1 : 0;  in ath9k_hw_process_rxdesc_edma()
522 	rxs->rs_isaggr = (rxsp->status11 & AR_RxAggr) ? 1 : 0;  in ath9k_hw_process_rxdesc_edma()
523 	rxs->rs_moreaggr = (rxsp->status11 & AR_RxMoreAggr) ? 1 : 0;  in ath9k_hw_process_rxdesc_edma()
524 	rxs->rs_antenna = (MS(rxsp->status4, AR_RxAntenna) & 0x7);  in ath9k_hw_process_rxdesc_edma()
525 	rxs->enc_flags |= (rxsp->status4 & AR_GI) ? RX_ENC_FLAG_SHORT_GI : 0;  in ath9k_hw_process_rxdesc_edma()
527 		(rxsp->status4 & AR_STBC) ? (1 << RX_ENC_FLAG_STBC_SHIFT) : 0;  in ath9k_hw_process_rxdesc_edma()
528 	rxs->bw = (rxsp->status4 & AR_2040) ? RATE_INFO_BW_40 : RATE_INFO_BW_20;  in ath9k_hw_process_rxdesc_edma()
530 	rxs->evm0 = rxsp->status6;  in ath9k_hw_process_rxdesc_edma()
531 	rxs->evm1 = rxsp->status7;  in ath9k_hw_process_rxdesc_edma()
532 	rxs->evm2 = rxsp->status8;  in ath9k_hw_process_rxdesc_edma()
533 	rxs->evm3 = rxsp->status9;  in ath9k_hw_process_rxdesc_edma()
534 	rxs->evm4 = (rxsp->status10 & 0xffff);  in ath9k_hw_process_rxdesc_edma()
536 	if (rxsp->status11 & AR_PreDelimCRCErr)  in ath9k_hw_process_rxdesc_edma()
539 	if (rxsp->status11 & AR_PostDelimCRCErr)  in ath9k_hw_process_rxdesc_edma()
542 	if (rxsp->status11 & AR_DecryptBusyErr)  in ath9k_hw_process_rxdesc_edma()
545 	if ((rxsp->status11 & AR_RxFrameOK) == 0) {  in ath9k_hw_process_rxdesc_edma()
554 		if (rxsp->status11 & AR_CRCErr)  in ath9k_hw_process_rxdesc_edma()
556 		else if (rxsp->status11 & AR_DecryptCRCErr)  in ath9k_hw_process_rxdesc_edma()
558 		else if (rxsp->status11 & AR_MichaelErr)  in ath9k_hw_process_rxdesc_edma()
560 		if (rxsp->status11 & AR_PHYErr) {  in ath9k_hw_process_rxdesc_edma()
561 			phyerr = MS(rxsp->status11, AR_PHYErrCode);  in ath9k_hw_process_rxdesc_edma()
576 			    (rxsp->status11 & AR_PostDelimCRCErr)) {  in ath9k_hw_process_rxdesc_edma()
585 	if (rxsp->status11 & AR_KeyMiss)  in ath9k_hw_process_rxdesc_edma()