Lines Matching refs:PR_EEP
3405 PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0])); in ar9003_dump_modal_eeprom()
3406 PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1])); in ar9003_dump_modal_eeprom()
3407 PR_EEP("Chain2 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[2])); in ar9003_dump_modal_eeprom()
3408 PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon)); in ar9003_dump_modal_eeprom()
3409 PR_EEP("Ant. Common Control2", le32_to_cpu(modal_hdr->antCtrlCommon2)); in ar9003_dump_modal_eeprom()
3410 PR_EEP("Ant. Gain", modal_hdr->antennaGain); in ar9003_dump_modal_eeprom()
3411 PR_EEP("Switch Settle", modal_hdr->switchSettling); in ar9003_dump_modal_eeprom()
3412 PR_EEP("Chain0 xatten1DB", modal_hdr->xatten1DB[0]); in ar9003_dump_modal_eeprom()
3413 PR_EEP("Chain1 xatten1DB", modal_hdr->xatten1DB[1]); in ar9003_dump_modal_eeprom()
3414 PR_EEP("Chain2 xatten1DB", modal_hdr->xatten1DB[2]); in ar9003_dump_modal_eeprom()
3415 PR_EEP("Chain0 xatten1Margin", modal_hdr->xatten1Margin[0]); in ar9003_dump_modal_eeprom()
3416 PR_EEP("Chain1 xatten1Margin", modal_hdr->xatten1Margin[1]); in ar9003_dump_modal_eeprom()
3417 PR_EEP("Chain2 xatten1Margin", modal_hdr->xatten1Margin[2]); in ar9003_dump_modal_eeprom()
3418 PR_EEP("Temp Slope", modal_hdr->tempSlope); in ar9003_dump_modal_eeprom()
3419 PR_EEP("Volt Slope", modal_hdr->voltSlope); in ar9003_dump_modal_eeprom()
3420 PR_EEP("spur Channels0", modal_hdr->spurChans[0]); in ar9003_dump_modal_eeprom()
3421 PR_EEP("spur Channels1", modal_hdr->spurChans[1]); in ar9003_dump_modal_eeprom()
3422 PR_EEP("spur Channels2", modal_hdr->spurChans[2]); in ar9003_dump_modal_eeprom()
3423 PR_EEP("spur Channels3", modal_hdr->spurChans[3]); in ar9003_dump_modal_eeprom()
3424 PR_EEP("spur Channels4", modal_hdr->spurChans[4]); in ar9003_dump_modal_eeprom()
3425 PR_EEP("Chain0 NF Threshold", modal_hdr->noiseFloorThreshCh[0]); in ar9003_dump_modal_eeprom()
3426 PR_EEP("Chain1 NF Threshold", modal_hdr->noiseFloorThreshCh[1]); in ar9003_dump_modal_eeprom()
3427 PR_EEP("Chain2 NF Threshold", modal_hdr->noiseFloorThreshCh[2]); in ar9003_dump_modal_eeprom()
3428 PR_EEP("Quick Drop", modal_hdr->quick_drop); in ar9003_dump_modal_eeprom()
3429 PR_EEP("txEndToXpaOff", modal_hdr->txEndToXpaOff); in ar9003_dump_modal_eeprom()
3430 PR_EEP("xPA Bias Level", modal_hdr->xpaBiasLvl); in ar9003_dump_modal_eeprom()
3431 PR_EEP("txFrameToDataStart", modal_hdr->txFrameToDataStart); in ar9003_dump_modal_eeprom()
3432 PR_EEP("txFrameToPaOn", modal_hdr->txFrameToPaOn); in ar9003_dump_modal_eeprom()
3433 PR_EEP("txFrameToXpaOn", modal_hdr->txFrameToXpaOn); in ar9003_dump_modal_eeprom()
3434 PR_EEP("txClip", modal_hdr->txClip); in ar9003_dump_modal_eeprom()
3435 PR_EEP("ADC Desired size", modal_hdr->adcDesiredSize); in ar9003_dump_modal_eeprom()
3522 PR_EEP("EEPROM Version", ah->eeprom.ar9300_eep.eepromVersion); in ath9k_hw_ar9003_dump_eeprom()
3523 PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0])); in ath9k_hw_ar9003_dump_eeprom()
3524 PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1])); in ath9k_hw_ar9003_dump_eeprom()
3525 PR_EEP("TX Mask", (pBase->txrxMask >> 4)); in ath9k_hw_ar9003_dump_eeprom()
3526 PR_EEP("RX Mask", (pBase->txrxMask & 0x0f)); in ath9k_hw_ar9003_dump_eeprom()
3527 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3529 PR_EEP("Allow 2GHz", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3531 PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3533 PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3535 PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3537 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3539 PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & in ath9k_hw_ar9003_dump_eeprom()
3541 PR_EEP("RF Silent", pBase->rfSilent); in ath9k_hw_ar9003_dump_eeprom()
3542 PR_EEP("BT option", pBase->blueToothOptions); in ath9k_hw_ar9003_dump_eeprom()
3543 PR_EEP("Device Cap", pBase->deviceCap); in ath9k_hw_ar9003_dump_eeprom()
3544 PR_EEP("Device Type", pBase->deviceType); in ath9k_hw_ar9003_dump_eeprom()
3545 PR_EEP("Power Table Offset", pBase->pwrTableOffset); in ath9k_hw_ar9003_dump_eeprom()
3546 PR_EEP("Tuning Caps1", pBase->params_for_tuning_caps[0]); in ath9k_hw_ar9003_dump_eeprom()
3547 PR_EEP("Tuning Caps2", pBase->params_for_tuning_caps[1]); in ath9k_hw_ar9003_dump_eeprom()
3548 PR_EEP("Enable Tx Temp Comp", !!(pBase->featureEnable & BIT(0))); in ath9k_hw_ar9003_dump_eeprom()
3549 PR_EEP("Enable Tx Volt Comp", !!(pBase->featureEnable & BIT(1))); in ath9k_hw_ar9003_dump_eeprom()
3550 PR_EEP("Enable fast clock", !!(pBase->featureEnable & BIT(2))); in ath9k_hw_ar9003_dump_eeprom()
3551 PR_EEP("Enable doubling", !!(pBase->featureEnable & BIT(3))); in ath9k_hw_ar9003_dump_eeprom()
3552 PR_EEP("Internal regulator", !!(pBase->featureEnable & BIT(4))); in ath9k_hw_ar9003_dump_eeprom()
3553 PR_EEP("Enable Paprd", !!(pBase->featureEnable & BIT(5))); in ath9k_hw_ar9003_dump_eeprom()
3554 PR_EEP("Driver Strength", !!(pBase->miscConfiguration & BIT(0))); in ath9k_hw_ar9003_dump_eeprom()
3555 PR_EEP("Quick Drop", !!(pBase->miscConfiguration & BIT(1))); in ath9k_hw_ar9003_dump_eeprom()
3556 PR_EEP("Chain mask Reduce", (pBase->miscConfiguration >> 0x3) & 0x1); in ath9k_hw_ar9003_dump_eeprom()
3557 PR_EEP("Write enable Gpio", pBase->eepromWriteEnableGpio); in ath9k_hw_ar9003_dump_eeprom()
3558 PR_EEP("WLAN Disable Gpio", pBase->wlanDisableGpio); in ath9k_hw_ar9003_dump_eeprom()
3559 PR_EEP("WLAN LED Gpio", pBase->wlanLedGpio); in ath9k_hw_ar9003_dump_eeprom()
3560 PR_EEP("Rx Band Select Gpio", pBase->rxBandSelectGpio); in ath9k_hw_ar9003_dump_eeprom()
3561 PR_EEP("Tx Gain", pBase->txrxgain >> 4); in ath9k_hw_ar9003_dump_eeprom()
3562 PR_EEP("Rx Gain", pBase->txrxgain & 0xf); in ath9k_hw_ar9003_dump_eeprom()
3563 PR_EEP("SW Reg", le32_to_cpu(pBase->swreg)); in ath9k_hw_ar9003_dump_eeprom()