Lines Matching refs:u32
17 static const u32 ar9280Modes_9280_2[][5] = {
67 static const u32 ar9280Common_9280_2[][2] = {
411 static const u32 ar9280Modes_fast_clock_9280_2[][3] = {
428 static const u32 ar9280Modes_backoff_23db_rxgain_9280_2[][5] = {
562 static const u32 ar9280Modes_original_rxgain_9280_2[][5] = {
696 static const u32 ar9280Modes_backoff_13db_rxgain_9280_2[][5] = {
830 static const u32 ar9280Modes_high_power_tx_gain_9280_2[][5] = {
865 static const u32 ar9280Modes_original_tx_gain_9280_2[][5] = {
900 static const u32 ar9280PciePhy_clkreq_always_on_L1_9280[][2] = {
914 static const u32 ar9285Modes_9285_1_2[][5] = {
1220 static const u32 ar9285Common_9285_1_2[][2] = {
1540 static const u32 ar9285Modes_high_power_tx_gain_9285_1_2[][5] = {
1581 static const u32 ar9285Modes_original_tx_gain_9285_1_2[][5] = {
1622 static const u32 ar9285Modes_XE2_0_normal_power[][5] = {
1663 static const u32 ar9285Modes_XE2_0_high_power[][5] = {
1704 static const u32 ar9287Modes_9287_1_1[][5] = {
1751 static const u32 ar9287Common_9287_1_1[][2] = {
2120 static const u32 ar9287Common_normal_cck_fir_coeff_9287_1_1[][2] = {
2127 static const u32 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1[][2] = {
2134 static const u32 ar9287Modes_tx_gain_9287_1_1[][5] = {
2183 static const u32 ar9287Modes_rx_gain_9287_1_1[][5] = {
2445 static const u32 ar9271Modes_9271[][5] = {
2752 static const u32 ar9271Common_9271[][2] = {
3081 static const u32 ar9271Modes_9271_ANI_reg[][5] = {
3093 static const u32 ar9271Modes_normal_power_tx_gain_9271[][5] = {
3130 static const u32 ar9271Modes_high_power_tx_gain_9271[][5] = {