ath/ath10k/pci.h

1 /* SPDX-License-Identifier: ISC */
3  * Copyright (c) 2005-2011 Atheros Communications Inc.
4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
32  * PCI-specific Target state
37  * HOST_INTEREST->hi_interconnect_state points here
38  * (and all members are 32-bit quantities in order to
80 /* Per-pipe state. */
131 	 * bootup. To do that the original PCI-E Link Control is stored before
132 	 * device bootup is executed and re-programmed later.
139 	/* The device has a special powersave-oriented register. When device is
142 	 * waking up the device might scribble over host memory or return
147 	/* Waking up takes some time (up to 2ms in some cases) so it can be bad
149 	 * to sleep after all references are undone - instead there's a grace
196 	return (struct ath10k_pci *)ar->drv_priv;  in ath10k_pci_priv()
209 /* Wait up to this many Ms for a Diagnostic Access CE operation to complete */