Lines Matching +full:0 +full:x60000
34 #define ATH10K_GCC_REG_BASE 0x1800000
35 #define ATH10K_GCC_REG_SIZE 0x60000
37 #define ATH10K_TCSR_REG_BASE 0x1900000
38 #define ATH10K_TCSR_REG_SIZE 0x80000
40 #define ATH10K_AHB_GCC_FEPLL_PLL_DIV 0x2f020
41 #define ATH10K_AHB_WIFI_SCRATCH_5_REG 0x4f014
43 #define ATH10K_AHB_WLAN_CORE_ID_REG 0x82030
45 #define ATH10K_AHB_TCSR_WIFI0_GLB_CFG 0x49000
46 #define ATH10K_AHB_TCSR_WIFI1_GLB_CFG 0x49004
49 #define ATH10K_AHB_TCSR_WCSS0_HALTREQ 0x52000
50 #define ATH10K_AHB_TCSR_WCSS1_HALTREQ 0x52010
51 #define ATH10K_AHB_TCSR_WCSS0_HALTACK 0x52004
52 #define ATH10K_AHB_TCSR_WCSS1_HALTACK 0x52014
67 return 0; in ath10k_ahb_init()