net/wan/wanxlfw.S

158 	movew (\src)+, (\dest)+
221 	movew #(TIMER_IRQ_LEVEL << 8) + TIMER_IRQ, PICR	// interrupt from PIT
222 	movew #PITR_CONST, PITR
241 	movew #0xFFFF, PAPAR		// all pins are clocks/data
255 	movew #0x2700, %sr		// disable IRQs again
353 	movew %d1, SCC_TBASE(%a1)	// D1 = offset of first TxBD
355 	movew %d1, SCC_RBASE(%a1)	// D1 = offset of first RxBD
365 	movew #HDLC_MAX_MRU + 2, SCC_MFLR(%a1) // 2 bytes for CRC
366 	movew #2, parity_bytes(%d0)
372 	movew #0x0800, SCC_PSMR(%a2)	// CRC32-CCITT
375 	movew #HDLC_MAX_MRU + 4, SCC_MFLR(%a1) // 4 bytes for CRC
376 	movew #4, parity_bytes(%d0)
385 	movew #HDLC_MAX_MRU + 2, SCC_MFLR(%a1) // 2 bytes for CRC
386 	movew #2, parity_bytes(%d0)
392 	movew #0x0800, SCC_PSMR(%a2)	// CRC32-CCITT preset 0
395 	movew #HDLC_MAX_MRU + 4, SCC_MFLR(%a1) // 4 bytes for CRC
396 	movew #4, parity_bytes(%d0)
403 	movew #HDLC_MAX_MRU, SCC_MFLR(%a1) // 0 bytes for CRC
416 	movew #BUFFER_LENGTH, SCC_MRBLR(%a1)
420 	movew %d1, CR			// Init SCC RX and TX params
424 	movew #0x001F, SCC_SCCM(%a2)	// TXE RXF BSY TXB RXB interrupts
466 	movew %d2, 2(%d1)		// length into BD
490 	movew (%d1), %d2		// D2 = RX BD flags
505 	movew 2(%d1), %d3
570 	movew (%d1), %d3		// D3 = TX BD flags
607 	movew %sr, -(%sp)
613 	movew #0x2700, %sr		// disable interrupts again
618 	movew %sr, -(%sp)
624 	movew #0x2700, %sr		// disable interrupts again
628 	movew (%sp)+, %sr
695 	movew (%a0), %d1		// D1 = CSR input bits
699 	movew #0x0E08, %d1
705 	movew #0x0408, %d1
711 	movew #0x0208, %d1
717 	movew #0x0D08, %d1
721 	movew #0x0008, %d1		// D1 = disable everything
722 	movew #0x80E7, %d2		// D2 = input mask: ignore DSR
726 	movew csr_output(%d0), %d2
729 	movew #0x80FF, %d2		// D2 = input mask: include DSR
734 	movew %d1, old_csr_output(%d0)
735 	movew %d1, (%a0)		// Write CSR output bits
738 	movew (PCDAT), %d1
741 	movew (%a0), %d1		// D1 = CSR input bits
746 	movew (%a0), %d1		// D1 = CSR input bits