Lines Matching refs:movel
127 movel \src, PLX_DMA_0_PCI
128 movel \dest, PLX_DMA_0_LOCAL
129 movel \len, PLX_DMA_0_LENGTH
130 movel #0x0103, PLX_DMA_CMD_STS // start channel 0 transfer
137 movel \src, PLX_DMA_1_LOCAL
138 movel \dest, PLX_DMA_1_PCI
139 movel \len, PLX_DMA_1_LENGTH
140 movel #0x0301, PLX_DMA_CMD_STS // start channel 1 transfer
147 movel %d7, -(%sp) // src and dest must be < 256 MB
148 movel \len, %d7 // bits 0 and 1
153 98: movel (\src)+, (\dest)+
155 99: movel %d7, \len
163 movel (%sp)+, %d7
197 movel OR1, %d0
200 movel %d0, OR1
212 movel #pci9060_interrupt, PCI9060_VECTOR
213 movel #error_interrupt, ERROR_VECTOR
214 movel #port_interrupt_1, SCC1_VECTOR
215 movel #port_interrupt_2, SCC2_VECTOR
216 movel #port_interrupt_3, SCC3_VECTOR
217 movel #port_interrupt_4, SCC4_VECTOR
218 movel #timer_interrupt, TIMER_IRQ * 4
220 movel #0x78000000, CIMR // only SCCx IRQs from CPM
225 movel #0xD41F40 + (CPM_IRQ_LEVEL << 13), CICR
226 movel #0x543, PLX_DMA_0_MODE // 32-bit, Ready, Burst, IRQ
227 movel #0x543, PLX_DMA_1_MODE
228 movel #0x0, PLX_DMA_0_DESC // from PCI to local
229 movel #0x8, PLX_DMA_1_DESC // from local to PCI
230 movel #0x101, PLX_DMA_CMD_STS // enable both DMA channels
237 movel #1, PLX_MAILBOX_5 // non-zero value = init complete
248 main: movel channel_stats, %d7 // D7 = doorbell + irq status
284 movel %d6, PLX_DOORBELL_FROM_CARD // signal the host
291 movel ch_status_addr(%d0), %a0 // A0 = port status address
294 movel #1, STATUS_OPEN(%a0) // confirm the port is open
301 movel SICR, %d1 // D1 = clock settings in SICR
311 movel %d1, SICR // update clock settings in SICR
317 movel first_buffer(%d0), %d1 // D1 = starting buffer address
318 movel tx_first_bd(%d0), %a1 // A1 = starting TX BD address
319 movel #TX_BUFFERS - 2, %d2 // D2 = TX_BUFFERS - 1 counter
320 movel #0x18000000, %d3 // D3 = initial TX BD flags: Int + Last
325 movel %d3, (%a1)+ // TX flags + length
326 movel %d1, (%a1)+ // buffer address
331 movel %d3, (%a1)+ // Final TX flags + length
332 movel %d1, (%a1)+ // buffer address
335 movel #RX_BUFFERS - 2, %d2 // D2 = RX_BUFFERS - 1 counter
337 movel #0x90000000, (%a1)+ // RX flags + length
338 movel %d1, (%a1)+ // buffer address
342 movel #0xB0000000, (%a1)+ // Final RX flags + length
343 movel %d1, (%a1)+ // buffer address
346 movel scc_base_addr(%d0), %a1 // A1 = SCC_BASE address
347 movel scc_reg_addr(%d0), %a2 // A2 = SCC_REGS address
349 movel #0xFFFF, SCC_SCCE(%a2) // clear status bits
350 movel #0x0000, SCC_SCCM(%a2) // interrupt mask
352 movel tx_first_bd(%d0), %d1
363 movel #0xF0B8, SCC_C_MASK(%a1)
364 movel #0xFFFF, SCC_C_PRES(%a1)
373 movel #0xDEBB20E3, SCC_C_MASK(%a1)
374 movel #0xFFFFFFFF, SCC_C_PRES(%a1)
383 movel #0xF0B8, SCC_C_MASK(%a1)
393 movel #0xDEBB20E3, SCC_C_MASK(%a1)
401 movel #0xF0B8, SCC_C_MASK(%a1)
402 movel #0xFFFF, SCC_C_PRES(%a1)
407 movel #0x00000003, SCC_GSMR_H(%a2) // RTSM
410 movel #0x10040900, SCC_GSMR_L(%a2) // NRZI: TCI Tend RECN+TENC=1
414 movel #0x10040000, SCC_GSMR_L(%a2) // NRZ: TCI Tend RECN+TENC=0
417 movel %d0, %d1
433 movel scc_reg_addr(%d0), %a0 // A0 = SCC_REGS address
440 movel ch_status_addr(%d0), %d1
451 movel tx_out(%d0), %d1
452 movel %d1, %d2 // D1 = D2 = tx_out BD# = desc#
460 movel 4(%d2), %a0 // PCI address
464 movel 4(%d1), %a1 // A1 = dest address
465 movel 8(%d2), %d2 // D2 = length
471 movel tx_out(%d0), %d1
476 tx_1: movel %d1, tx_out(%d0)
487 rx: movel rx_in(%d0), %d1 // D1 = rx_in BD#
511 movel rx_out, %d2
517 movel %d3, 8(%d2)
518 movel 4(%d1), %a0 // A0 = source address
519 movel 4(%d2), %a1
524 movel packet_full(%d0), (%d2) // update desc stat
528 movel rx_out, %d2
533 rx_1: movel %d2, rx_out
539 movel rx_in(%d0), %d1
544 rx_2: movel %d1, rx_in(%d0)
548 movel ch_status_addr(%d0), %d2
553 movel ch_status_addr(%d0), %d2
566 movel tx_in(%d0), %d1
567 movel %d1, %d2 // D1 = D2 = tx_in BD# = desc#
577 movel tx_in(%d0), %d1
583 movel %d1, tx_in(%d0)
591 movel #PACKET_SENT, (%d2)
595 movel #PACKET_UNDERRUN, (%d2)
606 movel %d0, -(%sp)
609 movel PLX_DMA_CMD_STS, %d0 // do not btst PLX register directly
617 movel %d0, -(%sp)
620 movel PLX_DMA_CMD_STS, %d0 // do not btst PLX register directly
629 movel (%sp)+, %d0
641 movel %d0, -(%sp)
643 movel PLX_DOORBELL_TO_CARD, %d0
644 movel %d0, PLX_DOORBELL_TO_CARD // confirm all requests
647 movel #0x0909, PLX_DMA_CMD_STS // clear DMA ch #0 and #1 interrupts
649 movel (%sp)+, %d0
657 movel #0x40000000, CISR
663 movel #0x20000000, CISR
669 movel #0x10000000, CISR
675 movel #0x08000000, CISR
685 movel %d0, -(%sp)
686 movel %d1, -(%sp)
687 movel %d2, -(%sp)
688 movel %a0, -(%sp)
689 movel %a1, -(%sp)
692 movel #CSRA, %a0 // A0 = CSR address
750 movel ch_status_addr(%d0), %a1
753 movel %d1, STATUS_CABLE(%a1) // update status
754 movel bell_cable(%d0), PLX_DOORBELL_FROM_CARD // signal the host
762 movel (%sp)+, %a1
763 movel (%sp)+, %a0
764 movel (%sp)+, %d2
765 movel (%sp)+, %d1
766 movel (%sp)+, %d0
780 movel #0x12345678, %d1 // D1 = test value
781 movel %d1, (128 * 1024 - 4)
782 movel #128 * 1024, %d0 // D0 = RAM size tested
786 movel %d0, %a0
796 movel %d1, (128 * 1024 - 4)
801 movel %d0, %a0 // A0 = fill ptr
804 movel %d0, %d1 // D1 = DBf counter
806 movel %a0, -(%a0)
824 movel %a0, PLX_MAILBOX_5