Lines Matching refs:win0base
56 u8 __iomem *win0base; /* ISA window base address */ member
80 #define sca_in(reg, card) readb((card)->win0base + C101_SCA + (reg))
81 #define sca_out(value, reg, card) writeb(value, (card)->win0base + C101_SCA + (reg))
82 #define sca_inw(reg, card) readw((card)->win0base + C101_SCA + (reg))
86 writeb(value & 0xFF, (card)->win0base + C101_SCA + (reg)); \
87 writeb((value >> 8) & 0xFF, (card)->win0base + C101_SCA + (reg + 1));\
94 #define win0base(card) ((card)->win0base) macro
95 #define winbase(card) ((card)->win0base + 0x2000)
107 writeb(page, card->win0base + C101_PAGE); in openwin()
183 writeb(1, port->win0base + C101_DTR); in c101_open()
205 writeb(0, port->win0base + C101_DTR); in c101_close()
276 readb(card->win0base + C101_PAGE); /* Resets SCA? */ in c101_destroy_card()
281 if (card->win0base) { in c101_destroy_card()
282 iounmap(card->win0base); in c101_destroy_card()
340 card->win0base = ioremap(winbase, C101_MAPPED_RAM_SIZE); in c101_run()
341 if (!card->win0base) { in c101_run()
351 readb(card->win0base + C101_PAGE); /* Resets SCA? */ in c101_run()
353 writeb(0, card->win0base + C101_PAGE); in c101_run()
354 writeb(0, card->win0base + C101_DTR); /* Power-up for RAM? */ in c101_run()