113 static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,  in smsc95xx_write_reg()  function
185 	ret = smsc95xx_write_reg(dev, MII_ADDR, addr);  in smsc95xx_mdio_read()
232 	ret = smsc95xx_write_reg(dev, MII_DATA, val);  in smsc95xx_mdio_write()
241 	ret = smsc95xx_write_reg(dev, MII_ADDR, addr);  in smsc95xx_mdio_write()
279 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_mdiobus_reset()
375 		ret = smsc95xx_write_reg(dev, E2P_CMD, val);  in smsc95xx_read_eeprom()
413 	ret = smsc95xx_write_reg(dev, E2P_CMD, val);  in smsc95xx_write_eeprom()
427 		ret = smsc95xx_write_reg(dev, E2P_DATA, val);  in smsc95xx_write_eeprom()
435 		ret = smsc95xx_write_reg(dev, E2P_CMD, val);  in smsc95xx_write_eeprom()
569 	ret = smsc95xx_write_reg(dev, FLOW, flow);  in smsc95xx_phy_update_flowcontrol()
573 	return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);  in smsc95xx_phy_update_flowcontrol()
592 	ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);  in smsc95xx_mac_update_fullduplex()
653 	ret = smsc95xx_write_reg(dev, COE_CR, read_buf);  in smsc95xx_set_features()
839 	ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);  in smsc95xx_set_mac_address()
843 	return smsc95xx_write_reg(dev, ADDRH, addr_hi);  in smsc95xx_set_mac_address()
858 	ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);  in smsc95xx_start_tx_path()
863 	return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);  in smsc95xx_start_tx_path()
876 	return smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);  in smsc95xx_start_rx_path()
887 	ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);  in smsc95xx_reset()
921 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
947 	ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);  in smsc95xx_reset()
959 	ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);  in smsc95xx_reset()
986 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
997 	ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);  in smsc95xx_reset()
1012 	ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, read_buf);  in smsc95xx_reset()
1017 	ret = smsc95xx_write_reg(dev, FLOW, 0);  in smsc95xx_reset()
1021 	ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);  in smsc95xx_reset()
1032 	ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);  in smsc95xx_reset()
1052 	ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);  in smsc95xx_reset()
1326 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_enter_suspend0()
1338 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_enter_suspend0()
1382 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_enter_suspend1()
1390 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_enter_suspend1()
1412 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_enter_suspend2()
1443 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_enter_suspend3()
1451 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_enter_suspend3()
1533 		ret = smsc95xx_write_reg(dev, WUCSR, val);  in smsc95xx_suspend()
1543 		ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_suspend()
1634 			ret = smsc95xx_write_reg(dev, WUFF, filter_mask[i]);  in smsc95xx_suspend()
1643 			ret = smsc95xx_write_reg(dev, WUFF, command[i]);  in smsc95xx_suspend()
1649 			ret = smsc95xx_write_reg(dev, WUFF, offset[i]);  in smsc95xx_suspend()
1655 			ret = smsc95xx_write_reg(dev, WUFF, crc[i]);  in smsc95xx_suspend()
1667 		ret = smsc95xx_write_reg(dev, WUCSR, val);  in smsc95xx_suspend()
1680 		ret = smsc95xx_write_reg(dev, WUCSR, val);  in smsc95xx_suspend()
1706 	ret = smsc95xx_write_reg(dev, WUCSR, val);  in smsc95xx_suspend()
1721 	ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_suspend()
1771 		ret = smsc95xx_write_reg(dev, WUCSR, val);  in smsc95xx_resume()
1783 		ret = smsc95xx_write_reg(dev, PM_CTRL, val);  in smsc95xx_resume()