Lines Matching +full:full +full:- +full:duplex

1 // SPDX-License-Identifier: GPL-2.0+
10 * phy_speed_to_str - Return a string representing the PHY link speed
57 return "Unsupported (update phy-core.c)"; in phy_speed_to_str()
63 * phy_duplex_to_str - Return string describing the duplex
65 * @duplex: Duplex setting to describe
67 const char *phy_duplex_to_str(unsigned int duplex) in phy_duplex_to_str() argument
69 if (duplex == DUPLEX_HALF) in phy_duplex_to_str()
71 if (duplex == DUPLEX_FULL) in phy_duplex_to_str()
72 return "Full"; in phy_duplex_to_str()
73 if (duplex == DUPLEX_UNKNOWN) in phy_duplex_to_str()
75 return "Unsupported (update phy-core.c)"; in phy_duplex_to_str()
80 * phy_rate_matching_to_str - Return a string describing the rate matching
94 return "open-loop"; in phy_rate_matching_to_str()
96 return "Unsupported (update phy-core.c)"; in phy_rate_matching_to_str()
101 * phy_interface_num_ports - Return the number of links that can be carried by
102 * a given MAC-PHY physical link. Returns 0 if this is
155 /* A mapping of all SUPPORTED settings to speed/duplex. This table
157 * - iow, descending speed.
160 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
165 PHY_SETTING( 800000, FULL, 800000baseCR8_Full ),
166 PHY_SETTING( 800000, FULL, 800000baseKR8_Full ),
167 PHY_SETTING( 800000, FULL, 800000baseDR8_Full ),
168 PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full ),
169 PHY_SETTING( 800000, FULL, 800000baseSR8_Full ),
170 PHY_SETTING( 800000, FULL, 800000baseVR8_Full ),
172 PHY_SETTING( 400000, FULL, 400000baseCR8_Full ),
173 PHY_SETTING( 400000, FULL, 400000baseKR8_Full ),
174 PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ),
175 PHY_SETTING( 400000, FULL, 400000baseDR8_Full ),
176 PHY_SETTING( 400000, FULL, 400000baseSR8_Full ),
177 PHY_SETTING( 400000, FULL, 400000baseCR4_Full ),
178 PHY_SETTING( 400000, FULL, 400000baseKR4_Full ),
179 PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ),
180 PHY_SETTING( 400000, FULL, 400000baseDR4_Full ),
181 PHY_SETTING( 400000, FULL, 400000baseSR4_Full ),
183 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
184 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
185 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
186 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
187 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
188 PHY_SETTING( 200000, FULL, 200000baseCR2_Full ),
189 PHY_SETTING( 200000, FULL, 200000baseKR2_Full ),
190 PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ),
191 PHY_SETTING( 200000, FULL, 200000baseDR2_Full ),
192 PHY_SETTING( 200000, FULL, 200000baseSR2_Full ),
194 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
195 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
196 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
197 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
198 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
199 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
200 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
201 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
202 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
203 PHY_SETTING( 100000, FULL, 100000baseCR_Full ),
204 PHY_SETTING( 100000, FULL, 100000baseKR_Full ),
205 PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ),
206 PHY_SETTING( 100000, FULL, 100000baseDR_Full ),
207 PHY_SETTING( 100000, FULL, 100000baseSR_Full ),
209 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
210 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
211 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
212 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
214 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
215 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
216 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
217 PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
218 PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
219 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
220 PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
221 PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
223 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
224 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
225 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
226 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
228 PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
229 PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
230 PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
232 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
233 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
235 PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
236 PHY_SETTING( 10000, FULL, 10000baseER_Full ),
237 PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
238 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
239 PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
240 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
241 PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
242 PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
243 PHY_SETTING( 10000, FULL, 10000baseT_Full ),
245 PHY_SETTING( 5000, FULL, 5000baseT_Full ),
247 PHY_SETTING( 2500, FULL, 2500baseT_Full ),
248 PHY_SETTING( 2500, FULL, 2500baseX_Full ),
250 PHY_SETTING( 1000, FULL, 1000baseT_Full ),
252 PHY_SETTING( 1000, FULL, 1000baseT1_Full ),
253 PHY_SETTING( 1000, FULL, 1000baseX_Full ),
254 PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
256 PHY_SETTING( 100, FULL, 100baseT_Full ),
257 PHY_SETTING( 100, FULL, 100baseT1_Full ),
260 PHY_SETTING( 100, FULL, 100baseFX_Full ),
262 PHY_SETTING( 10, FULL, 10baseT_Full ),
264 PHY_SETTING( 10, FULL, 10baseT1L_Full ),
265 PHY_SETTING( 10, FULL, 10baseT1S_Full ),
272 * phy_lookup_setting - lookup a PHY setting
274 * @duplex: duplex to match
279 * duplex, and which is supported.
289 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact) in phy_lookup_setting() argument
295 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS && in phy_lookup_setting()
296 test_bit(p->bit, mask)) { in phy_lookup_setting()
298 if (p->speed == speed && p->duplex == duplex) { in phy_lookup_setting()
299 /* Exact match for speed and duplex */ in phy_lookup_setting()
303 if (!match && p->speed <= speed) in phy_lookup_setting()
307 if (p->speed < speed) in phy_lookup_setting()
329 (count == 0 || speeds[count - 1] != settings[i].speed)) in phy_speeds()
341 if (p->speed > max_speed) in __set_linkmode_max_speed()
342 linkmode_clear_bit(p->bit, addr); in __set_linkmode_max_speed()
350 __set_linkmode_max_speed(max_speed, phydev->supported); in __set_phy_supported()
354 * phy_set_max_speed - Set the maximum speed the PHY should support
373 struct device_node *node = phydev->mdio.dev.of_node; in of_set_phy_supported()
382 if (!of_property_read_u32(node, "max-speed", &max_speed)) in of_set_phy_supported()
388 struct device_node *node = phydev->mdio.dev.of_node; in of_set_phy_eee_broken()
397 if (of_property_read_bool(node, "eee-broken-100tx")) in of_set_phy_eee_broken()
399 if (of_property_read_bool(node, "eee-broken-1000t")) in of_set_phy_eee_broken()
401 if (of_property_read_bool(node, "eee-broken-10gt")) in of_set_phy_eee_broken()
403 if (of_property_read_bool(node, "eee-broken-1000kx")) in of_set_phy_eee_broken()
405 if (of_property_read_bool(node, "eee-broken-10gkx4")) in of_set_phy_eee_broken()
407 if (of_property_read_bool(node, "eee-broken-10gkr")) in of_set_phy_eee_broken()
410 phydev->eee_broken_modes = broken; in of_set_phy_eee_broken()
414 * phy_resolve_aneg_pause - Determine pause autoneg results
425 if (phydev->duplex == DUPLEX_FULL) { in phy_resolve_aneg_pause()
426 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, in phy_resolve_aneg_pause()
427 phydev->lp_advertising); in phy_resolve_aneg_pause()
428 phydev->asym_pause = linkmode_test_bit( in phy_resolve_aneg_pause()
430 phydev->lp_advertising); in phy_resolve_aneg_pause()
436 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
440 * speed and duplex. If full duplex was negotiated, extract the pause mode
448 linkmode_and(common, phydev->lp_advertising, phydev->advertising); in phy_resolve_aneg_linkmode()
452 phydev->speed = settings[i].speed; in phy_resolve_aneg_linkmode()
453 phydev->duplex = settings[i].duplex; in phy_resolve_aneg_linkmode()
462 * phy_check_downshift - check whether downshift occurred
468 * read_status callback and sets phydev->speed to the actual link speed.
475 phydev->downshifted_rate = 0; in phy_check_downshift()
477 if (phydev->autoneg == AUTONEG_DISABLE || in phy_check_downshift()
478 phydev->speed == SPEED_UNKNOWN) in phy_check_downshift()
481 linkmode_and(common, phydev->lp_advertising, phydev->advertising); in phy_check_downshift()
489 if (speed == SPEED_UNKNOWN || phydev->speed >= speed) in phy_check_downshift()
493 phy_speed_to_str(speed), phy_speed_to_str(phydev->speed)); in phy_check_downshift()
495 phydev->downshifted_rate = 1; in phy_check_downshift()
504 linkmode_and(common, phydev->lp_advertising, phydev->advertising); in phy_resolve_min_speed()
506 while (--i >= 0) { in phy_resolve_min_speed()
508 if (fdx_only && settings[i].duplex != DUPLEX_FULL) in phy_resolve_min_speed()
522 return -EINVAL; in phy_speed_down_core()
524 __set_linkmode_max_speed(min_common_speed, phydev->advertising); in phy_speed_down_core()
544 * __phy_read_mmd - Convenience function for reading a register
557 return -EINVAL; in __phy_read_mmd()
559 if (phydev->drv && phydev->drv->read_mmd) { in __phy_read_mmd()
560 val = phydev->drv->read_mmd(phydev, devad, regnum); in __phy_read_mmd()
561 } else if (phydev->is_c45) { in __phy_read_mmd()
562 val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr, in __phy_read_mmd()
565 struct mii_bus *bus = phydev->mdio.bus; in __phy_read_mmd()
566 int phy_addr = phydev->mdio.addr; in __phy_read_mmd()
578 * phy_read_mmd - Convenience function for reading a register
599 * __phy_write_mmd - Convenience function for writing a register
613 return -EINVAL; in __phy_write_mmd()
615 if (phydev->drv && phydev->drv->write_mmd) { in __phy_write_mmd()
616 ret = phydev->drv->write_mmd(phydev, devad, regnum, val); in __phy_write_mmd()
617 } else if (phydev->is_c45) { in __phy_write_mmd()
618 ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr, in __phy_write_mmd()
621 struct mii_bus *bus = phydev->mdio.bus; in __phy_write_mmd()
622 int phy_addr = phydev->mdio.addr; in __phy_write_mmd()
636 * phy_write_mmd - Convenience function for writing a register
658 * phy_modify_changed - Function for modifying a PHY register
683 * __phy_modify - Convenience function for modifying a PHY register
704 * phy_modify - Convenience function for modifying a given PHY register
727 * __phy_modify_mmd_changed - Function for modifying a register on MMD
759 * phy_modify_mmd_changed - Function for modifying a register on MMD
786 * __phy_modify_mmd - Convenience function for modifying a register on MMD
809 * phy_modify_mmd - Convenience function for modifying a register on MMD
835 …if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n… in __phy_read_page()
836 return -EOPNOTSUPP; in __phy_read_page()
838 return phydev->drv->read_page(phydev); in __phy_read_page()
843 …if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?… in __phy_write_page()
844 return -EOPNOTSUPP; in __phy_write_page()
846 return phydev->drv->write_page(phydev, page); in __phy_write_page()
850 * phy_save_page() - take the bus lock and save the current page
865 * phy_select_page() - take the bus lock, save the current page, and set a page
894 * phy_restore_page() - restore the page register and release the bus lock
933 * phy_read_paged() - Convenience function for reading a paged register
953 * phy_write_paged() - Convenience function for writing a paged register
974 * phy_modify_paged_changed() - Function for modifying a paged register
997 * phy_modify_paged() - Convenience function for modifying a paged register