Lines Matching refs:ret
243 int ret, oui; in xpcs_dev_flag() local
245 ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID1); in xpcs_dev_flag()
246 if (ret < 0) in xpcs_dev_flag()
247 return ret; in xpcs_dev_flag()
249 oui = ret; in xpcs_dev_flag()
251 ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID2); in xpcs_dev_flag()
252 if (ret < 0) in xpcs_dev_flag()
253 return ret; in xpcs_dev_flag()
255 ret = (ret >> 10) & 0x3F; in xpcs_dev_flag()
256 oui |= ret << 16; in xpcs_dev_flag()
268 int ret; in xpcs_poll_reset() local
272 ret = xpcs_read(xpcs, dev, MDIO_CTRL1); in xpcs_poll_reset()
273 if (ret < 0) in xpcs_poll_reset()
274 return ret; in xpcs_poll_reset()
275 } while (ret & MDIO_CTRL1_RESET && --retries); in xpcs_poll_reset()
277 return (ret & MDIO_CTRL1_RESET) ? -ETIMEDOUT : 0; in xpcs_poll_reset()
283 int ret, dev; in xpcs_soft_reset() local
299 ret = xpcs_write(xpcs, dev, MDIO_CTRL1, MDIO_CTRL1_RESET); in xpcs_soft_reset()
300 if (ret < 0) in xpcs_soft_reset()
301 return ret; in xpcs_soft_reset()
316 int ret; in xpcs_read_fault_c73() local
323 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT2); in xpcs_read_fault_c73()
324 if (ret < 0) in xpcs_read_fault_c73()
325 return ret; in xpcs_read_fault_c73()
327 if (ret & MDIO_STAT2_RXFAULT) in xpcs_read_fault_c73()
329 if (ret & MDIO_STAT2_TXFAULT) in xpcs_read_fault_c73()
332 ret = xpcs_read_vendor(xpcs, MDIO_MMD_PCS, DW_VR_XS_PCS_DIG_STS); in xpcs_read_fault_c73()
333 if (ret < 0) in xpcs_read_fault_c73()
334 return ret; in xpcs_read_fault_c73()
336 if (ret & DW_RXFIFO_ERR) { in xpcs_read_fault_c73()
341 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1); in xpcs_read_fault_c73()
342 if (ret < 0) in xpcs_read_fault_c73()
343 return ret; in xpcs_read_fault_c73()
345 if (!(ret & MDIO_PCS_10GBRT_STAT1_BLKLK)) in xpcs_read_fault_c73()
348 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT2); in xpcs_read_fault_c73()
349 if (ret < 0) in xpcs_read_fault_c73()
350 return ret; in xpcs_read_fault_c73()
352 if (ret & MDIO_PCS_10GBRT_STAT2_ERR) { in xpcs_read_fault_c73()
362 int ret, speed_sel; in xpcs_config_usxgmii() local
388 ret = xpcs_read_vpcs(xpcs, MDIO_CTRL1); in xpcs_config_usxgmii()
389 if (ret < 0) in xpcs_config_usxgmii()
392 ret = xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_EN); in xpcs_config_usxgmii()
393 if (ret < 0) in xpcs_config_usxgmii()
396 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1); in xpcs_config_usxgmii()
397 if (ret < 0) in xpcs_config_usxgmii()
400 ret &= ~DW_USXGMII_SS_MASK; in xpcs_config_usxgmii()
401 ret |= speed_sel | DW_USXGMII_FULL; in xpcs_config_usxgmii()
403 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret); in xpcs_config_usxgmii()
404 if (ret < 0) in xpcs_config_usxgmii()
407 ret = xpcs_read_vpcs(xpcs, MDIO_CTRL1); in xpcs_config_usxgmii()
408 if (ret < 0) in xpcs_config_usxgmii()
411 ret = xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_RST); in xpcs_config_usxgmii()
412 if (ret < 0) in xpcs_config_usxgmii()
418 pr_err("%s: XPCS access returned %pe\n", __func__, ERR_PTR(ret)); in xpcs_config_usxgmii()
424 int ret, adv; in _xpcs_config_aneg_c73() local
439 ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV3, adv); in _xpcs_config_aneg_c73()
440 if (ret < 0) in _xpcs_config_aneg_c73()
441 return ret; in _xpcs_config_aneg_c73()
452 ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV2, adv); in _xpcs_config_aneg_c73()
453 if (ret < 0) in _xpcs_config_aneg_c73()
454 return ret; in _xpcs_config_aneg_c73()
469 int ret; in xpcs_config_aneg_c73() local
471 ret = _xpcs_config_aneg_c73(xpcs, compat); in xpcs_config_aneg_c73()
472 if (ret < 0) in xpcs_config_aneg_c73()
473 return ret; in xpcs_config_aneg_c73()
475 ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_CTRL1); in xpcs_config_aneg_c73()
476 if (ret < 0) in xpcs_config_aneg_c73()
477 return ret; in xpcs_config_aneg_c73()
479 ret |= MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART; in xpcs_config_aneg_c73()
481 return xpcs_write(xpcs, MDIO_MMD_AN, MDIO_CTRL1, ret); in xpcs_config_aneg_c73()
488 int ret; in xpcs_aneg_done_c73() local
491 ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_AN_LPA); in xpcs_aneg_done_c73()
492 if (ret < 0) in xpcs_aneg_done_c73()
493 return ret; in xpcs_aneg_done_c73()
496 if (!(ret & DW_C73_AN_ADV_SF)) { in xpcs_aneg_done_c73()
511 int i, ret; in xpcs_read_lpa_c73() local
522 ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_AN_LPA + i); in xpcs_read_lpa_c73()
523 if (ret < 0) in xpcs_read_lpa_c73()
524 return ret; in xpcs_read_lpa_c73()
526 lpa[i] = ret; in xpcs_read_lpa_c73()
647 int ret; in xpcs_config_eee() local
649 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0); in xpcs_config_eee()
650 if (ret < 0) in xpcs_config_eee()
651 return ret; in xpcs_config_eee()
655 ret = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN | in xpcs_config_eee()
660 ret &= ~(DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN | in xpcs_config_eee()
666 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, ret); in xpcs_config_eee()
667 if (ret < 0) in xpcs_config_eee()
668 return ret; in xpcs_config_eee()
670 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1); in xpcs_config_eee()
671 if (ret < 0) in xpcs_config_eee()
672 return ret; in xpcs_config_eee()
675 ret |= DW_VR_MII_EEE_TRN_LPI; in xpcs_config_eee()
677 ret &= ~DW_VR_MII_EEE_TRN_LPI; in xpcs_config_eee()
679 return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1, ret); in xpcs_config_eee()
686 int ret, mdio_ctrl, tx_conf; in xpcs_config_aneg_c37_sgmii() local
712 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, in xpcs_config_aneg_c37_sgmii()
714 if (ret < 0) in xpcs_config_aneg_c37_sgmii()
715 return ret; in xpcs_config_aneg_c37_sgmii()
718 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL); in xpcs_config_aneg_c37_sgmii()
719 if (ret < 0) in xpcs_config_aneg_c37_sgmii()
720 return ret; in xpcs_config_aneg_c37_sgmii()
722 ret &= ~(DW_VR_MII_PCS_MODE_MASK | DW_VR_MII_TX_CONFIG_MASK); in xpcs_config_aneg_c37_sgmii()
723 ret |= (DW_VR_MII_PCS_MODE_C37_SGMII << in xpcs_config_aneg_c37_sgmii()
727 ret |= DW_VR_MII_AN_CTRL_8BIT; in xpcs_config_aneg_c37_sgmii()
733 ret |= tx_conf << DW_VR_MII_AN_CTRL_TX_CONFIG_SHIFT & in xpcs_config_aneg_c37_sgmii()
735 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, ret); in xpcs_config_aneg_c37_sgmii()
736 if (ret < 0) in xpcs_config_aneg_c37_sgmii()
737 return ret; in xpcs_config_aneg_c37_sgmii()
739 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1); in xpcs_config_aneg_c37_sgmii()
740 if (ret < 0) in xpcs_config_aneg_c37_sgmii()
741 return ret; in xpcs_config_aneg_c37_sgmii()
744 ret |= DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW; in xpcs_config_aneg_c37_sgmii()
746 ret &= ~DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW; in xpcs_config_aneg_c37_sgmii()
749 ret |= DW_VR_MII_DIG_CTRL1_PHY_MODE_CTRL; in xpcs_config_aneg_c37_sgmii()
751 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret); in xpcs_config_aneg_c37_sgmii()
752 if (ret < 0) in xpcs_config_aneg_c37_sgmii()
753 return ret; in xpcs_config_aneg_c37_sgmii()
756 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, in xpcs_config_aneg_c37_sgmii()
759 return ret; in xpcs_config_aneg_c37_sgmii()
767 int ret, mdio_ctrl, adv; in xpcs_config_aneg_c37_1000basex() local
783 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, in xpcs_config_aneg_c37_1000basex()
785 if (ret < 0) in xpcs_config_aneg_c37_1000basex()
786 return ret; in xpcs_config_aneg_c37_1000basex()
789 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL); in xpcs_config_aneg_c37_1000basex()
790 if (ret < 0) in xpcs_config_aneg_c37_1000basex()
791 return ret; in xpcs_config_aneg_c37_1000basex()
793 ret &= ~DW_VR_MII_PCS_MODE_MASK; in xpcs_config_aneg_c37_1000basex()
795 ret |= DW_VR_MII_AN_INTR_EN; in xpcs_config_aneg_c37_1000basex()
796 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, ret); in xpcs_config_aneg_c37_1000basex()
797 if (ret < 0) in xpcs_config_aneg_c37_1000basex()
798 return ret; in xpcs_config_aneg_c37_1000basex()
806 ret = xpcs_modify_changed(xpcs, MDIO_MMD_VEND2, in xpcs_config_aneg_c37_1000basex()
808 if (ret < 0) in xpcs_config_aneg_c37_1000basex()
809 return ret; in xpcs_config_aneg_c37_1000basex()
811 changed = ret; in xpcs_config_aneg_c37_1000basex()
815 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0); in xpcs_config_aneg_c37_1000basex()
816 if (ret < 0) in xpcs_config_aneg_c37_1000basex()
817 return ret; in xpcs_config_aneg_c37_1000basex()
820 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, in xpcs_config_aneg_c37_1000basex()
822 if (ret < 0) in xpcs_config_aneg_c37_1000basex()
823 return ret; in xpcs_config_aneg_c37_1000basex()
831 int ret; in xpcs_config_2500basex() local
833 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1); in xpcs_config_2500basex()
834 if (ret < 0) in xpcs_config_2500basex()
835 return ret; in xpcs_config_2500basex()
836 ret |= DW_VR_MII_DIG_CTRL1_2G5_EN; in xpcs_config_2500basex()
837 ret &= ~DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW; in xpcs_config_2500basex()
838 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret); in xpcs_config_2500basex()
839 if (ret < 0) in xpcs_config_2500basex()
840 return ret; in xpcs_config_2500basex()
842 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL); in xpcs_config_2500basex()
843 if (ret < 0) in xpcs_config_2500basex()
844 return ret; in xpcs_config_2500basex()
845 ret &= ~AN_CL37_EN; in xpcs_config_2500basex()
846 ret |= SGMII_SPEED_SS6; in xpcs_config_2500basex()
847 ret &= ~SGMII_SPEED_SS13; in xpcs_config_2500basex()
848 return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, ret); in xpcs_config_2500basex()
855 int ret; in xpcs_do_config() local
862 ret = txgbe_xpcs_switch_mode(xpcs, interface); in xpcs_do_config()
863 if (ret) in xpcs_do_config()
864 return ret; in xpcs_do_config()
872 ret = xpcs_config_aneg_c73(xpcs, compat); in xpcs_do_config()
873 if (ret) in xpcs_do_config()
874 return ret; in xpcs_do_config()
878 ret = xpcs_config_aneg_c37_sgmii(xpcs, neg_mode); in xpcs_do_config()
879 if (ret) in xpcs_do_config()
880 return ret; in xpcs_do_config()
883 ret = xpcs_config_aneg_c37_1000basex(xpcs, neg_mode, in xpcs_do_config()
885 if (ret) in xpcs_do_config()
886 return ret; in xpcs_do_config()
889 ret = xpcs_config_2500basex(xpcs); in xpcs_do_config()
890 if (ret) in xpcs_do_config()
891 return ret; in xpcs_do_config()
898 ret = compat->pma_config(xpcs); in xpcs_do_config()
899 if (ret) in xpcs_do_config()
900 return ret; in xpcs_do_config()
924 int ret; in xpcs_get_state_c73() local
940 ret = xpcs_read_fault_c73(xpcs, state, pcs_stat1); in xpcs_get_state_c73()
941 if (ret) { in xpcs_get_state_c73()
942 ret = xpcs_soft_reset(xpcs, compat); in xpcs_get_state_c73()
943 if (ret) in xpcs_get_state_c73()
944 return ret; in xpcs_get_state_c73()
976 ret = xpcs_read_lpa_c73(xpcs, state, an_stat1); in xpcs_get_state_c73()
977 if (ret < 0) { in xpcs_get_state_c73()
979 return ret; in xpcs_get_state_c73()
993 int ret; in xpcs_get_state_c37_sgmii() local
1004 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS); in xpcs_get_state_c37_sgmii()
1005 if (ret < 0) in xpcs_get_state_c37_sgmii()
1006 return ret; in xpcs_get_state_c37_sgmii()
1008 if (ret & DW_VR_MII_C37_ANSGM_SP_LNKSTS) { in xpcs_get_state_c37_sgmii()
1013 speed_value = (ret & DW_VR_MII_AN_STS_C37_ANSGM_SP) >> in xpcs_get_state_c37_sgmii()
1022 if (ret & DW_VR_MII_AN_STS_C37_ANSGM_FD) in xpcs_get_state_c37_sgmii()
1026 } else if (ret == DW_VR_MII_AN_STS_C37_ANCMPLT_INTR) { in xpcs_get_state_c37_sgmii()
1098 int ret; in xpcs_get_state() local
1109 ret = xpcs_get_state_c73(xpcs, state, compat); in xpcs_get_state()
1110 if (ret) { in xpcs_get_state()
1112 ERR_PTR(ret)); in xpcs_get_state()
1117 ret = xpcs_get_state_c37_sgmii(xpcs, state); in xpcs_get_state()
1118 if (ret) { in xpcs_get_state()
1120 ERR_PTR(ret)); in xpcs_get_state()
1124 ret = xpcs_get_state_c37_1000basex(xpcs, state); in xpcs_get_state()
1125 if (ret) { in xpcs_get_state()
1127 ERR_PTR(ret)); in xpcs_get_state()
1138 int val, ret; in xpcs_link_up_sgmii() local
1144 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, val); in xpcs_link_up_sgmii()
1145 if (ret) in xpcs_link_up_sgmii()
1146 pr_err("%s: xpcs_write returned %pe\n", __func__, ERR_PTR(ret)); in xpcs_link_up_sgmii()
1152 int val, ret; in xpcs_link_up_1000basex() local
1173 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, val); in xpcs_link_up_1000basex()
1174 if (ret) in xpcs_link_up_1000basex()
1175 pr_err("%s: xpcs_write returned %pe\n", __func__, ERR_PTR(ret)); in xpcs_link_up_1000basex()
1195 int ret; in xpcs_an_restart() local
1197 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1); in xpcs_an_restart()
1198 if (ret >= 0) { in xpcs_an_restart()
1199 ret |= BMCR_ANRESTART; in xpcs_an_restart()
1200 xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret); in xpcs_an_restart()
1206 int ret; in xpcs_get_id() local
1210 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID1); in xpcs_get_id()
1211 if (ret < 0) in xpcs_get_id()
1214 id = ret << 16; in xpcs_get_id()
1216 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID2); in xpcs_get_id()
1217 if (ret < 0) in xpcs_get_id()
1223 if ((id | ret) && (id | ret) != 0xffffffff) in xpcs_get_id()
1224 return id | ret; in xpcs_get_id()
1227 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID1); in xpcs_get_id()
1228 if (ret < 0) in xpcs_get_id()
1231 id = ret << 16; in xpcs_get_id()
1233 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID2); in xpcs_get_id()
1234 if (ret < 0) in xpcs_get_id()
1238 if (id | ret) in xpcs_get_id()
1239 return id | ret; in xpcs_get_id()
1345 int i, ret; in xpcs_create() local
1367 ret = -ENODEV; in xpcs_create()
1371 ret = xpcs_dev_flag(xpcs); in xpcs_create()
1372 if (ret) in xpcs_create()
1381 ret = xpcs_soft_reset(xpcs, compat); in xpcs_create()
1382 if (ret) in xpcs_create()
1389 ret = -ENODEV; in xpcs_create()
1395 return ERR_PTR(ret); in xpcs_create()