127 struct miic {  struct
141 	struct miic *miic;  member
152 static void miic_reg_writel(struct miic *miic, int offset, u32 value)  in miic_reg_writel()  argument
154 	writel(value, miic->base + offset);  in miic_reg_writel()
157 static u32 miic_reg_readl(struct miic *miic, int offset)  in miic_reg_readl()  argument
159 	return readl(miic->base + offset);  in miic_reg_readl()
162 static void miic_reg_rmw(struct miic *miic, int offset, u32 mask, u32 val)  in miic_reg_rmw()  argument
166 	spin_lock(&miic->lock);  in miic_reg_rmw()
168 	reg = miic_reg_readl(miic, offset);  in miic_reg_rmw()
171 	miic_reg_writel(miic, offset, reg);  in miic_reg_rmw()
173 	spin_unlock(&miic->lock);  in miic_reg_rmw()
176 static void miic_converter_enable(struct miic *miic, int port, int enable)  in miic_converter_enable()  argument
183 	miic_reg_rmw(miic, MIIC_CONVRST, MIIC_CONVRST_PHYIF_RST(port), val);  in miic_converter_enable()
191 	struct miic *miic = miic_port->miic;  in miic_config()  local
231 	miic_reg_rmw(miic, MIIC_CONVCTRL(port), mask, val);  in miic_config()
232 	miic_converter_enable(miic, miic_port->port, 1);  in miic_config()
241 	struct miic *miic = miic_port->miic;  in miic_link_up()  local
267 	miic_reg_rmw(miic, MIIC_CONVCTRL(port),  in miic_link_up()
293 	struct miic *miic;  in miic_create()  local
329 	miic = platform_get_drvdata(pdev);  in miic_create()
330 	device_link_add(dev, miic->dev, DL_FLAG_AUTOREMOVE_CONSUMER);  in miic_create()
333 	miic_port->miic = miic;  in miic_create()
345 	miic_converter_enable(miic_port->miic, miic_port->port, 0);  in miic_destroy()
350 static int miic_init_hw(struct miic *miic, u32 cfg_mode)  in miic_init_hw()  argument
358 	miic_reg_writel(miic, MIIC_PRCMD, 0x00A5);  in miic_init_hw()
359 	miic_reg_writel(miic, MIIC_PRCMD, 0x0001);  in miic_init_hw()
360 	miic_reg_writel(miic, MIIC_PRCMD, 0xFFFE);  in miic_init_hw()
361 	miic_reg_writel(miic, MIIC_PRCMD, 0x0001);  in miic_init_hw()
363 	miic_reg_writel(miic, MIIC_MODCTRL,  in miic_init_hw()
367 		miic_converter_enable(miic, port, 0);  in miic_init_hw()
372 		miic_reg_writel(miic, MIIC_SWCTRL, 0x0);  in miic_init_hw()
373 		miic_reg_writel(miic, MIIC_SWDUPC, 0x0);  in miic_init_hw()
463 	struct miic *miic;  in miic_probe()  local
471 	miic = devm_kzalloc(dev, sizeof(*miic), GFP_KERNEL);  in miic_probe()
472 	if (!miic)  in miic_probe()
475 	spin_lock_init(&miic->lock);  in miic_probe()
476 	miic->dev = dev;  in miic_probe()
477 	miic->base = devm_platform_ioremap_resource(pdev, 0);  in miic_probe()
478 	if (IS_ERR(miic->base))  in miic_probe()
479 		return PTR_ERR(miic->base);  in miic_probe()
489 	ret = miic_init_hw(miic, mode_cfg);  in miic_probe()
498 	platform_set_drvdata(pdev, miic);  in miic_probe()