1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/pcs-rzn1-miic.h>
17 #include <dt-bindings/net/pcs-rzn1-miic.h>
52 #define MIIC_MODCTRL_CONF_NONE		-1
55  * struct modctrl_match - Matching table entry for  convctrl configuration
58  * @conv: Configuration of ethernet port muxes. First index is SWITCH_PORTIN,
59  *	  then index 1 - 5 are CONV1 - CONV5.
63 	u8 conv[MIIC_MODCTRL_CONF_CONV_NUM];  member
122  * struct miic - MII converter structure
123  * @base: base address of the MII converter
124  * @dev: Device associated to the MII converter
125  * @lock: Lock used for read-modify-write access
134  * struct miic_port - Per port MII converter struct
135  * @miic: backiling to MII converter structure
154 	writel(value, miic->base + offset);  in miic_reg_writel()
159 	return readl(miic->base + offset);  in miic_reg_readl()
166 	spin_lock(&miic->lock);  in miic_reg_rmw()
173 	spin_unlock(&miic->lock);  in miic_reg_rmw()
191 	struct miic *miic = miic_port->miic;  in miic_config()
193 	int port = miic_port->port;  in miic_config()
209 		/* When in MII mode, speed should be set to 0 (which is actually  in miic_config()
215 		return -EOPNOTSUPP;  in miic_config()
225 	if (interface != miic_port->interface) {  in miic_config()
228 		miic_port->interface = interface;  in miic_config()
232 	miic_converter_enable(miic, miic_port->port, 1);  in miic_config()
241 	struct miic *miic = miic_port->miic;  in miic_link_up()
243 	int port = miic_port->port;  in miic_link_up()
248 	/* No speed in MII through-mode */  in miic_link_up()
274 	if (phy_interface_mode_is_rgmii(state->interface) ||  in miic_validate()
275 	    state->interface == PHY_INTERFACE_MODE_RMII ||  in miic_validate()
276 	    state->interface == PHY_INTERFACE_MODE_MII)  in miic_validate()
279 	return -EINVAL;  in miic_validate()
297 		return ERR_PTR(-ENODEV);  in miic_create()
300 		return ERR_PTR(-EINVAL);  in miic_create()
303 		return ERR_PTR(-EINVAL);  in miic_create()
308 		return ERR_PTR(-ENODEV);  in miic_create()
312 		return ERR_PTR(-ENODEV);  in miic_create()
319 			put_device(&pdev->dev);  in miic_create()
320 		return ERR_PTR(-EPROBE_DEFER);  in miic_create()
325 		put_device(&pdev->dev);  in miic_create()
326 		return ERR_PTR(-ENOMEM);  in miic_create()
330 	device_link_add(dev, miic->dev, DL_FLAG_AUTOREMOVE_CONSUMER);  in miic_create()
331 	put_device(&pdev->dev);  in miic_create()
333 	miic_port->miic = miic;  in miic_create()
334 	miic_port->port = port - 1;  in miic_create()
335 	miic_port->pcs.ops = &miic_phylink_ops;  in miic_create()
337 	return &miic_port->pcs;  in miic_create()
345 	miic_converter_enable(miic_port->miic, miic_port->port, 0);  in miic_destroy()
355 	 * is going to be used in conjunction with the Cortex-M3, this sequence  in miic_init_hw()
421 		if (miic_modctrl_match(table_entry->conv, dt_val)) {  in miic_match_dt_conf()
422 			*mode_cfg = table_entry->mode_cfg;  in miic_match_dt_conf()
430 	return -EINVAL;  in miic_match_dt_conf()
436 	struct device_node *np = dev->of_node;  in miic_parse_dt()
437 	struct device_node *conv;  in miic_parse_dt()  local
443 	if (of_property_read_u32(np, "renesas,miic-switch-portin", &conf) == 0)  in miic_parse_dt()
446 	for_each_child_of_node(np, conv) {  in miic_parse_dt()
447 		if (of_property_read_u32(conv, "reg", &port))  in miic_parse_dt()
450 		if (!of_device_is_available(conv))  in miic_parse_dt()
453 		if (of_property_read_u32(conv, "renesas,miic-input", &conf) == 0)  in miic_parse_dt()
462 	struct device *dev = &pdev->dev;  in miic_probe()
473 		return -ENOMEM;  in miic_probe()
475 	spin_lock_init(&miic->lock);  in miic_probe()
476 	miic->dev = dev;  in miic_probe()
477 	miic->base = devm_platform_ioremap_resource(pdev, 0);  in miic_probe()
478 	if (IS_ERR(miic->base))  in miic_probe()
479 		return PTR_ERR(miic->base);  in miic_probe()
510 	pm_runtime_put(&pdev->dev);  in miic_remove()
516 	{ .compatible = "renesas,rzn1-miic" },
533 MODULE_DESCRIPTION("Renesas MII converter PCS driver");