Lines Matching full:v4
63 FILT_ROUT_HASH_EN, /* IPA v4.2 */
64 FILT_ROUT_HASH_FLUSH, /* Not IPA v4.2 nor IPA v5.0+ */
67 IPA_BCR, /* Not IPA v4.5+ */
70 COUNTER_CFG, /* Not IPA v4.5+ */
74 QTIME_TIMESTAMP_CFG, /* IPA v4.5+ */
75 TIMERS_XO_CLK_DIV_CFG, /* IPA v4.5+ */
76 TIMERS_PULSE_GRAN_CFG, /* IPA v4.5+ */
79 SRC_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+; IPA v4.5, IPA v5.0 */
83 DST_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+; IPA v4.5, IPA v5.0 */
85 ENDP_INIT_CTRL, /* Not IPA v4.2+ for TX, not IPA v4.0+ for RX */
99 ENDP_FILTER_ROUTER_HSH_CFG, /* Not IPA v4.2 */
115 COMP_CFG_ENABLE, /* Not IPA v4.0+ */
116 RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS, /* IPA v4.7+ */
120 IPA_DCMP_FAST_CLK_EN, /* Not IPA v4.5+ */
121 IPA_QMB_SELECT_CONS_EN, /* IPA v4.0+ */
122 IPA_QMB_SELECT_PROD_EN, /* IPA v4.0+ */
123 GSI_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
124 GSI_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
125 GEN_QMB_0_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
126 GEN_QMB_1_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
127 GEN_QMB_0_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
128 GEN_QMB_1_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
129 GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS, /* IPA v4.0+ */
130 GSI_SNOC_CNOC_LOOP_PROT_DISABLE, /* IPA v4.0+ */
131 GSI_MULTI_AXI_MASTERS_DIS, /* IPA v4.0+ */
132 IPA_QMB_SELECT_GLOBAL_EN, /* IPA v4.0+ */
133 QMB_RAM_RD_CACHE_DISABLE, /* IPA v4.9+ */
134 GENQMB_AOOOWR, /* IPA v4.9+ */
135 IF_OUT_OF_BUF_STOP_RESET_MASK_EN, /* IPA v4.9+ */
136 GEN_QMB_1_DYNAMIC_ASIZE, /* IPA v4.9+ */
137 GEN_QMB_0_DYNAMIC_ASIZE, /* IPA v4.9+ */
138 ATOMIC_FETCHER_ARB_LOCK_DIS, /* IPA v4.0+ */
139 FULL_FLUSH_WAIT_RS_CLOSURE_EN, /* IPA v4.5+ */
161 CLKON_DCMP, /* IPA v4.5+ */
166 QSB2AXI_CMDQ_L, /* IPA v4.0+ */
167 AGGR_WRAPPER, /* IPA v4.0+ */
168 RAM_SLAVEWAY, /* IPA v4.0+ */
169 CLKON_QMB, /* IPA v4.0+ */
170 WEIGHT_ARB, /* IPA v4.0+ */
171 GSI_IF, /* IPA v4.0+ */
172 CLKON_GLOBAL, /* IPA v4.0+ */
173 GLOBAL_2X_CLK, /* IPA v4.0+ */
174 DPL_FIFO, /* IPA v4.5+ */
175 DRBIP, /* IPA v4.7+ */
204 GEN_QMB_0_MAX_READS_BEATS, /* IPA v4.0+ */
205 GEN_QMB_1_MAX_READS_BEATS, /* IPA v4.0+ */
224 BCR_CMDQ_L_LACK_ONE_ENTRY = 0x0, /* Not IPA v4.2+ */
225 BCR_TX_NOT_USING_BRESP = 0x1, /* Not IPA v4.2+ */
226 BCR_TX_SUSPEND_IRQ_ASSERT_ONCE = 0x2, /* Not IPA v4.0+ */
227 BCR_SUSPEND_L2_IRQ = 0x3, /* Not IPA v4.2+ */
228 BCR_HOLB_DROP_L2_IRQ = 0x4, /* Not IPA v4.2+ */
249 TX0_PREFETCH_DISABLE, /* Not v4.0+ */
250 TX1_PREFETCH_DISABLE, /* Not v4.0+ */
251 PREFETCH_ALMOST_EMPTY_SIZE, /* Not v4.0+ */
252 PREFETCH_ALMOST_EMPTY_SIZE_TX0, /* v4.0+ */
253 DMAW_SCND_OUTSD_PRED_THRESHOLD, /* v4.0+ */
254 DMAW_SCND_OUTSD_PRED_EN, /* v4.0+ */
255 DMAW_MAX_BEATS_256_DIS, /* v4.0+ */
256 PA_MASK_EN, /* v4.0+ */
257 PREFETCH_ALMOST_EMPTY_SIZE_TX1, /* v4.0+ */
258 DUAL_TX_ENABLE, /* v4.5+ */
259 SSPND_PA_NO_START_STATE, /* v4,2+, not v4.5 */
260 SSPND_PA_NO_BQ_STATE, /* v4.2 only */
322 ENDP_SUSPEND, /* Not v4.0+ */
323 ENDP_DELAY, /* Not v4.2+ */
337 IPA_CS_OFFLOAD_UL /* TX */ = 0x1, /* Not IPA v4.5+ */
338 IPA_CS_OFFLOAD_DL /* RX */ = 0x2, /* Not IPA v4.5+ */
339 IPA_CS_OFFLOAD_INLINE /* TX and RX */ = 0x1, /* IPA v4.5+ */
362 HDR_A5_MUX, /* Not v4.9+ */
364 HDR_METADATA_REG_VALID, /* Not v4.5+ */
365 HDR_LEN_MSB, /* v4.5+ */
366 HDR_OFST_METADATA_MSB, /* v4.5+ */
377 HDR_TOTAL_LEN_OR_PAD_OFFSET_MSB, /* v4.5+ */
378 HDR_OFST_PKT_SIZE_MSB, /* v4.5+ */
379 HDR_ADDITIONAL_CONST_LEN_MSB, /* v4.5+ */
387 DCPH_ENABLE, /* v4.5+ */
392 HDR_FTCH_DISABLE, /* v4.5+ */
393 DRBIP_ACL_ENABLE, /* v4.9+ */
442 TIMER_BASE_VALUE, /* Not v4.5+ */
443 TIMER_SCALE, /* v4.2 only */
444 TIMER_LIMIT, /* v4.5+ */
445 TIMER_GRAN_SEL, /* v4.5+ */
466 SEQ_REP_TYPE, /* Not v4.5+ */
515 STATUS_LOCATION, /* Not v4.5+ */
516 STATUS_PKT_SUPPRESS, /* v4.0+ */
613 /* The next bit is not present for IPA v4.5+ */
618 /* The next bit is present for IPA v4.5+ */
620 /* The next three bits are present for IPA v4.9+ */