152 	u32 reg_data;  in xemaclite_enable_interrupts()  local
155 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_enable_interrupts()
156 	xemaclite_writel(reg_data | XEL_TSR_XMIT_IE_MASK,  in xemaclite_enable_interrupts()
175 	u32 reg_data;  in xemaclite_disable_interrupts()  local
181 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);  in xemaclite_disable_interrupts()
182 	xemaclite_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),  in xemaclite_disable_interrupts()
186 	reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET);  in xemaclite_disable_interrupts()
187 	xemaclite_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),  in xemaclite_disable_interrupts()
310 	u32 reg_data;  in xemaclite_send_data()  local
321 	reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);  in xemaclite_send_data()
322 	if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |  in xemaclite_send_data()
334 		reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);  in xemaclite_send_data()
336 		if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |  in xemaclite_send_data()
354 	reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);  in xemaclite_send_data()
355 	reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);  in xemaclite_send_data()
356 	xemaclite_writel(reg_data, addr + XEL_TSR_OFFSET);  in xemaclite_send_data()
376 	u32 reg_data;  in xemaclite_recv_data()  local
382 	reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);  in xemaclite_recv_data()
384 	if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {  in xemaclite_recv_data()
401 		reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);  in xemaclite_recv_data()
402 		if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=  in xemaclite_recv_data()
447 	reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);  in xemaclite_recv_data()
448 	reg_data &= ~XEL_RSR_RECV_DONE_MASK;  in xemaclite_recv_data()
449 	xemaclite_writel(reg_data, addr + XEL_RSR_OFFSET);  in xemaclite_recv_data()
469 	u32 reg_data;  in xemaclite_update_address()  local
479 	reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);  in xemaclite_update_address()
480 	xemaclite_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);  in xemaclite_update_address()