Lines Matching refs:hme_read32

210 #define hme_read32(__hp, __reg) \  macro
223 #define hme_read32(__hp, __reg) \ macro
240 #define hme_read32(__hp, __reg) \ macro
275 ret = hme_read32(hp, tregs + TCVR_CFG);
291 retval = hme_read32(hp, tregs + TCVR_CFG); in BB_GET_BIT2()
410 while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries) in happy_meal_tcvr_read()
416 retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff; in happy_meal_tcvr_read()
441 while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries) in happy_meal_tcvr_write()
566 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & in set_happy_link_modes()
568 while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE) in set_happy_link_modes()
573 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) | in set_happy_link_modes()
578 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & in set_happy_link_modes()
582 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) | in set_happy_link_modes()
909 while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries) in happy_meal_tx_reset()
929 while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries) in happy_meal_rx_reset()
951 while (hme_read32(hp, gregs + GREG_SWRESET) && --tries) in happy_meal_stop()
967 stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR); in happy_meal_get_counters()
970 stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR); in happy_meal_get_counters()
973 stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR); in happy_meal_get_counters()
976 stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR); in happy_meal_get_counters()
979 (hme_read32(hp, bregs + BMAC_EXCTR) + in happy_meal_get_counters()
980 hme_read32(hp, bregs + BMAC_LTCTR)); in happy_meal_get_counters()
997 tconfig = hme_read32(hp, tregs + TCVR_CFG); in happy_meal_tcvr_reset()
1088 unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG); in happy_meal_transceiver_check()
1089 u32 reread = hme_read32(hp, tregs + TCVR_CFG); in happy_meal_transceiver_check()
1288 hme_read32(hp, tregs + TCVR_CFG)); in happy_meal_init()
1290 hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE)); in happy_meal_init()
1293 hme_read32(hp, tregs + TCVR_CFG)); in happy_meal_init()
1295 hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE); in happy_meal_init()
1386 if (hme_read32(hp, erxregs + ERX_RING) != in happy_meal_init()
1435 hme_read32(hp, gregs + GREG_CFG), bursts); in happy_meal_init()
1444 hme_read32(hp, etxregs + ETX_RSIZE)); in happy_meal_init()
1448 HMD("tx dma enable old[%08x]\n", hme_read32(hp, etxregs + ETX_CFG)); in happy_meal_init()
1450 hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE); in happy_meal_init()
1458 hme_read32(hp, erxregs + ERX_CFG)); in happy_meal_init()
1460 regtmp = hme_read32(hp, erxregs + ERX_CFG); in happy_meal_init()
1462 if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) { in happy_meal_init()
1473 hme_read32(hp, bregs + BMAC_RXCFG)); in happy_meal_init()
1507 HMD("XIF config old[%08x]\n", hme_read32(hp, bregs + BMAC_XIFCFG)); in happy_meal_init()
1512 hme_read32(hp, bregs + BMAC_TXCFG), in happy_meal_init()
1513 hme_read32(hp, bregs + BMAC_RXCFG)); in happy_meal_init()
1520 hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE); in happy_meal_init()
1522 hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE); in happy_meal_init()
1541 hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE)); in happy_meal_set_initial_advertisement()
1544 hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE); in happy_meal_set_initial_advertisement()
1867 u32 happy_status = hme_read32(hp, hp->gregs + GREG_STAT); in happy_meal_interrupt()
1941 hme_read32(hp, hp->gregs + GREG_STAT), in happy_meal_tx_timeout()
1942 hme_read32(hp, hp->etxregs + ETX_CFG), in happy_meal_tx_timeout()
1943 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG)); in happy_meal_tx_timeout()
2101 hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC); in happy_meal_set_multicast()