12 				  struct dma_desc *p, void __iomem *ioaddr)  in dwxgmac2_get_tx_status()  argument
14 	unsigned int tdes3 = le32_to_cpu(p->des3);  in dwxgmac2_get_tx_status()
26 				  struct dma_desc *p)  in dwxgmac2_get_rx_status()  argument
28 	unsigned int rdes3 = le32_to_cpu(p->des3);  in dwxgmac2_get_rx_status()
42 static int dwxgmac2_get_tx_len(struct dma_desc *p)  in dwxgmac2_get_tx_len()  argument
44 	return (le32_to_cpu(p->des2) & XGMAC_TDES2_B1L);  in dwxgmac2_get_tx_len()
47 static int dwxgmac2_get_tx_owner(struct dma_desc *p)  in dwxgmac2_get_tx_owner()  argument
49 	return (le32_to_cpu(p->des3) & XGMAC_TDES3_OWN) > 0;  in dwxgmac2_get_tx_owner()
52 static void dwxgmac2_set_tx_owner(struct dma_desc *p)  in dwxgmac2_set_tx_owner()  argument
54 	p->des3 |= cpu_to_le32(XGMAC_TDES3_OWN);  in dwxgmac2_set_tx_owner()
57 static void dwxgmac2_set_rx_owner(struct dma_desc *p, int disable_rx_ic)  in dwxgmac2_set_rx_owner()  argument
59 	p->des3 |= cpu_to_le32(XGMAC_RDES3_OWN);  in dwxgmac2_set_rx_owner()
62 		p->des3 |= cpu_to_le32(XGMAC_RDES3_IOC);  in dwxgmac2_set_rx_owner()
65 static int dwxgmac2_get_tx_ls(struct dma_desc *p)  in dwxgmac2_get_tx_ls()  argument
67 	return (le32_to_cpu(p->des3) & XGMAC_RDES3_LD) > 0;  in dwxgmac2_get_tx_ls()
70 static int dwxgmac2_get_rx_frame_len(struct dma_desc *p, int rx_coe)  in dwxgmac2_get_rx_frame_len()  argument
72 	return (le32_to_cpu(p->des3) & XGMAC_RDES3_PL);  in dwxgmac2_get_rx_frame_len()
75 static void dwxgmac2_enable_tx_timestamp(struct dma_desc *p)  in dwxgmac2_enable_tx_timestamp()  argument
77 	p->des2 |= cpu_to_le32(XGMAC_TDES2_TTSE);  in dwxgmac2_enable_tx_timestamp()
80 static int dwxgmac2_get_tx_timestamp_status(struct dma_desc *p)  in dwxgmac2_get_tx_timestamp_status()  argument
87 	struct dma_desc *p = (struct dma_desc *)desc;  in dwxgmac2_get_timestamp()  local
90 	ns += le32_to_cpu(p->des1) * 1000000000ULL;  in dwxgmac2_get_timestamp()
91 	ns += le32_to_cpu(p->des0);  in dwxgmac2_get_timestamp()
98 	struct dma_desc *p = (struct dma_desc *)desc;  in dwxgmac2_rx_check_timestamp()  local
99 	unsigned int rdes3 = le32_to_cpu(p->des3);  in dwxgmac2_rx_check_timestamp()
108 		if ((p->des0 == 0xffffffff) && (p->des1 == 0xffffffff))  in dwxgmac2_rx_check_timestamp()
119 	struct dma_desc *p = (struct dma_desc *)desc;  in dwxgmac2_get_rx_timestamp_status()  local
120 	unsigned int rdes3 = le32_to_cpu(p->des3);  in dwxgmac2_get_rx_timestamp_status()
129 static void dwxgmac2_init_rx_desc(struct dma_desc *p, int disable_rx_ic,  in dwxgmac2_init_rx_desc()  argument
132 	dwxgmac2_set_rx_owner(p, disable_rx_ic);  in dwxgmac2_init_rx_desc()
135 static void dwxgmac2_init_tx_desc(struct dma_desc *p, int mode, int end)  in dwxgmac2_init_tx_desc()  argument
137 	p->des0 = 0;  in dwxgmac2_init_tx_desc()
138 	p->des1 = 0;  in dwxgmac2_init_tx_desc()
139 	p->des2 = 0;  in dwxgmac2_init_tx_desc()
140 	p->des3 = 0;  in dwxgmac2_init_tx_desc()
143 static void dwxgmac2_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,  in dwxgmac2_prepare_tx_desc()  argument
147 	unsigned int tdes3 = le32_to_cpu(p->des3);  in dwxgmac2_prepare_tx_desc()
149 	p->des2 |= cpu_to_le32(len & XGMAC_TDES2_B1L);  in dwxgmac2_prepare_tx_desc()
178 	p->des3 = cpu_to_le32(tdes3);  in dwxgmac2_prepare_tx_desc()
181 static void dwxgmac2_prepare_tso_tx_desc(struct dma_desc *p, int is_fs,  in dwxgmac2_prepare_tso_tx_desc()  argument
186 	unsigned int tdes3 = le32_to_cpu(p->des3);  in dwxgmac2_prepare_tso_tx_desc()
189 		p->des2 |= cpu_to_le32(len1 & XGMAC_TDES2_B1L);  in dwxgmac2_prepare_tso_tx_desc()
191 		p->des2 |= cpu_to_le32((len2 << XGMAC_TDES2_B2L_SHIFT) &  in dwxgmac2_prepare_tso_tx_desc()
218 	p->des3 = cpu_to_le32(tdes3);  in dwxgmac2_prepare_tso_tx_desc()
221 static void dwxgmac2_release_tx_desc(struct dma_desc *p, int mode)  in dwxgmac2_release_tx_desc()  argument
223 	p->des0 = 0;  in dwxgmac2_release_tx_desc()
224 	p->des1 = 0;  in dwxgmac2_release_tx_desc()
225 	p->des2 = 0;  in dwxgmac2_release_tx_desc()
226 	p->des3 = 0;  in dwxgmac2_release_tx_desc()
229 static void dwxgmac2_set_tx_ic(struct dma_desc *p)  in dwxgmac2_set_tx_ic()  argument
231 	p->des2 |= cpu_to_le32(XGMAC_TDES2_IOC);  in dwxgmac2_set_tx_ic()
234 static void dwxgmac2_set_mss(struct dma_desc *p, unsigned int mss)  in dwxgmac2_set_mss()  argument
236 	p->des0 = 0;  in dwxgmac2_set_mss()
237 	p->des1 = 0;  in dwxgmac2_set_mss()
238 	p->des2 = cpu_to_le32(mss);  in dwxgmac2_set_mss()
239 	p->des3 = cpu_to_le32(XGMAC_TDES3_CTXT | XGMAC_TDES3_TCMSSV);  in dwxgmac2_set_mss()
242 static void dwxgmac2_set_addr(struct dma_desc *p, dma_addr_t addr)  in dwxgmac2_set_addr()  argument
244 	p->des0 = cpu_to_le32(lower_32_bits(addr));  in dwxgmac2_set_addr()
245 	p->des1 = cpu_to_le32(upper_32_bits(addr));  in dwxgmac2_set_addr()
248 static void dwxgmac2_clear(struct dma_desc *p)  in dwxgmac2_clear()  argument
250 	p->des0 = 0;  in dwxgmac2_clear()
251 	p->des1 = 0;  in dwxgmac2_clear()
252 	p->des2 = 0;  in dwxgmac2_clear()
253 	p->des3 = 0;  in dwxgmac2_clear()
256 static int dwxgmac2_get_rx_hash(struct dma_desc *p, u32 *hash,  in dwxgmac2_get_rx_hash()  argument
259 	unsigned int rdes3 = le32_to_cpu(p->des3);  in dwxgmac2_get_rx_hash()
277 		*hash = le32_to_cpu(p->des1);  in dwxgmac2_get_rx_hash()
284 static void dwxgmac2_get_rx_header_len(struct dma_desc *p, unsigned int *len)  in dwxgmac2_get_rx_header_len()  argument
286 	if (le32_to_cpu(p->des3) & XGMAC_RDES3_L34T)  in dwxgmac2_get_rx_header_len()
287 		*len = le32_to_cpu(p->des2) & XGMAC_RDES2_HL;  in dwxgmac2_get_rx_header_len()
290 static void dwxgmac2_set_sec_addr(struct dma_desc *p, dma_addr_t addr, bool is_valid)  in dwxgmac2_set_sec_addr()  argument
292 	p->des2 = cpu_to_le32(lower_32_bits(addr));  in dwxgmac2_set_sec_addr()
293 	p->des3 = cpu_to_le32(upper_32_bits(addr));  in dwxgmac2_set_sec_addr()
296 static void dwxgmac2_set_sarc(struct dma_desc *p, u32 sarc_type)  in dwxgmac2_set_sarc()  argument
300 	p->des3 |= cpu_to_le32(sarc_type & XGMAC_TDES3_SAIC);  in dwxgmac2_set_sarc()
303 static void dwxgmac2_set_vlan_tag(struct dma_desc *p, u16 tag, u16 inner_tag,  in dwxgmac2_set_vlan_tag()  argument
306 	p->des0 = 0;  in dwxgmac2_set_vlan_tag()
307 	p->des1 = 0;  in dwxgmac2_set_vlan_tag()
308 	p->des2 = 0;  in dwxgmac2_set_vlan_tag()
309 	p->des3 = 0;  in dwxgmac2_set_vlan_tag()
316 		p->des2 = cpu_to_le32(des);  in dwxgmac2_set_vlan_tag()
320 		p->des3 = cpu_to_le32(des | XGMAC_TDES3_IVLTV);  in dwxgmac2_set_vlan_tag()
324 	p->des3 |= cpu_to_le32(tag & XGMAC_TDES3_VT);  in dwxgmac2_set_vlan_tag()
325 	p->des3 |= cpu_to_le32(XGMAC_TDES3_VLTV);  in dwxgmac2_set_vlan_tag()
327 	p->des3 |= cpu_to_le32(XGMAC_TDES3_CTXT);  in dwxgmac2_set_vlan_tag()
330 static void dwxgmac2_set_vlan(struct dma_desc *p, u32 type)  in dwxgmac2_set_vlan()  argument
333 	p->des2 |= cpu_to_le32(type & XGMAC_TDES2_VTIR);  in dwxgmac2_set_vlan()
336 static void dwxgmac2_set_tbs(struct dma_edesc *p, u32 sec, u32 nsec)  in dwxgmac2_set_tbs()  argument
338 	p->des4 = cpu_to_le32((sec & XGMAC_TDES0_LT) | XGMAC_TDES0_LTV);  in dwxgmac2_set_tbs()
339 	p->des5 = cpu_to_le32(nsec & XGMAC_TDES1_LT);  in dwxgmac2_set_tbs()
340 	p->des6 = 0;  in dwxgmac2_set_tbs()
341 	p->des7 = 0;  in dwxgmac2_set_tbs()