21 	u32 value = readl(ioaddr + DMA_AXI_BUS_MODE);  in dwmac1000_dma_axi()  local
25 		!(value & DMA_AXI_UNDEF) ? "fixed" : "any");  in dwmac1000_dma_axi()
28 		value |= DMA_AXI_EN_LPI;  in dwmac1000_dma_axi()
30 		value |= DMA_AXI_LPI_XIT_FRM;  in dwmac1000_dma_axi()
32 	value &= ~DMA_AXI_WR_OSR_LMT;  in dwmac1000_dma_axi()
33 	value |= (axi->axi_wr_osr_lmt & DMA_AXI_WR_OSR_LMT_MASK) <<  in dwmac1000_dma_axi()
36 	value &= ~DMA_AXI_RD_OSR_LMT;  in dwmac1000_dma_axi()
37 	value |= (axi->axi_rd_osr_lmt & DMA_AXI_RD_OSR_LMT_MASK) <<  in dwmac1000_dma_axi()
47 			value |= DMA_AXI_BLEN256;  in dwmac1000_dma_axi()
50 			value |= DMA_AXI_BLEN128;  in dwmac1000_dma_axi()
53 			value |= DMA_AXI_BLEN64;  in dwmac1000_dma_axi()
56 			value |= DMA_AXI_BLEN32;  in dwmac1000_dma_axi()
59 			value |= DMA_AXI_BLEN16;  in dwmac1000_dma_axi()
62 			value |= DMA_AXI_BLEN8;  in dwmac1000_dma_axi()
65 			value |= DMA_AXI_BLEN4;  in dwmac1000_dma_axi()
70 	writel(value, ioaddr + DMA_AXI_BUS_MODE);  in dwmac1000_dma_axi()
76 	u32 value = readl(ioaddr + DMA_BUS_MODE);  in dwmac1000_dma_init()  local
87 		value |= DMA_BUS_MODE_MAXPBL;  in dwmac1000_dma_init()
88 	value |= DMA_BUS_MODE_USP;  in dwmac1000_dma_init()
89 	value &= ~(DMA_BUS_MODE_PBL_MASK | DMA_BUS_MODE_RPBL_MASK);  in dwmac1000_dma_init()
90 	value |= (txpbl << DMA_BUS_MODE_PBL_SHIFT);  in dwmac1000_dma_init()
91 	value |= (rxpbl << DMA_BUS_MODE_RPBL_SHIFT);  in dwmac1000_dma_init()
95 		value |= DMA_BUS_MODE_FB;  in dwmac1000_dma_init()
99 		value |= DMA_BUS_MODE_MB;  in dwmac1000_dma_init()
102 		value |= DMA_BUS_MODE_ATDS;  in dwmac1000_dma_init()
105 		value |= DMA_BUS_MODE_AAL;  in dwmac1000_dma_init()
107 	writel(value, ioaddr + DMA_BUS_MODE);  in dwmac1000_dma_init()