Lines Matching refs:clk_configs

160 	struct meson8b_dwmac_clk_configs *clk_configs;  in meson8b_init_rgmii_tx_clk()  local
163 clk_configs = devm_kzalloc(dev, sizeof(*clk_configs), GFP_KERNEL); in meson8b_init_rgmii_tx_clk()
164 if (!clk_configs) in meson8b_init_rgmii_tx_clk()
167 clk_configs->m250_mux.reg = dwmac->regs + PRG_ETH0; in meson8b_init_rgmii_tx_clk()
168 clk_configs->m250_mux.shift = __ffs(PRG_ETH0_CLK_M250_SEL_MASK); in meson8b_init_rgmii_tx_clk()
169 clk_configs->m250_mux.mask = PRG_ETH0_CLK_M250_SEL_MASK >> in meson8b_init_rgmii_tx_clk()
170 clk_configs->m250_mux.shift; in meson8b_init_rgmii_tx_clk()
173 &clk_configs->m250_mux.hw); in meson8b_init_rgmii_tx_clk()
177 parent_data.hw = &clk_configs->m250_mux.hw; in meson8b_init_rgmii_tx_clk()
178 clk_configs->m250_div.reg = dwmac->regs + PRG_ETH0; in meson8b_init_rgmii_tx_clk()
179 clk_configs->m250_div.shift = PRG_ETH0_CLK_M250_DIV_SHIFT; in meson8b_init_rgmii_tx_clk()
180 clk_configs->m250_div.width = PRG_ETH0_CLK_M250_DIV_WIDTH; in meson8b_init_rgmii_tx_clk()
181 clk_configs->m250_div.table = div_table; in meson8b_init_rgmii_tx_clk()
182 clk_configs->m250_div.flags = CLK_DIVIDER_ALLOW_ZERO | in meson8b_init_rgmii_tx_clk()
186 &clk_configs->m250_div.hw); in meson8b_init_rgmii_tx_clk()
190 parent_data.hw = &clk_configs->m250_div.hw; in meson8b_init_rgmii_tx_clk()
191 clk_configs->fixed_div2.mult = 1; in meson8b_init_rgmii_tx_clk()
192 clk_configs->fixed_div2.div = 2; in meson8b_init_rgmii_tx_clk()
195 &clk_configs->fixed_div2.hw); in meson8b_init_rgmii_tx_clk()
199 parent_data.hw = &clk_configs->fixed_div2.hw; in meson8b_init_rgmii_tx_clk()
200 clk_configs->rgmii_tx_en.reg = dwmac->regs + PRG_ETH0; in meson8b_init_rgmii_tx_clk()
201 clk_configs->rgmii_tx_en.bit_idx = PRG_ETH0_RGMII_TX_CLK_EN; in meson8b_init_rgmii_tx_clk()
204 &clk_configs->rgmii_tx_en.hw); in meson8b_init_rgmii_tx_clk()