Lines Matching refs:value
186 u32 value; in tegra_eqos_fix_speed() local
211 value = readl(eqos->regs + SDMEMCOMPPADCTRL); in tegra_eqos_fix_speed()
212 value |= SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD; in tegra_eqos_fix_speed()
213 writel(value, eqos->regs + SDMEMCOMPPADCTRL); in tegra_eqos_fix_speed()
217 value = readl(eqos->regs + AUTO_CAL_CONFIG); in tegra_eqos_fix_speed()
218 value |= AUTO_CAL_CONFIG_START | AUTO_CAL_CONFIG_ENABLE; in tegra_eqos_fix_speed()
219 writel(value, eqos->regs + AUTO_CAL_CONFIG); in tegra_eqos_fix_speed()
222 value, in tegra_eqos_fix_speed()
223 value & AUTO_CAL_STATUS_ACTIVE, in tegra_eqos_fix_speed()
231 value, in tegra_eqos_fix_speed()
232 (value & AUTO_CAL_STATUS_ACTIVE) == 0, in tegra_eqos_fix_speed()
240 value = readl(eqos->regs + SDMEMCOMPPADCTRL); in tegra_eqos_fix_speed()
241 value &= ~SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD; in tegra_eqos_fix_speed()
242 writel(value, eqos->regs + SDMEMCOMPPADCTRL); in tegra_eqos_fix_speed()
244 value = readl(eqos->regs + AUTO_CAL_CONFIG); in tegra_eqos_fix_speed()
245 value &= ~AUTO_CAL_CONFIG_ENABLE; in tegra_eqos_fix_speed()
246 writel(value, eqos->regs + AUTO_CAL_CONFIG); in tegra_eqos_fix_speed()
258 u32 value; in tegra_eqos_init() local
262 value = (rate / 1000000) - 1; in tegra_eqos_init()
263 writel(value, eqos->regs + GMAC_1US_TIC_COUNTER); in tegra_eqos_init()