333 	ef4_writeo(efx, &reg, FR_AB_GPIO_CTL);  in falcon_setsda()
343 	ef4_writeo(efx, &reg, FR_AB_GPIO_CTL);  in falcon_setscl()
499 	ef4_writeo(efx, &temp, FR_BZ_RX_RSS_TKEY);  in falcon_b0_rx_push_rss_config()
573 		ef4_writeo(efx, &reg, FR_AB_EE_SPI_HADR);  in falcon_spi_cmd()
579 		ef4_writeo(efx, &reg, FR_AB_EE_SPI_HDATA);  in falcon_spi_cmd()
592 	ef4_writeo(efx, &reg, FR_AB_EE_SPI_HCMD);  in falcon_spi_cmd()
999 	ef4_writeo(efx, &sdctl, FR_AB_XX_SD_CTL);  in falcon_setup_xaui()
1010 	ef4_writeo(efx, &txdrv, FR_AB_XX_TXDRV_CTL);  in falcon_setup_xaui()
1024 	ef4_writeo(efx, &reg, FR_AB_XX_PWR_RST);  in falcon_reset_xaui()
1079 	ef4_writeo(efx, &reg, FR_AB_XX_CORE_STAT);  in falcon_xgxs_link_ok()
1111 	ef4_writeo(efx, &reg, FR_AB_XM_GLB_CFG);  in falcon_reconfigure_xmac_core()
1121 	ef4_writeo(efx, &reg, FR_AB_XM_TX_CFG);  in falcon_reconfigure_xmac_core()
1130 	ef4_writeo(efx, &reg, FR_AB_XM_RX_CFG);  in falcon_reconfigure_xmac_core()
1135 	ef4_writeo(efx, &reg, FR_AB_XM_RX_PARAM);  in falcon_reconfigure_xmac_core()
1139 	ef4_writeo(efx, &reg, FR_AB_XM_TX_PARAM);  in falcon_reconfigure_xmac_core()
1144 	ef4_writeo(efx, &reg, FR_AB_XM_FC);  in falcon_reconfigure_xmac_core()
1148 	ef4_writeo(efx, &reg, FR_AB_XM_ADR_LO);  in falcon_reconfigure_xmac_core()
1150 	ef4_writeo(efx, &reg, FR_AB_XM_ADR_HI);  in falcon_reconfigure_xmac_core()
1182 	ef4_writeo(efx, &reg, FR_AB_XX_CORE_STAT);  in falcon_reconfigure_xgxs_core()
1189 	ef4_writeo(efx, &reg, FR_AB_XX_SD_CTL);  in falcon_reconfigure_xgxs_core()
1266 	ef4_writeo(efx, &mc_hash->oword[0], FR_AB_MAC_MC_HASH_REG0);  in falcon_push_multicast_hash()
1267 	ef4_writeo(efx, &mc_hash->oword[1], FR_AB_MAC_MC_HASH_REG1);  in falcon_push_multicast_hash()
1281 		ef4_writeo(efx, &reg, FR_AB_XM_GLB_CFG);  in falcon_reset_macs()
1300 	ef4_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL);  in falcon_reset_macs()
1306 	ef4_writeo(efx, &reg, FR_AB_GLB_CTL);  in falcon_reset_macs()
1329 	ef4_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL);  in falcon_reset_macs()
1360 	ef4_writeo(efx, &reg, FR_AZ_RX_CFG);  in falcon_deconfigure_mac_wrapper()
1398 	ef4_writeo(efx, &reg, FR_AB_MAC_CTRL);  in falcon_reconfigure_mac_wrapper()
1410 	ef4_writeo(efx, &reg, FR_AZ_RX_CFG);  in falcon_reconfigure_mac_wrapper()
1430 	ef4_writeo(efx, &reg, FR_AB_MAC_STAT_DMA);  in falcon_stats_request()
1593 	ef4_writeo(efx, &reg, FR_AB_MD_PHY_ADR);  in falcon_mdio_write()
1597 	ef4_writeo(efx, &reg, FR_AB_MD_ID);  in falcon_mdio_write()
1601 	ef4_writeo(efx, &reg, FR_AB_MD_TXD);  in falcon_mdio_write()
1606 	ef4_writeo(efx, &reg, FR_AB_MD_CS);  in falcon_mdio_write()
1615 		ef4_writeo(efx, &reg, FR_AB_MD_CS);  in falcon_mdio_write()
1641 	ef4_writeo(efx, &reg, FR_AB_MD_PHY_ADR);  in falcon_mdio_read()
1645 	ef4_writeo(efx, &reg, FR_AB_MD_ID);  in falcon_mdio_read()
1649 	ef4_writeo(efx, &reg, FR_AB_MD_CS);  in falcon_mdio_read()
1664 		ef4_writeo(efx, &reg, FR_AB_MD_CS);  in falcon_mdio_read()
2024 	ef4_writeo(efx, &glb_ctl_reg_ker, FR_AB_GLB_CTL);  in __falcon_reset_hw()
2120 	ef4_writeo(efx, &gpio_cfg_reg_ker, FR_AB_GPIO_CTL);  in falcon_reset_sram()
2126 	ef4_writeo(efx, &srm_cfg_reg_ker, FR_AZ_SRM_CFG);  in falcon_reset_sram()
2254 		ef4_writeo(efx, &ee_vpd_cfg, FR_AB_EE_VPD_CFG0);  in falcon_probe_spi_devices()
2469 	ef4_writeo(efx, &reg, FR_AZ_RX_CFG);  in falcon_init_rx_cfg()
2484 	ef4_writeo(efx, &temp, FR_AB_NIC_STAT);  in falcon_init_nic()
2496 		ef4_writeo(efx, &temp, FR_AZ_CSR_SPARE);  in falcon_init_nic()
2505 		ef4_writeo(efx, &temp, FR_BZ_RX_FILTER_CTL);  in falcon_init_nic()
2517 	ef4_writeo(efx, &temp, FR_AA_RX_SELF_RST);  in falcon_init_nic()
2524 	ef4_writeo(efx, &temp, FR_AZ_TX_CFG);  in falcon_init_nic()
2533 		ef4_writeo(efx, &temp, FR_BZ_DP_CTRL);  in falcon_init_nic()