Lines Matching +full:x1000 +full:- +full:ost
2 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
3 * Copyright(c) 2002-2010 Exar Corp.
47 * Default is '2' - which means disable in promisc mode
48 * and enable in non-promiscuous mode.
60 #include <linux/dma-mapping.h>
78 #include <linux/io-64-nonatomic-lo-hi.h>
89 #include "s2io-regs.h"
104 ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) && in RXD_IS_UP2DT()
105 (GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK)); in RXD_IS_UP2DT()
125 return test_bit(__S2IO_STATE_CARD_UP, &sp->state); in is_s2io_card_up()
344 sp->def_mac_addr[offset].mac_addr[5] = (u8) (mac_addr); in do_s2io_copy_mac_addr()
345 sp->def_mac_addr[offset].mac_addr[4] = (u8) (mac_addr >> 8); in do_s2io_copy_mac_addr()
346 sp->def_mac_addr[offset].mac_addr[3] = (u8) (mac_addr >> 16); in do_s2io_copy_mac_addr()
347 sp->def_mac_addr[offset].mac_addr[2] = (u8) (mac_addr >> 24); in do_s2io_copy_mac_addr()
348 sp->def_mac_addr[offset].mac_addr[1] = (u8) (mac_addr >> 32); in do_s2io_copy_mac_addr()
349 sp->def_mac_addr[offset].mac_addr[0] = (u8) (mac_addr >> 40); in do_s2io_copy_mac_addr()
452 {DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN};
454 {[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT};
456 {[0 ...(MAX_RX_RINGS - 1)] = 0 };
500 if (!sp->config.multiq) { in s2io_stop_all_tx_queue()
503 for (i = 0; i < sp->config.tx_fifo_num; i++) in s2io_stop_all_tx_queue()
504 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_STOP; in s2io_stop_all_tx_queue()
506 netif_tx_stop_all_queues(sp->dev); in s2io_stop_all_tx_queue()
511 if (!sp->config.multiq) in s2io_stop_tx_queue()
512 sp->mac_control.fifos[fifo_no].queue_state = in s2io_stop_tx_queue()
515 netif_tx_stop_all_queues(sp->dev); in s2io_stop_tx_queue()
520 if (!sp->config.multiq) { in s2io_start_all_tx_queue()
523 for (i = 0; i < sp->config.tx_fifo_num; i++) in s2io_start_all_tx_queue()
524 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START; in s2io_start_all_tx_queue()
526 netif_tx_start_all_queues(sp->dev); in s2io_start_all_tx_queue()
531 if (!sp->config.multiq) { in s2io_wake_all_tx_queue()
534 for (i = 0; i < sp->config.tx_fifo_num; i++) in s2io_wake_all_tx_queue()
535 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START; in s2io_wake_all_tx_queue()
537 netif_tx_wake_all_queues(sp->dev); in s2io_wake_all_tx_queue()
545 if (cnt && __netif_subqueue_stopped(fifo->dev, fifo->fifo_no)) in s2io_wake_tx_queue()
546 netif_wake_subqueue(fifo->dev, fifo->fifo_no); in s2io_wake_tx_queue()
547 } else if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) { in s2io_wake_tx_queue()
548 if (netif_queue_stopped(fifo->dev)) { in s2io_wake_tx_queue()
549 fifo->queue_state = FIFO_QUEUE_START; in s2io_wake_tx_queue()
550 netif_wake_queue(fifo->dev); in s2io_wake_tx_queue()
556 * init_shared_mem - Allocation and Initialization of Memory
571 struct net_device *dev = nic->dev; in init_shared_mem()
574 struct config_param *config = &nic->config; in init_shared_mem()
575 struct mac_info *mac_control = &nic->mac_control; in init_shared_mem()
580 for (i = 0; i < config->tx_fifo_num; i++) { in init_shared_mem()
581 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in init_shared_mem()
583 size += tx_cfg->fifo_len; in init_shared_mem()
589 return -EINVAL; in init_shared_mem()
593 for (i = 0; i < config->tx_fifo_num; i++) { in init_shared_mem()
594 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in init_shared_mem()
596 size = tx_cfg->fifo_len; in init_shared_mem()
601 DBG_PRINT(ERR_DBG, "Fifo %d: Invalid length (%d) - " in init_shared_mem()
604 return -EINVAL; in init_shared_mem()
608 lst_size = (sizeof(struct TxD) * config->max_txds); in init_shared_mem()
611 for (i = 0; i < config->tx_fifo_num; i++) { in init_shared_mem()
612 struct fifo_info *fifo = &mac_control->fifos[i]; in init_shared_mem()
613 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in init_shared_mem()
614 int fifo_len = tx_cfg->fifo_len; in init_shared_mem()
617 fifo->list_info = kzalloc(list_holder_size, GFP_KERNEL); in init_shared_mem()
618 if (!fifo->list_info) { in init_shared_mem()
620 return -ENOMEM; in init_shared_mem()
624 for (i = 0; i < config->tx_fifo_num; i++) { in init_shared_mem()
625 int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len, in init_shared_mem()
627 struct fifo_info *fifo = &mac_control->fifos[i]; in init_shared_mem()
628 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in init_shared_mem()
630 fifo->tx_curr_put_info.offset = 0; in init_shared_mem()
631 fifo->tx_curr_put_info.fifo_len = tx_cfg->fifo_len - 1; in init_shared_mem()
632 fifo->tx_curr_get_info.offset = 0; in init_shared_mem()
633 fifo->tx_curr_get_info.fifo_len = tx_cfg->fifo_len - 1; in init_shared_mem()
634 fifo->fifo_no = i; in init_shared_mem()
635 fifo->nic = nic; in init_shared_mem()
636 fifo->max_txds = MAX_SKB_FRAGS + 2; in init_shared_mem()
637 fifo->dev = dev; in init_shared_mem()
643 tmp_v = dma_alloc_coherent(&nic->pdev->dev, PAGE_SIZE, in init_shared_mem()
648 return -ENOMEM; in init_shared_mem()
656 mac_control->zerodma_virt_addr = tmp_v; in init_shared_mem()
660 dev->name, tmp_v); in init_shared_mem()
661 tmp_v = dma_alloc_coherent(&nic->pdev->dev, in init_shared_mem()
667 return -ENOMEM; in init_shared_mem()
673 if (l == tx_cfg->fifo_len) in init_shared_mem()
675 fifo->list_info[l].list_virt_addr = in init_shared_mem()
677 fifo->list_info[l].list_phy_addr = in init_shared_mem()
684 for (i = 0; i < config->tx_fifo_num; i++) { in init_shared_mem()
685 struct fifo_info *fifo = &mac_control->fifos[i]; in init_shared_mem()
686 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in init_shared_mem()
688 size = tx_cfg->fifo_len; in init_shared_mem()
689 fifo->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL); in init_shared_mem()
690 if (!fifo->ufo_in_band_v) in init_shared_mem()
691 return -ENOMEM; in init_shared_mem()
697 for (i = 0; i < config->rx_ring_num; i++) { in init_shared_mem()
698 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; in init_shared_mem()
699 struct ring_info *ring = &mac_control->rings[i]; in init_shared_mem()
701 if (rx_cfg->num_rxd % (rxd_count[nic->rxd_mode] + 1)) { in init_shared_mem()
704 dev->name, i); in init_shared_mem()
707 size += rx_cfg->num_rxd; in init_shared_mem()
708 ring->block_count = rx_cfg->num_rxd / in init_shared_mem()
709 (rxd_count[nic->rxd_mode] + 1); in init_shared_mem()
710 ring->pkt_cnt = rx_cfg->num_rxd - ring->block_count; in init_shared_mem()
712 if (nic->rxd_mode == RXD_MODE_1) in init_shared_mem()
717 for (i = 0; i < config->rx_ring_num; i++) { in init_shared_mem()
718 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; in init_shared_mem()
719 struct ring_info *ring = &mac_control->rings[i]; in init_shared_mem()
721 ring->rx_curr_get_info.block_index = 0; in init_shared_mem()
722 ring->rx_curr_get_info.offset = 0; in init_shared_mem()
723 ring->rx_curr_get_info.ring_len = rx_cfg->num_rxd - 1; in init_shared_mem()
724 ring->rx_curr_put_info.block_index = 0; in init_shared_mem()
725 ring->rx_curr_put_info.offset = 0; in init_shared_mem()
726 ring->rx_curr_put_info.ring_len = rx_cfg->num_rxd - 1; in init_shared_mem()
727 ring->nic = nic; in init_shared_mem()
728 ring->ring_no = i; in init_shared_mem()
730 blk_cnt = rx_cfg->num_rxd / (rxd_count[nic->rxd_mode] + 1); in init_shared_mem()
736 rx_blocks = &ring->rx_blocks[j]; in init_shared_mem()
738 tmp_v_addr = dma_alloc_coherent(&nic->pdev->dev, size, in init_shared_mem()
747 rx_blocks->block_virt_addr = tmp_v_addr; in init_shared_mem()
748 return -ENOMEM; in init_shared_mem()
753 rxd_count[nic->rxd_mode]; in init_shared_mem()
754 rx_blocks->block_virt_addr = tmp_v_addr; in init_shared_mem()
755 rx_blocks->block_dma_addr = tmp_p_addr; in init_shared_mem()
756 rx_blocks->rxds = kmalloc(size, GFP_KERNEL); in init_shared_mem()
757 if (!rx_blocks->rxds) in init_shared_mem()
758 return -ENOMEM; in init_shared_mem()
760 for (l = 0; l < rxd_count[nic->rxd_mode]; l++) { in init_shared_mem()
761 rx_blocks->rxds[l].virt_addr = in init_shared_mem()
762 rx_blocks->block_virt_addr + in init_shared_mem()
763 (rxd_size[nic->rxd_mode] * l); in init_shared_mem()
764 rx_blocks->rxds[l].dma_addr = in init_shared_mem()
765 rx_blocks->block_dma_addr + in init_shared_mem()
766 (rxd_size[nic->rxd_mode] * l); in init_shared_mem()
772 tmp_v_addr = ring->rx_blocks[j].block_virt_addr; in init_shared_mem()
773 tmp_v_addr_next = ring->rx_blocks[next].block_virt_addr; in init_shared_mem()
774 tmp_p_addr = ring->rx_blocks[j].block_dma_addr; in init_shared_mem()
775 tmp_p_addr_next = ring->rx_blocks[next].block_dma_addr; in init_shared_mem()
778 pre_rxd_blk->reserved_2_pNext_RxD_block = in init_shared_mem()
780 pre_rxd_blk->pNext_RxD_Blk_physical = in init_shared_mem()
784 if (nic->rxd_mode == RXD_MODE_3B) { in init_shared_mem()
789 for (i = 0; i < config->rx_ring_num; i++) { in init_shared_mem()
790 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; in init_shared_mem()
791 struct ring_info *ring = &mac_control->rings[i]; in init_shared_mem()
793 blk_cnt = rx_cfg->num_rxd / in init_shared_mem()
794 (rxd_count[nic->rxd_mode] + 1); in init_shared_mem()
796 ring->ba = kmalloc(size, GFP_KERNEL); in init_shared_mem()
797 if (!ring->ba) in init_shared_mem()
798 return -ENOMEM; in init_shared_mem()
804 (rxd_count[nic->rxd_mode] + 1); in init_shared_mem()
805 ring->ba[j] = kmalloc(size, GFP_KERNEL); in init_shared_mem()
806 if (!ring->ba[j]) in init_shared_mem()
807 return -ENOMEM; in init_shared_mem()
809 while (k != rxd_count[nic->rxd_mode]) { in init_shared_mem()
810 ba = &ring->ba[j][k]; in init_shared_mem()
812 ba->ba_0_org = kmalloc(size, GFP_KERNEL); in init_shared_mem()
813 if (!ba->ba_0_org) in init_shared_mem()
814 return -ENOMEM; in init_shared_mem()
816 tmp = (unsigned long)ba->ba_0_org; in init_shared_mem()
819 ba->ba_0 = (void *)tmp; in init_shared_mem()
822 ba->ba_1_org = kmalloc(size, GFP_KERNEL); in init_shared_mem()
823 if (!ba->ba_1_org) in init_shared_mem()
824 return -ENOMEM; in init_shared_mem()
826 tmp = (unsigned long)ba->ba_1_org; in init_shared_mem()
829 ba->ba_1 = (void *)tmp; in init_shared_mem()
838 mac_control->stats_mem = in init_shared_mem()
839 dma_alloc_coherent(&nic->pdev->dev, size, in init_shared_mem()
840 &mac_control->stats_mem_phy, GFP_KERNEL); in init_shared_mem()
842 if (!mac_control->stats_mem) { in init_shared_mem()
848 return -ENOMEM; in init_shared_mem()
851 mac_control->stats_mem_sz = size; in init_shared_mem()
853 tmp_v_addr = mac_control->stats_mem; in init_shared_mem()
854 mac_control->stats_info = tmp_v_addr; in init_shared_mem()
857 dev_name(&nic->pdev->dev), (unsigned long long)tmp_p_addr); in init_shared_mem()
858 mac_control->stats_info->sw_stat.mem_allocated += mem_allocated; in init_shared_mem()
863 * free_shared_mem - Free the allocated Memory
885 dev = nic->dev; in free_shared_mem()
887 config = &nic->config; in free_shared_mem()
888 mac_control = &nic->mac_control; in free_shared_mem()
889 stats = mac_control->stats_info; in free_shared_mem()
890 swstats = &stats->sw_stat; in free_shared_mem()
892 lst_size = sizeof(struct TxD) * config->max_txds; in free_shared_mem()
895 for (i = 0; i < config->tx_fifo_num; i++) { in free_shared_mem()
896 struct fifo_info *fifo = &mac_control->fifos[i]; in free_shared_mem()
897 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in free_shared_mem()
899 page_num = TXD_MEM_PAGE_CNT(tx_cfg->fifo_len, lst_per_page); in free_shared_mem()
904 if (!fifo->list_info) in free_shared_mem()
907 fli = &fifo->list_info[mem_blks]; in free_shared_mem()
908 if (!fli->list_virt_addr) in free_shared_mem()
910 dma_free_coherent(&nic->pdev->dev, PAGE_SIZE, in free_shared_mem()
911 fli->list_virt_addr, in free_shared_mem()
912 fli->list_phy_addr); in free_shared_mem()
913 swstats->mem_freed += PAGE_SIZE; in free_shared_mem()
918 if (mac_control->zerodma_virt_addr) { in free_shared_mem()
919 dma_free_coherent(&nic->pdev->dev, PAGE_SIZE, in free_shared_mem()
920 mac_control->zerodma_virt_addr, in free_shared_mem()
925 dev->name, mac_control->zerodma_virt_addr); in free_shared_mem()
926 swstats->mem_freed += PAGE_SIZE; in free_shared_mem()
928 kfree(fifo->list_info); in free_shared_mem()
929 swstats->mem_freed += tx_cfg->fifo_len * in free_shared_mem()
934 for (i = 0; i < config->rx_ring_num; i++) { in free_shared_mem()
935 struct ring_info *ring = &mac_control->rings[i]; in free_shared_mem()
937 blk_cnt = ring->block_count; in free_shared_mem()
939 tmp_v_addr = ring->rx_blocks[j].block_virt_addr; in free_shared_mem()
940 tmp_p_addr = ring->rx_blocks[j].block_dma_addr; in free_shared_mem()
943 dma_free_coherent(&nic->pdev->dev, size, tmp_v_addr, in free_shared_mem()
945 swstats->mem_freed += size; in free_shared_mem()
946 kfree(ring->rx_blocks[j].rxds); in free_shared_mem()
947 swstats->mem_freed += sizeof(struct rxd_info) * in free_shared_mem()
948 rxd_count[nic->rxd_mode]; in free_shared_mem()
952 if (nic->rxd_mode == RXD_MODE_3B) { in free_shared_mem()
954 for (i = 0; i < config->rx_ring_num; i++) { in free_shared_mem()
955 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; in free_shared_mem()
956 struct ring_info *ring = &mac_control->rings[i]; in free_shared_mem()
958 blk_cnt = rx_cfg->num_rxd / in free_shared_mem()
959 (rxd_count[nic->rxd_mode] + 1); in free_shared_mem()
962 if (!ring->ba[j]) in free_shared_mem()
964 while (k != rxd_count[nic->rxd_mode]) { in free_shared_mem()
965 struct buffAdd *ba = &ring->ba[j][k]; in free_shared_mem()
966 kfree(ba->ba_0_org); in free_shared_mem()
967 swstats->mem_freed += in free_shared_mem()
969 kfree(ba->ba_1_org); in free_shared_mem()
970 swstats->mem_freed += in free_shared_mem()
974 kfree(ring->ba[j]); in free_shared_mem()
975 swstats->mem_freed += sizeof(struct buffAdd) * in free_shared_mem()
976 (rxd_count[nic->rxd_mode] + 1); in free_shared_mem()
978 kfree(ring->ba); in free_shared_mem()
979 swstats->mem_freed += sizeof(struct buffAdd *) * in free_shared_mem()
984 for (i = 0; i < nic->config.tx_fifo_num; i++) { in free_shared_mem()
985 struct fifo_info *fifo = &mac_control->fifos[i]; in free_shared_mem()
986 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in free_shared_mem()
988 if (fifo->ufo_in_band_v) { in free_shared_mem()
989 swstats->mem_freed += tx_cfg->fifo_len * in free_shared_mem()
991 kfree(fifo->ufo_in_band_v); in free_shared_mem()
995 if (mac_control->stats_mem) { in free_shared_mem()
996 swstats->mem_freed += mac_control->stats_mem_sz; in free_shared_mem()
997 dma_free_coherent(&nic->pdev->dev, mac_control->stats_mem_sz, in free_shared_mem()
998 mac_control->stats_mem, in free_shared_mem()
999 mac_control->stats_mem_phy); in free_shared_mem()
1004 * s2io_verify_pci_mode -
1009 struct XENA_dev_config __iomem *bar0 = nic->bar0; in s2io_verify_pci_mode()
1013 val64 = readq(&bar0->pci_mode); in s2io_verify_pci_mode()
1017 return -1; /* Unknown PCI mode */ in s2io_verify_pci_mode()
1027 if (tdev->vendor == NEC_VENID && tdev->device == NEC_DEVID) { in s2io_on_nec_bridge()
1028 if (tdev->bus == s2io_pdev->bus->parent) { in s2io_on_nec_bridge()
1039 * s2io_print_pci_mode -
1043 struct XENA_dev_config __iomem *bar0 = nic->bar0; in s2io_print_pci_mode()
1046 struct config_param *config = &nic->config; in s2io_print_pci_mode()
1049 val64 = readq(&bar0->pci_mode); in s2io_print_pci_mode()
1053 return -1; /* Unknown PCI mode */ in s2io_print_pci_mode()
1055 config->bus_speed = bus_speed[mode]; in s2io_print_pci_mode()
1057 if (s2io_on_nec_bridge(nic->pdev)) { in s2io_print_pci_mode()
1058 DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n", in s2io_print_pci_mode()
1059 nic->dev->name); in s2io_print_pci_mode()
1090 mode = -1; in s2io_print_pci_mode()
1094 nic->dev->name, val64 & PCI_MODE_32_BITS ? 32 : 64, pcimode); in s2io_print_pci_mode()
1100 * init_tti - Initialization transmit traffic interrupt scheme
1108 * '-1' on failure
1113 struct XENA_dev_config __iomem *bar0 = nic->bar0; in init_tti()
1116 struct config_param *config = &nic->config; in init_tti()
1118 for (i = 0; i < config->tx_fifo_num; i++) { in init_tti()
1124 if (nic->device_type == XFRAME_II_DEVICE) { in init_tti()
1125 int count = (nic->config.bus_speed * 125)/2; in init_tti()
1137 writeq(val64, &bar0->tti_data1_mem); in init_tti()
1139 if (nic->config.intr_type == MSI_X) { in init_tti()
1145 if ((nic->config.tx_steering_type == in init_tti()
1147 (config->tx_fifo_num > 1) && in init_tti()
1148 (i >= nic->udp_fifo_idx) && in init_tti()
1149 (i < (nic->udp_fifo_idx + in init_tti()
1150 nic->total_udp_fifos))) in init_tti()
1162 writeq(val64, &bar0->tti_data2_mem); in init_tti()
1167 writeq(val64, &bar0->tti_command_mem); in init_tti()
1169 if (wait_for_cmd_complete(&bar0->tti_command_mem, in init_tti()
1179 * init_nic - Initialization of hardware
1184 * '-1' on failure (endian settings incorrect).
1189 struct XENA_dev_config __iomem *bar0 = nic->bar0; in init_nic()
1190 struct net_device *dev = nic->dev; in init_nic()
1198 struct config_param *config = &nic->config; in init_nic()
1199 struct mac_info *mac_control = &nic->mac_control; in init_nic()
1204 return -EIO; in init_nic()
1210 if (nic->device_type & XFRAME_II_DEVICE) { in init_nic()
1212 writeq(val64, &bar0->sw_reset); in init_nic()
1214 val64 = readq(&bar0->sw_reset); in init_nic()
1219 writeq(val64, &bar0->sw_reset); in init_nic()
1221 val64 = readq(&bar0->sw_reset); in init_nic()
1226 if (nic->device_type == XFRAME_II_DEVICE) { in init_nic()
1228 val64 = readq(&bar0->adapter_status); in init_nic()
1234 return -ENODEV; in init_nic()
1238 add = &bar0->mac_cfg; in init_nic()
1239 val64 = readq(&bar0->mac_cfg); in init_nic()
1241 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1243 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1247 val64 = readq(&bar0->mac_int_mask); in init_nic()
1248 val64 = readq(&bar0->mc_int_mask); in init_nic()
1249 val64 = readq(&bar0->xgxs_int_mask); in init_nic()
1252 val64 = dev->mtu; in init_nic()
1253 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic()
1255 if (nic->device_type & XFRAME_II_DEVICE) { in init_nic()
1258 &bar0->dtx_control, UF); in init_nic()
1266 &bar0->dtx_control, UF); in init_nic()
1267 val64 = readq(&bar0->dtx_control); in init_nic()
1274 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1275 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1276 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1277 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1279 for (i = 0, j = 0; i < config->tx_fifo_num; i++) { in init_nic()
1280 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in init_nic()
1282 val64 |= vBIT(tx_cfg->fifo_len - 1, ((j * 32) + 19), 13) | in init_nic()
1283 vBIT(tx_cfg->fifo_priority, ((j * 32) + 5), 3); in init_nic()
1285 if (i == (config->tx_fifo_num - 1)) { in init_nic()
1292 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1297 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1302 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1307 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1319 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE. in init_nic()
1321 if ((nic->device_type == XFRAME_I_DEVICE) && (nic->pdev->revision < 4)) in init_nic()
1322 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable); in init_nic()
1324 val64 = readq(&bar0->tx_fifo_partition_0); in init_nic()
1326 &bar0->tx_fifo_partition_0, (unsigned long long)val64); in init_nic()
1332 val64 = readq(&bar0->tx_pa_cfg); in init_nic()
1337 writeq(val64, &bar0->tx_pa_cfg); in init_nic()
1341 for (i = 0; i < config->rx_ring_num; i++) { in init_nic()
1342 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; in init_nic()
1344 val64 |= vBIT(rx_cfg->ring_priority, (5 + (i * 8)), 3); in init_nic()
1346 writeq(val64, &bar0->rx_queue_priority); in init_nic()
1353 if (nic->device_type & XFRAME_II_DEVICE) in init_nic()
1358 for (i = 0; i < config->rx_ring_num; i++) { in init_nic()
1361 mem_share = (mem_size / config->rx_ring_num + in init_nic()
1362 mem_size % config->rx_ring_num); in init_nic()
1366 mem_share = (mem_size / config->rx_ring_num); in init_nic()
1370 mem_share = (mem_size / config->rx_ring_num); in init_nic()
1374 mem_share = (mem_size / config->rx_ring_num); in init_nic()
1378 mem_share = (mem_size / config->rx_ring_num); in init_nic()
1382 mem_share = (mem_size / config->rx_ring_num); in init_nic()
1386 mem_share = (mem_size / config->rx_ring_num); in init_nic()
1390 mem_share = (mem_size / config->rx_ring_num); in init_nic()
1395 writeq(val64, &bar0->rx_queue_cfg); in init_nic()
1401 switch (config->tx_fifo_num) { in init_nic()
1404 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1405 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1406 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1407 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1408 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1412 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1413 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1414 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1415 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1417 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1421 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1423 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1425 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1427 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1429 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1433 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1434 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1435 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1436 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1438 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1442 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1444 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1446 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1448 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1450 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1454 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1456 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1458 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1460 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1462 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1466 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1468 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1470 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1472 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1474 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1478 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1479 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1480 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1481 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1483 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1488 val64 = readq(&bar0->tx_fifo_partition_0); in init_nic()
1490 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1496 switch (config->rx_ring_num) { in init_nic()
1499 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1500 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1501 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1502 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1503 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1506 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1510 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1511 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1512 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1513 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1515 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1518 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1522 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1524 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1526 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1528 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1530 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1533 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1537 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1538 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1539 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1540 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1542 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1545 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1549 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1551 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1553 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1555 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1557 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1560 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1564 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1566 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1568 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1570 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1572 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1575 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1579 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1581 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1583 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1585 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1587 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1590 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1594 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1595 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1596 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1597 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1599 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1602 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1609 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1612 val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22); in init_nic()
1613 for (i = 0 ; i < config->rx_ring_num ; i++) in init_nic()
1614 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1619 for (i = 0; i < config->rx_ring_num; i++) { in init_nic()
1628 &bar0->rts_frm_len_n[i]); in init_nic()
1637 dev->name, i); in init_nic()
1638 return -ENODEV; in init_nic()
1643 writeq(mac_control->stats_mem_phy, &bar0->stat_addr); in init_nic()
1645 if (nic->device_type == XFRAME_II_DEVICE) { in init_nic()
1647 writeq(val64, &bar0->stat_byte_cnt); in init_nic()
1656 writeq(val64, &bar0->mac_link_util); in init_nic()
1664 if (SUCCESS != init_tti(nic, nic->last_link_state, true)) in init_nic()
1665 return -ENODEV; in init_nic()
1668 if (nic->device_type == XFRAME_II_DEVICE) { in init_nic()
1673 int count = (nic->config.bus_speed * 125)/4; in init_nic()
1682 writeq(val64, &bar0->rti_data1_mem); in init_nic()
1686 if (nic->config.intr_type == MSI_X) in init_nic()
1692 writeq(val64, &bar0->rti_data2_mem); in init_nic()
1694 for (i = 0; i < config->rx_ring_num; i++) { in init_nic()
1698 writeq(val64, &bar0->rti_command_mem); in init_nic()
1709 val64 = readq(&bar0->rti_command_mem); in init_nic()
1715 dev->name); in init_nic()
1716 return -ENODEV; in init_nic()
1727 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3); in init_nic()
1728 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7); in init_nic()
1731 add = &bar0->mac_cfg; in init_nic()
1732 val64 = readq(&bar0->mac_cfg); in init_nic()
1734 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1736 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1738 val64 = readq(&bar0->mac_cfg); in init_nic()
1741 add = &bar0->mac_cfg; in init_nic()
1742 val64 = readq(&bar0->mac_cfg); in init_nic()
1744 if (nic->device_type == XFRAME_II_DEVICE) in init_nic()
1745 writeq(val64, &bar0->mac_cfg); in init_nic()
1747 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1749 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1757 val64 = readq(&bar0->rmac_pause_cfg); in init_nic()
1759 val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time); in init_nic()
1760 writeq(val64, &bar0->rmac_pause_cfg); in init_nic()
1771 nic->mac_control.mc_pause_threshold_q0q3) in init_nic()
1774 writeq(val64, &bar0->mc_pause_thresh_q0q3); in init_nic()
1779 nic->mac_control.mc_pause_threshold_q4q7) in init_nic()
1782 writeq(val64, &bar0->mc_pause_thresh_q4q7); in init_nic()
1788 val64 = readq(&bar0->pic_control); in init_nic()
1790 writeq(val64, &bar0->pic_control); in init_nic()
1792 if (nic->config.bus_speed == 266) { in init_nic()
1793 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout); in init_nic()
1794 writeq(0x0, &bar0->read_retry_delay); in init_nic()
1795 writeq(0x0, &bar0->write_retry_delay); in init_nic()
1802 if (nic->device_type == XFRAME_II_DEVICE) { in init_nic()
1805 writeq(val64, &bar0->misc_control); in init_nic()
1806 val64 = readq(&bar0->pic_control2); in init_nic()
1808 writeq(val64, &bar0->pic_control2); in init_nic()
1810 if (strstr(nic->product_name, "CX4")) { in init_nic()
1812 writeq(val64, &bar0->tmac_avg_ipg); in init_nic()
1822 if (nic->device_type == XFRAME_II_DEVICE) in s2io_link_fault_indication()
1829 * do_s2io_write_bits - update alarm bits in alarm register
1852 struct XENA_dev_config __iomem *bar0 = nic->bar0; in en_dis_err_alarms()
1856 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask); in en_dis_err_alarms()
1863 TXDMA_SM_INT, flag, &bar0->txdma_int_mask); in en_dis_err_alarms()
1868 &bar0->pfc_err_mask); in en_dis_err_alarms()
1872 TDA_PCIX_ERR, flag, &bar0->tda_err_mask); in en_dis_err_alarms()
1880 flag, &bar0->pcc_err_mask); in en_dis_err_alarms()
1883 TTI_ECC_DB_ERR, flag, &bar0->tti_err_mask); in en_dis_err_alarms()
1888 flag, &bar0->lso_err_mask); in en_dis_err_alarms()
1891 flag, &bar0->tpa_err_mask); in en_dis_err_alarms()
1893 do_s2io_write_bits(SM_SM_ERR_ALARM, flag, &bar0->sm_err_mask); in en_dis_err_alarms()
1899 &bar0->mac_int_mask); in en_dis_err_alarms()
1903 flag, &bar0->mac_tmac_err_mask); in en_dis_err_alarms()
1909 &bar0->xgxs_int_mask); in en_dis_err_alarms()
1912 flag, &bar0->xgxs_txgxs_err_mask); in en_dis_err_alarms()
1919 flag, &bar0->rxdma_int_mask); in en_dis_err_alarms()
1923 RC_RDA_FAIL_WR_Rn, flag, &bar0->rc_err_mask); in en_dis_err_alarms()
1927 &bar0->prc_pcix_err_mask); in en_dis_err_alarms()
1930 &bar0->rpa_err_mask); in en_dis_err_alarms()
1936 flag, &bar0->rda_err_mask); in en_dis_err_alarms()
1939 flag, &bar0->rti_err_mask); in en_dis_err_alarms()
1945 &bar0->mac_int_mask); in en_dis_err_alarms()
1952 flag, &bar0->mac_rmac_err_mask); in en_dis_err_alarms()
1958 &bar0->xgxs_int_mask); in en_dis_err_alarms()
1960 &bar0->xgxs_rxgxs_err_mask); in en_dis_err_alarms()
1966 flag, &bar0->mc_int_mask); in en_dis_err_alarms()
1969 &bar0->mc_err_mask); in en_dis_err_alarms()
1971 nic->general_int_mask = gen_int_mask; in en_dis_err_alarms()
1974 nic->general_int_mask = 0; in en_dis_err_alarms()
1978 * en_dis_able_nic_intrs - Enable or Disable the interrupts
1990 struct XENA_dev_config __iomem *bar0 = nic->bar0; in en_dis_able_nic_intrs()
1993 intr_mask = nic->general_int_mask; in en_dis_able_nic_intrs()
2010 &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2012 &bar0->gpio_int_mask); in en_dis_able_nic_intrs()
2014 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2020 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2032 writeq(0x0, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2038 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2047 writeq(0x0, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2053 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2057 temp64 = readq(&bar0->general_int_mask); in en_dis_able_nic_intrs()
2062 writeq(temp64, &bar0->general_int_mask); in en_dis_able_nic_intrs()
2064 nic->general_int_mask = readq(&bar0->general_int_mask); in en_dis_able_nic_intrs()
2068 * verify_pcc_quiescent- Checks for PCC quiescent state
2078 struct XENA_dev_config __iomem *bar0 = sp->bar0; in verify_pcc_quiescent()
2079 u64 val64 = readq(&bar0->adapter_status); in verify_pcc_quiescent()
2081 herc = (sp->device_type == XFRAME_II_DEVICE); in verify_pcc_quiescent()
2084 if ((!herc && (sp->pdev->revision >= 4)) || herc) { in verify_pcc_quiescent()
2092 if ((!herc && (sp->pdev->revision >= 4)) || herc) { in verify_pcc_quiescent()
2106 * verify_xena_quiescence - Checks whether the H/W is ready
2120 struct XENA_dev_config __iomem *bar0 = sp->bar0; in verify_xena_quiescence()
2121 u64 val64 = readq(&bar0->adapter_status); in verify_xena_quiescence()
2163 sp->device_type == XFRAME_II_DEVICE && in verify_xena_quiescence()
2177 * fix_mac_address - Fix for Mac addr problem on Alpha platforms
2186 struct XENA_dev_config __iomem *bar0 = sp->bar0; in fix_mac_address()
2190 writeq(fix_mac[i++], &bar0->gpio_control); in fix_mac_address()
2192 (void) readq(&bar0->gpio_control); in fix_mac_address()
2197 * start_nic - Turns the device on
2206 * SUCCESS on success and -1 on failure.
2211 struct XENA_dev_config __iomem *bar0 = nic->bar0; in start_nic()
2212 struct net_device *dev = nic->dev; in start_nic()
2215 struct config_param *config = &nic->config; in start_nic()
2216 struct mac_info *mac_control = &nic->mac_control; in start_nic()
2219 for (i = 0; i < config->rx_ring_num; i++) { in start_nic()
2220 struct ring_info *ring = &mac_control->rings[i]; in start_nic()
2222 writeq((u64)ring->rx_blocks[0].block_dma_addr, in start_nic()
2223 &bar0->prc_rxd0_n[i]); in start_nic()
2225 val64 = readq(&bar0->prc_ctrl_n[i]); in start_nic()
2226 if (nic->rxd_mode == RXD_MODE_1) in start_nic()
2230 if (nic->device_type == XFRAME_II_DEVICE) in start_nic()
2233 val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000); in start_nic()
2234 writeq(val64, &bar0->prc_ctrl_n[i]); in start_nic()
2237 if (nic->rxd_mode == RXD_MODE_3B) { in start_nic()
2239 val64 = readq(&bar0->rx_pa_cfg); in start_nic()
2241 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2245 val64 = readq(&bar0->rx_pa_cfg); in start_nic()
2247 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2248 nic->vlan_strip_flag = 0; in start_nic()
2252 * Enabling MC-RLDRAM. After enabling the device, we timeout in start_nic()
2256 val64 = readq(&bar0->mc_rldram_mrs); in start_nic()
2258 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF); in start_nic()
2259 val64 = readq(&bar0->mc_rldram_mrs); in start_nic()
2264 val64 = readq(&bar0->adapter_control); in start_nic()
2266 writeq(val64, &bar0->adapter_control); in start_nic()
2272 val64 = readq(&bar0->adapter_status); in start_nic()
2276 dev->name, (unsigned long long)val64); in start_nic()
2289 val64 = readq(&bar0->adapter_control); in start_nic()
2291 writeq(val64, &bar0->adapter_control); in start_nic()
2298 schedule_work(&nic->set_link_task); in start_nic()
2300 /* SXE-002: Initialize link and activity LED */ in start_nic()
2301 subid = nic->pdev->subsystem_device; in start_nic()
2303 (nic->device_type == XFRAME_I_DEVICE)) { in start_nic()
2304 val64 = readq(&bar0->gpio_control); in start_nic()
2306 writeq(val64, &bar0->gpio_control); in start_nic()
2314 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
2322 struct s2io_nic *nic = fifo_data->nic; in s2io_txdl_getskb()
2328 if (txds->Host_Control == (u64)(long)fifo_data->ufo_in_band_v) { in s2io_txdl_getskb()
2329 dma_unmap_single(&nic->pdev->dev, in s2io_txdl_getskb()
2330 (dma_addr_t)txds->Buffer_Pointer, in s2io_txdl_getskb()
2335 skb = (struct sk_buff *)((unsigned long)txds->Host_Control); in s2io_txdl_getskb()
2337 memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds)); in s2io_txdl_getskb()
2340 dma_unmap_single(&nic->pdev->dev, (dma_addr_t)txds->Buffer_Pointer, in s2io_txdl_getskb()
2342 frg_cnt = skb_shinfo(skb)->nr_frags; in s2io_txdl_getskb()
2346 const skb_frag_t *frag = &skb_shinfo(skb)->frags[j]; in s2io_txdl_getskb()
2347 if (!txds->Buffer_Pointer) in s2io_txdl_getskb()
2349 dma_unmap_page(&nic->pdev->dev, in s2io_txdl_getskb()
2350 (dma_addr_t)txds->Buffer_Pointer, in s2io_txdl_getskb()
2354 memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds)); in s2io_txdl_getskb()
2359 * free_tx_buffers - Free all queued Tx buffers
2368 struct net_device *dev = nic->dev; in free_tx_buffers()
2373 struct config_param *config = &nic->config; in free_tx_buffers()
2374 struct mac_info *mac_control = &nic->mac_control; in free_tx_buffers()
2375 struct stat_block *stats = mac_control->stats_info; in free_tx_buffers()
2376 struct swStat *swstats = &stats->sw_stat; in free_tx_buffers()
2378 for (i = 0; i < config->tx_fifo_num; i++) { in free_tx_buffers()
2379 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in free_tx_buffers()
2380 struct fifo_info *fifo = &mac_control->fifos[i]; in free_tx_buffers()
2383 spin_lock_irqsave(&fifo->tx_lock, flags); in free_tx_buffers()
2384 for (j = 0; j < tx_cfg->fifo_len; j++) { in free_tx_buffers()
2385 txdp = fifo->list_info[j].list_virt_addr; in free_tx_buffers()
2386 skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j); in free_tx_buffers()
2388 swstats->mem_freed += skb->truesize; in free_tx_buffers()
2395 dev->name, cnt, i); in free_tx_buffers()
2396 fifo->tx_curr_get_info.offset = 0; in free_tx_buffers()
2397 fifo->tx_curr_put_info.offset = 0; in free_tx_buffers()
2398 spin_unlock_irqrestore(&fifo->tx_lock, flags); in free_tx_buffers()
2403 * stop_nic - To stop the nic
2414 struct XENA_dev_config __iomem *bar0 = nic->bar0; in stop_nic()
2425 val64 = readq(&bar0->adapter_control); in stop_nic()
2427 writeq(val64, &bar0->adapter_control); in stop_nic()
2431 * fill_rx_buffers - Allocates the Rx side skbs
2451 * SUCCESS on success or an appropriate -ve value on failure.
2467 struct swStat *swstats = &ring->nic->mac_control.stats_info->sw_stat; in fill_rx_buffers()
2469 alloc_cnt = ring->pkt_cnt - ring->rx_bufs_left; in fill_rx_buffers()
2471 block_no1 = ring->rx_curr_get_info.block_index; in fill_rx_buffers()
2473 block_no = ring->rx_curr_put_info.block_index; in fill_rx_buffers()
2475 off = ring->rx_curr_put_info.offset; in fill_rx_buffers()
2477 rxdp = ring->rx_blocks[block_no].rxds[off].virt_addr; in fill_rx_buffers()
2480 (off == ring->rx_curr_get_info.offset) && in fill_rx_buffers()
2481 (rxdp->Host_Control)) { in fill_rx_buffers()
2483 ring->dev->name); in fill_rx_buffers()
2486 if (off && (off == ring->rxd_count)) { in fill_rx_buffers()
2487 ring->rx_curr_put_info.block_index++; in fill_rx_buffers()
2488 if (ring->rx_curr_put_info.block_index == in fill_rx_buffers()
2489 ring->block_count) in fill_rx_buffers()
2490 ring->rx_curr_put_info.block_index = 0; in fill_rx_buffers()
2491 block_no = ring->rx_curr_put_info.block_index; in fill_rx_buffers()
2493 ring->rx_curr_put_info.offset = off; in fill_rx_buffers()
2494 rxdp = ring->rx_blocks[block_no].block_virt_addr; in fill_rx_buffers()
2496 ring->dev->name, rxdp); in fill_rx_buffers()
2500 if ((rxdp->Control_1 & RXD_OWN_XENA) && in fill_rx_buffers()
2501 ((ring->rxd_mode == RXD_MODE_3B) && in fill_rx_buffers()
2502 (rxdp->Control_2 & s2BIT(0)))) { in fill_rx_buffers()
2503 ring->rx_curr_put_info.offset = off; in fill_rx_buffers()
2507 size = ring->mtu + in fill_rx_buffers()
2510 if (ring->rxd_mode == RXD_MODE_1) in fill_rx_buffers()
2513 size = ring->mtu + ALIGN_SIZE + BUF0_LEN + 4; in fill_rx_buffers()
2516 skb = netdev_alloc_skb(nic->dev, size); in fill_rx_buffers()
2519 ring->dev->name); in fill_rx_buffers()
2522 first_rxdp->Control_1 |= RXD_OWN_XENA; in fill_rx_buffers()
2524 swstats->mem_alloc_fail_cnt++; in fill_rx_buffers()
2526 return -ENOMEM ; in fill_rx_buffers()
2528 swstats->mem_allocated += skb->truesize; in fill_rx_buffers()
2530 if (ring->rxd_mode == RXD_MODE_1) { in fill_rx_buffers()
2531 /* 1 buffer mode - normal operation mode */ in fill_rx_buffers()
2535 rxdp1->Buffer0_ptr = in fill_rx_buffers()
2536 dma_map_single(&ring->pdev->dev, skb->data, in fill_rx_buffers()
2537 size - NET_IP_ALIGN, in fill_rx_buffers()
2539 if (dma_mapping_error(&nic->pdev->dev, rxdp1->Buffer0_ptr)) in fill_rx_buffers()
2542 rxdp->Control_2 = in fill_rx_buffers()
2543 SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN); in fill_rx_buffers()
2544 rxdp->Host_Control = (unsigned long)skb; in fill_rx_buffers()
2545 } else if (ring->rxd_mode == RXD_MODE_3B) { in fill_rx_buffers()
2547 * 2 buffer mode - in fill_rx_buffers()
2554 Buffer0_ptr = rxdp3->Buffer0_ptr; in fill_rx_buffers()
2555 Buffer1_ptr = rxdp3->Buffer1_ptr; in fill_rx_buffers()
2558 rxdp3->Buffer0_ptr = Buffer0_ptr; in fill_rx_buffers()
2559 rxdp3->Buffer1_ptr = Buffer1_ptr; in fill_rx_buffers()
2561 ba = &ring->ba[block_no][off]; in fill_rx_buffers()
2563 tmp = (u64)(unsigned long)skb->data; in fill_rx_buffers()
2566 skb->data = (void *) (unsigned long)tmp; in fill_rx_buffers()
2570 rxdp3->Buffer0_ptr = in fill_rx_buffers()
2571 dma_map_single(&ring->pdev->dev, in fill_rx_buffers()
2572 ba->ba_0, BUF0_LEN, in fill_rx_buffers()
2574 if (dma_mapping_error(&nic->pdev->dev, rxdp3->Buffer0_ptr)) in fill_rx_buffers()
2577 dma_sync_single_for_device(&ring->pdev->dev, in fill_rx_buffers()
2578 (dma_addr_t)rxdp3->Buffer0_ptr, in fill_rx_buffers()
2582 rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN); in fill_rx_buffers()
2583 if (ring->rxd_mode == RXD_MODE_3B) { in fill_rx_buffers()
2590 rxdp3->Buffer2_ptr = dma_map_single(&ring->pdev->dev, in fill_rx_buffers()
2591 skb->data, in fill_rx_buffers()
2592 ring->mtu + 4, in fill_rx_buffers()
2595 if (dma_mapping_error(&nic->pdev->dev, rxdp3->Buffer2_ptr)) in fill_rx_buffers()
2599 rxdp3->Buffer1_ptr = in fill_rx_buffers()
2600 dma_map_single(&ring->pdev->dev, in fill_rx_buffers()
2601 ba->ba_1, in fill_rx_buffers()
2605 if (dma_mapping_error(&nic->pdev->dev, in fill_rx_buffers()
2606 rxdp3->Buffer1_ptr)) { in fill_rx_buffers()
2607 dma_unmap_single(&ring->pdev->dev, in fill_rx_buffers()
2609 skb->data, in fill_rx_buffers()
2610 ring->mtu + 4, in fill_rx_buffers()
2615 rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1); in fill_rx_buffers()
2616 rxdp->Control_2 |= SET_BUFFER2_SIZE_3 in fill_rx_buffers()
2617 (ring->mtu + 4); in fill_rx_buffers()
2619 rxdp->Control_2 |= s2BIT(0); in fill_rx_buffers()
2620 rxdp->Host_Control = (unsigned long) (skb); in fill_rx_buffers()
2622 if (alloc_tab & ((1 << rxsync_frequency) - 1)) in fill_rx_buffers()
2623 rxdp->Control_1 |= RXD_OWN_XENA; in fill_rx_buffers()
2625 if (off == (ring->rxd_count + 1)) in fill_rx_buffers()
2627 ring->rx_curr_put_info.offset = off; in fill_rx_buffers()
2629 rxdp->Control_2 |= SET_RXD_MARKER; in fill_rx_buffers()
2630 if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) { in fill_rx_buffers()
2633 first_rxdp->Control_1 |= RXD_OWN_XENA; in fill_rx_buffers()
2637 ring->rx_bufs_left += 1; in fill_rx_buffers()
2648 first_rxdp->Control_1 |= RXD_OWN_XENA; in fill_rx_buffers()
2654 swstats->pci_map_fail_cnt++; in fill_rx_buffers()
2655 swstats->mem_freed += skb->truesize; in fill_rx_buffers()
2657 return -ENOMEM; in fill_rx_buffers()
2662 struct net_device *dev = sp->dev; in free_rxd_blk()
2668 struct mac_info *mac_control = &sp->mac_control; in free_rxd_blk()
2669 struct stat_block *stats = mac_control->stats_info; in free_rxd_blk()
2670 struct swStat *swstats = &stats->sw_stat; in free_rxd_blk()
2672 for (j = 0 ; j < rxd_count[sp->rxd_mode]; j++) { in free_rxd_blk()
2673 rxdp = mac_control->rings[ring_no]. in free_rxd_blk()
2675 skb = (struct sk_buff *)((unsigned long)rxdp->Host_Control); in free_rxd_blk()
2678 if (sp->rxd_mode == RXD_MODE_1) { in free_rxd_blk()
2680 dma_unmap_single(&sp->pdev->dev, in free_rxd_blk()
2681 (dma_addr_t)rxdp1->Buffer0_ptr, in free_rxd_blk()
2682 dev->mtu + in free_rxd_blk()
2687 } else if (sp->rxd_mode == RXD_MODE_3B) { in free_rxd_blk()
2689 dma_unmap_single(&sp->pdev->dev, in free_rxd_blk()
2690 (dma_addr_t)rxdp3->Buffer0_ptr, in free_rxd_blk()
2692 dma_unmap_single(&sp->pdev->dev, in free_rxd_blk()
2693 (dma_addr_t)rxdp3->Buffer1_ptr, in free_rxd_blk()
2695 dma_unmap_single(&sp->pdev->dev, in free_rxd_blk()
2696 (dma_addr_t)rxdp3->Buffer2_ptr, in free_rxd_blk()
2697 dev->mtu + 4, DMA_FROM_DEVICE); in free_rxd_blk()
2700 swstats->mem_freed += skb->truesize; in free_rxd_blk()
2702 mac_control->rings[ring_no].rx_bufs_left -= 1; in free_rxd_blk()
2707 * free_rx_buffers - Frees all Rx buffers
2717 struct net_device *dev = sp->dev; in free_rx_buffers()
2719 struct config_param *config = &sp->config; in free_rx_buffers()
2720 struct mac_info *mac_control = &sp->mac_control; in free_rx_buffers()
2722 for (i = 0; i < config->rx_ring_num; i++) { in free_rx_buffers()
2723 struct ring_info *ring = &mac_control->rings[i]; in free_rx_buffers()
2728 ring->rx_curr_put_info.block_index = 0; in free_rx_buffers()
2729 ring->rx_curr_get_info.block_index = 0; in free_rx_buffers()
2730 ring->rx_curr_put_info.offset = 0; in free_rx_buffers()
2731 ring->rx_curr_get_info.offset = 0; in free_rx_buffers()
2732 ring->rx_bufs_left = 0; in free_rx_buffers()
2734 dev->name, buf_cnt, i); in free_rx_buffers()
2740 if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) { in s2io_chk_rx_buffers()
2742 ring->dev->name); in s2io_chk_rx_buffers()
2748 * s2io_poll_msix - Rx interrupt handler for NAPI support
2763 struct net_device *dev = ring->dev; in s2io_poll_msix()
2768 struct XENA_dev_config __iomem *bar0 = nic->bar0; in s2io_poll_msix()
2779 /*Re Enable MSI-Rx Vector*/ in s2io_poll_msix()
2780 addr = (u8 __iomem *)&bar0->xmsi_mask_reg; in s2io_poll_msix()
2781 addr += 7 - ring->ring_no; in s2io_poll_msix()
2782 val8 = (ring->ring_no == 0) ? 0x3f : 0xbf; in s2io_poll_msix()
2794 struct XENA_dev_config __iomem *bar0 = nic->bar0; in s2io_poll_inta()
2796 struct config_param *config = &nic->config; in s2io_poll_inta()
2797 struct mac_info *mac_control = &nic->mac_control; in s2io_poll_inta()
2802 for (i = 0; i < config->rx_ring_num; i++) { in s2io_poll_inta()
2803 struct ring_info *ring = &mac_control->rings[i]; in s2io_poll_inta()
2807 budget -= ring_pkts_processed; in s2io_poll_inta()
2814 writeq(0, &bar0->rx_traffic_mask); in s2io_poll_inta()
2815 readl(&bar0->rx_traffic_mask); in s2io_poll_inta()
2822 * s2io_netpoll - netpoll event handler entry point
2827 * specific in-kernel networking tasks, such as remote consoles and kernel
2833 const int irq = nic->pdev->irq; in s2io_netpoll()
2834 struct XENA_dev_config __iomem *bar0 = nic->bar0; in s2io_netpoll()
2837 struct config_param *config = &nic->config; in s2io_netpoll()
2838 struct mac_info *mac_control = &nic->mac_control; in s2io_netpoll()
2840 if (pci_channel_offline(nic->pdev)) in s2io_netpoll()
2845 writeq(val64, &bar0->rx_traffic_int); in s2io_netpoll()
2846 writeq(val64, &bar0->tx_traffic_int); in s2io_netpoll()
2852 for (i = 0; i < config->tx_fifo_num; i++) in s2io_netpoll()
2853 tx_intr_handler(&mac_control->fifos[i]); in s2io_netpoll()
2856 for (i = 0; i < config->rx_ring_num; i++) { in s2io_netpoll()
2857 struct ring_info *ring = &mac_control->rings[i]; in s2io_netpoll()
2862 for (i = 0; i < config->rx_ring_num; i++) { in s2io_netpoll()
2863 struct ring_info *ring = &mac_control->rings[i]; in s2io_netpoll()
2865 if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) { in s2io_netpoll()
2868 dev->name); in s2io_netpoll()
2877 * rx_intr_handler - Rx interrupt handler
2882 * receive ring contains fresh as yet un-processed frames,this function is
2903 get_info = ring_data->rx_curr_get_info; in rx_intr_handler()
2905 memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info)); in rx_intr_handler()
2907 rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr; in rx_intr_handler()
2917 ring_data->dev->name); in rx_intr_handler()
2920 skb = (struct sk_buff *)((unsigned long)rxdp->Host_Control); in rx_intr_handler()
2923 ring_data->dev->name); in rx_intr_handler()
2926 if (ring_data->rxd_mode == RXD_MODE_1) { in rx_intr_handler()
2928 dma_unmap_single(&ring_data->pdev->dev, in rx_intr_handler()
2929 (dma_addr_t)rxdp1->Buffer0_ptr, in rx_intr_handler()
2930 ring_data->mtu + in rx_intr_handler()
2935 } else if (ring_data->rxd_mode == RXD_MODE_3B) { in rx_intr_handler()
2937 dma_sync_single_for_cpu(&ring_data->pdev->dev, in rx_intr_handler()
2938 (dma_addr_t)rxdp3->Buffer0_ptr, in rx_intr_handler()
2940 dma_unmap_single(&ring_data->pdev->dev, in rx_intr_handler()
2941 (dma_addr_t)rxdp3->Buffer2_ptr, in rx_intr_handler()
2942 ring_data->mtu + 4, DMA_FROM_DEVICE); in rx_intr_handler()
2944 prefetch(skb->data); in rx_intr_handler()
2947 ring_data->rx_curr_get_info.offset = get_info.offset; in rx_intr_handler()
2948 rxdp = ring_data->rx_blocks[get_block]. in rx_intr_handler()
2950 if (get_info.offset == rxd_count[ring_data->rxd_mode]) { in rx_intr_handler()
2952 ring_data->rx_curr_get_info.offset = get_info.offset; in rx_intr_handler()
2954 if (get_block == ring_data->block_count) in rx_intr_handler()
2956 ring_data->rx_curr_get_info.block_index = get_block; in rx_intr_handler()
2957 rxdp = ring_data->rx_blocks[get_block].block_virt_addr; in rx_intr_handler()
2960 if (ring_data->nic->config.napi) { in rx_intr_handler()
2961 budget--; in rx_intr_handler()
2970 if (ring_data->lro) { in rx_intr_handler()
2973 struct lro *lro = &ring_data->lro0_n[i]; in rx_intr_handler()
2974 if (lro->in_use) { in rx_intr_handler()
2975 update_L3L4_header(ring_data->nic, lro); in rx_intr_handler()
2976 queue_rx_frame(lro->parent, lro->vlan_tag); in rx_intr_handler()
2985 * tx_intr_handler - Transmit interrupt handler
2998 struct s2io_nic *nic = fifo_data->nic; in tx_intr_handler()
3005 struct stat_block *stats = nic->mac_control.stats_info; in tx_intr_handler()
3006 struct swStat *swstats = &stats->sw_stat; in tx_intr_handler()
3008 if (!spin_trylock_irqsave(&fifo_data->tx_lock, flags)) in tx_intr_handler()
3011 get_info = fifo_data->tx_curr_get_info; in tx_intr_handler()
3012 memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info)); in tx_intr_handler()
3013 txdlp = fifo_data->list_info[get_info.offset].list_virt_addr; in tx_intr_handler()
3014 while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) && in tx_intr_handler()
3016 (txdlp->Host_Control)) { in tx_intr_handler()
3018 if (txdlp->Control_1 & TXD_T_CODE) { in tx_intr_handler()
3020 err = txdlp->Control_1 & TXD_T_CODE; in tx_intr_handler()
3022 swstats->parity_err_cnt++; in tx_intr_handler()
3029 swstats->tx_buf_abort_cnt++; in tx_intr_handler()
3033 swstats->tx_desc_abort_cnt++; in tx_intr_handler()
3037 swstats->tx_parity_err_cnt++; in tx_intr_handler()
3041 swstats->tx_link_loss_cnt++; in tx_intr_handler()
3045 swstats->tx_list_proc_err_cnt++; in tx_intr_handler()
3052 spin_unlock_irqrestore(&fifo_data->tx_lock, flags); in tx_intr_handler()
3060 swstats->mem_freed += skb->truesize; in tx_intr_handler()
3066 txdlp = fifo_data->list_info[get_info.offset].list_virt_addr; in tx_intr_handler()
3067 fifo_data->tx_curr_get_info.offset = get_info.offset; in tx_intr_handler()
3070 s2io_wake_tx_queue(fifo_data, pkt_cnt, nic->config.multiq); in tx_intr_handler()
3072 spin_unlock_irqrestore(&fifo_data->tx_lock, flags); in tx_intr_handler()
3076 * s2io_mdio_write - Function to write in to MDIO registers
3090 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_mdio_write()
3096 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3098 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3107 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3109 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3116 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3118 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3123 * s2io_mdio_read - Function to write in to MDIO registers
3136 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_mdio_read()
3142 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3144 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3152 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3154 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3158 rval64 = readq(&bar0->mdio_control); in s2io_mdio_read()
3165 * s2io_chk_xpak_counter - Function to check the status of the xpak counters
3208 "Excessive laser output power may saturate far-end receiver.\n"); in s2io_chk_xpak_counter()
3225 * s2io_updt_xpak_counter - Function to update the xpak counters
3240 struct stat_block *stats = sp->mac_control.stats_info; in s2io_updt_xpak_counter()
3241 struct xpakStat *xstats = &stats->xpak_stat; in s2io_updt_xpak_counter()
3249 "ERR: MDIO slave access failed - Returned %llx\n", in s2io_updt_xpak_counter()
3256 DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - " in s2io_updt_xpak_counter()
3257 "Returned: %llx- Expected: 0x%x\n", in s2io_updt_xpak_counter()
3274 s2io_chk_xpak_counter(&xstats->alarm_transceiver_temp_high, in s2io_updt_xpak_counter()
3275 &xstats->xpak_regs_stat, in s2io_updt_xpak_counter()
3279 xstats->alarm_transceiver_temp_low++; in s2io_updt_xpak_counter()
3283 s2io_chk_xpak_counter(&xstats->alarm_laser_bias_current_high, in s2io_updt_xpak_counter()
3284 &xstats->xpak_regs_stat, in s2io_updt_xpak_counter()
3288 xstats->alarm_laser_bias_current_low++; in s2io_updt_xpak_counter()
3292 s2io_chk_xpak_counter(&xstats->alarm_laser_output_power_high, in s2io_updt_xpak_counter()
3293 &xstats->xpak_regs_stat, in s2io_updt_xpak_counter()
3297 xstats->alarm_laser_output_power_low++; in s2io_updt_xpak_counter()
3305 xstats->warn_transceiver_temp_high++; in s2io_updt_xpak_counter()
3308 xstats->warn_transceiver_temp_low++; in s2io_updt_xpak_counter()
3311 xstats->warn_laser_bias_current_high++; in s2io_updt_xpak_counter()
3314 xstats->warn_laser_bias_current_low++; in s2io_updt_xpak_counter()
3317 xstats->warn_laser_output_power_high++; in s2io_updt_xpak_counter()
3320 xstats->warn_laser_output_power_low++; in s2io_updt_xpak_counter()
3324 * wait_for_cmd_complete - waits for a command to complete.
3371 * check_pci_device_id - Checks if the device id is supported
3391 * s2io_reset - Resets the card.
3402 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_reset()
3413 __func__, pci_name(sp->pdev)); in s2io_reset()
3415 /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */ in s2io_reset()
3416 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd)); in s2io_reset()
3419 writeq(val64, &bar0->sw_reset); in s2io_reset()
3420 if (strstr(sp->product_name, "CX4")) in s2io_reset()
3426 pci_restore_state(sp->pdev); in s2io_reset()
3427 pci_save_state(sp->pdev); in s2io_reset()
3428 pci_read_config_word(sp->pdev, 0x2, &val16); in s2io_reset()
3437 pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd); in s2io_reset()
3450 /* Clear certain PCI/PCI-X fields after reset */ in s2io_reset()
3451 if (sp->device_type == XFRAME_II_DEVICE) { in s2io_reset()
3453 pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000); in s2io_reset()
3456 pci_write_config_dword(sp->pdev, 0x68, 0x7C); in s2io_reset()
3459 writeq(s2BIT(62), &bar0->txpic_int_reg); in s2io_reset()
3463 memset(&sp->stats, 0, sizeof(struct net_device_stats)); in s2io_reset()
3465 stats = sp->mac_control.stats_info; in s2io_reset()
3466 swstats = &stats->sw_stat; in s2io_reset()
3469 up_cnt = swstats->link_up_cnt; in s2io_reset()
3470 down_cnt = swstats->link_down_cnt; in s2io_reset()
3471 up_time = swstats->link_up_time; in s2io_reset()
3472 down_time = swstats->link_down_time; in s2io_reset()
3473 reset_cnt = swstats->soft_reset_cnt; in s2io_reset()
3474 mem_alloc_cnt = swstats->mem_allocated; in s2io_reset()
3475 mem_free_cnt = swstats->mem_freed; in s2io_reset()
3476 watchdog_cnt = swstats->watchdog_timer_cnt; in s2io_reset()
3481 swstats->link_up_cnt = up_cnt; in s2io_reset()
3482 swstats->link_down_cnt = down_cnt; in s2io_reset()
3483 swstats->link_up_time = up_time; in s2io_reset()
3484 swstats->link_down_time = down_time; in s2io_reset()
3485 swstats->soft_reset_cnt = reset_cnt; in s2io_reset()
3486 swstats->mem_allocated = mem_alloc_cnt; in s2io_reset()
3487 swstats->mem_freed = mem_free_cnt; in s2io_reset()
3488 swstats->watchdog_timer_cnt = watchdog_cnt; in s2io_reset()
3490 /* SXE-002: Configure link and activity LED to turn it off */ in s2io_reset()
3491 subid = sp->pdev->subsystem_device; in s2io_reset()
3493 (sp->device_type == XFRAME_I_DEVICE)) { in s2io_reset()
3494 val64 = readq(&bar0->gpio_control); in s2io_reset()
3496 writeq(val64, &bar0->gpio_control); in s2io_reset()
3505 if (sp->device_type == XFRAME_II_DEVICE) { in s2io_reset()
3506 val64 = readq(&bar0->pcc_err_reg); in s2io_reset()
3507 writeq(val64, &bar0->pcc_err_reg); in s2io_reset()
3510 sp->device_enabled_once = false; in s2io_reset()
3514 * s2io_set_swapper - to set the swapper controle on the card
3525 struct net_device *dev = sp->dev; in s2io_set_swapper()
3526 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_set_swapper()
3531 * the PIF Feed-back register. in s2io_set_swapper()
3534 val64 = readq(&bar0->pif_rd_swapper_fb); in s2io_set_swapper()
3545 writeq(value[i], &bar0->swapper_ctrl); in s2io_set_swapper()
3546 val64 = readq(&bar0->pif_rd_swapper_fb); in s2io_set_swapper()
3554 dev->name, (unsigned long long)val64); in s2io_set_swapper()
3559 valr = readq(&bar0->swapper_ctrl); in s2io_set_swapper()
3563 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3564 val64 = readq(&bar0->xmsi_address); in s2io_set_swapper()
3576 writeq((value[i] | valr), &bar0->swapper_ctrl); in s2io_set_swapper()
3577 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3578 val64 = readq(&bar0->xmsi_address); in s2io_set_swapper()
3590 val64 = readq(&bar0->swapper_ctrl); in s2io_set_swapper()
3609 if (sp->config.intr_type == INTA) in s2io_set_swapper()
3611 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3633 if (sp->config.intr_type == INTA) in s2io_set_swapper()
3635 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3637 val64 = readq(&bar0->swapper_ctrl); in s2io_set_swapper()
3643 val64 = readq(&bar0->pif_rd_swapper_fb); in s2io_set_swapper()
3648 dev->name, (unsigned long long)val64); in s2io_set_swapper()
3657 struct XENA_dev_config __iomem *bar0 = nic->bar0; in wait_for_msix_trans()
3662 val64 = readq(&bar0->xmsi_access); in wait_for_msix_trans()
3678 struct XENA_dev_config __iomem *bar0 = nic->bar0; in restore_xmsi_data()
3682 if (nic->device_type == XFRAME_I_DEVICE) in restore_xmsi_data()
3686 msix_index = (i) ? ((i-1) * 8 + 1) : 0; in restore_xmsi_data()
3687 writeq(nic->msix_info[i].addr, &bar0->xmsi_address); in restore_xmsi_data()
3688 writeq(nic->msix_info[i].data, &bar0->xmsi_data); in restore_xmsi_data()
3690 writeq(val64, &bar0->xmsi_access); in restore_xmsi_data()
3699 struct XENA_dev_config __iomem *bar0 = nic->bar0; in store_xmsi_data()
3703 if (nic->device_type == XFRAME_I_DEVICE) in store_xmsi_data()
3708 msix_index = (i) ? ((i-1) * 8 + 1) : 0; in store_xmsi_data()
3710 writeq(val64, &bar0->xmsi_access); in store_xmsi_data()
3716 addr = readq(&bar0->xmsi_address); in store_xmsi_data()
3717 data = readq(&bar0->xmsi_data); in store_xmsi_data()
3719 nic->msix_info[i].addr = addr; in store_xmsi_data()
3720 nic->msix_info[i].data = data; in store_xmsi_data()
3727 struct XENA_dev_config __iomem *bar0 = nic->bar0; in s2io_enable_msi_x()
3732 struct stat_block *stats = nic->mac_control.stats_info; in s2io_enable_msi_x()
3733 struct swStat *swstats = &stats->sw_stat; in s2io_enable_msi_x()
3735 size = nic->num_entries * sizeof(struct msix_entry); in s2io_enable_msi_x()
3736 nic->entries = kzalloc(size, GFP_KERNEL); in s2io_enable_msi_x()
3737 if (!nic->entries) { in s2io_enable_msi_x()
3740 swstats->mem_alloc_fail_cnt++; in s2io_enable_msi_x()
3741 return -ENOMEM; in s2io_enable_msi_x()
3743 swstats->mem_allocated += size; in s2io_enable_msi_x()
3745 size = nic->num_entries * sizeof(struct s2io_msix_entry); in s2io_enable_msi_x()
3746 nic->s2io_entries = kzalloc(size, GFP_KERNEL); in s2io_enable_msi_x()
3747 if (!nic->s2io_entries) { in s2io_enable_msi_x()
3750 swstats->mem_alloc_fail_cnt++; in s2io_enable_msi_x()
3751 kfree(nic->entries); in s2io_enable_msi_x()
3752 swstats->mem_freed in s2io_enable_msi_x()
3753 += (nic->num_entries * sizeof(struct msix_entry)); in s2io_enable_msi_x()
3754 return -ENOMEM; in s2io_enable_msi_x()
3756 swstats->mem_allocated += size; in s2io_enable_msi_x()
3758 nic->entries[0].entry = 0; in s2io_enable_msi_x()
3759 nic->s2io_entries[0].entry = 0; in s2io_enable_msi_x()
3760 nic->s2io_entries[0].in_use = MSIX_FLG; in s2io_enable_msi_x()
3761 nic->s2io_entries[0].type = MSIX_ALARM_TYPE; in s2io_enable_msi_x()
3762 nic->s2io_entries[0].arg = &nic->mac_control.fifos; in s2io_enable_msi_x()
3764 for (i = 1; i < nic->num_entries; i++) { in s2io_enable_msi_x()
3765 nic->entries[i].entry = ((i - 1) * 8) + 1; in s2io_enable_msi_x()
3766 nic->s2io_entries[i].entry = ((i - 1) * 8) + 1; in s2io_enable_msi_x()
3767 nic->s2io_entries[i].arg = NULL; in s2io_enable_msi_x()
3768 nic->s2io_entries[i].in_use = 0; in s2io_enable_msi_x()
3771 rx_mat = readq(&bar0->rx_mat); in s2io_enable_msi_x()
3772 for (j = 0; j < nic->config.rx_ring_num; j++) { in s2io_enable_msi_x()
3774 nic->s2io_entries[j+1].arg = &nic->mac_control.rings[j]; in s2io_enable_msi_x()
3775 nic->s2io_entries[j+1].type = MSIX_RING_TYPE; in s2io_enable_msi_x()
3776 nic->s2io_entries[j+1].in_use = MSIX_FLG; in s2io_enable_msi_x()
3779 writeq(rx_mat, &bar0->rx_mat); in s2io_enable_msi_x()
3780 readq(&bar0->rx_mat); in s2io_enable_msi_x()
3782 ret = pci_enable_msix_range(nic->pdev, nic->entries, in s2io_enable_msi_x()
3783 nic->num_entries, nic->num_entries); in s2io_enable_msi_x()
3786 DBG_PRINT(ERR_DBG, "Enabling MSI-X failed\n"); in s2io_enable_msi_x()
3787 kfree(nic->entries); in s2io_enable_msi_x()
3788 swstats->mem_freed += nic->num_entries * in s2io_enable_msi_x()
3790 kfree(nic->s2io_entries); in s2io_enable_msi_x()
3791 swstats->mem_freed += nic->num_entries * in s2io_enable_msi_x()
3793 nic->entries = NULL; in s2io_enable_msi_x()
3794 nic->s2io_entries = NULL; in s2io_enable_msi_x()
3795 return -ENOMEM; in s2io_enable_msi_x()
3799 * To enable MSI-X, MSI also needs to be enabled, due to a bug in s2io_enable_msi_x()
3802 pci_read_config_word(nic->pdev, 0x42, &msi_control); in s2io_enable_msi_x()
3804 pci_write_config_word(nic->pdev, 0x42, msi_control); in s2io_enable_msi_x()
3814 sp->msi_detected = 1; in s2io_test_intr()
3815 wake_up(&sp->msi_wait); in s2io_test_intr()
3823 struct pci_dev *pdev = sp->pdev; in s2io_test_msi()
3824 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_test_msi()
3828 err = request_irq(sp->entries[1].vector, s2io_test_intr, 0, in s2io_test_msi()
3829 sp->name, sp); in s2io_test_msi()
3832 sp->dev->name, pci_name(pdev), pdev->irq); in s2io_test_msi()
3836 init_waitqueue_head(&sp->msi_wait); in s2io_test_msi()
3837 sp->msi_detected = 0; in s2io_test_msi()
3839 saved64 = val64 = readq(&bar0->scheduled_int_ctrl); in s2io_test_msi()
3843 writeq(val64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
3845 wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10); in s2io_test_msi()
3847 if (!sp->msi_detected) { in s2io_test_msi()
3851 sp->dev->name, pci_name(pdev)); in s2io_test_msi()
3853 err = -EOPNOTSUPP; in s2io_test_msi()
3856 free_irq(sp->entries[1].vector, sp); in s2io_test_msi()
3858 writeq(saved64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
3868 for (i = 0; i < sp->num_entries; i++) { in remove_msix_isr()
3869 if (sp->s2io_entries[i].in_use == MSIX_REGISTERED_SUCCESS) { in remove_msix_isr()
3870 int vector = sp->entries[i].vector; in remove_msix_isr()
3871 void *arg = sp->s2io_entries[i].arg; in remove_msix_isr()
3876 kfree(sp->entries); in remove_msix_isr()
3877 kfree(sp->s2io_entries); in remove_msix_isr()
3878 sp->entries = NULL; in remove_msix_isr()
3879 sp->s2io_entries = NULL; in remove_msix_isr()
3881 pci_read_config_word(sp->pdev, 0x42, &msi_control); in remove_msix_isr()
3883 pci_write_config_word(sp->pdev, 0x42, msi_control); in remove_msix_isr()
3885 pci_disable_msix(sp->pdev); in remove_msix_isr()
3890 free_irq(sp->pdev->irq, sp->dev); in remove_inta_isr()
3898 * s2io_open - open entry point of the driver
3905 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3912 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat; in s2io_open()
3920 sp->last_link_state = 0; in s2io_open()
3926 dev->name); in s2io_open()
3930 if (do_s2io_prog_unicast(dev, dev->dev_addr) == FAILURE) { in s2io_open()
3933 err = -ENODEV; in s2io_open()
3940 if (sp->config.intr_type == MSI_X) { in s2io_open()
3941 if (sp->entries) { in s2io_open()
3942 kfree(sp->entries); in s2io_open()
3943 swstats->mem_freed += sp->num_entries * in s2io_open()
3946 if (sp->s2io_entries) { in s2io_open()
3947 kfree(sp->s2io_entries); in s2io_open()
3948 swstats->mem_freed += sp->num_entries * in s2io_open()
3956 * s2io_close -close entry point of the driver
3964 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3971 struct config_param *config = &sp->config; in s2io_close()
3983 for (offset = 1; offset < config->max_mc_addr; offset++) { in s2io_close()
3995 * s2io_xmit - Tx entry point of te driver
4019 struct config_param *config = &sp->config; in s2io_xmit()
4020 struct mac_info *mac_control = &sp->mac_control; in s2io_xmit()
4021 struct stat_block *stats = mac_control->stats_info; in s2io_xmit()
4022 struct swStat *swstats = &stats->sw_stat; in s2io_xmit()
4024 DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name); in s2io_xmit()
4026 if (unlikely(skb->len <= 0)) { in s2io_xmit()
4027 DBG_PRINT(TX_DBG, "%s: Buffer has no data..\n", dev->name); in s2io_xmit()
4034 dev->name); in s2io_xmit()
4042 if (sp->config.tx_steering_type == TX_DEFAULT_STEERING) { in s2io_xmit()
4043 if (skb->protocol == htons(ETH_P_IP)) { in s2io_xmit()
4050 ip->ihl*4); in s2io_xmit()
4052 if (ip->protocol == IPPROTO_TCP) { in s2io_xmit()
4053 queue_len = sp->total_tcp_fifos; in s2io_xmit()
4054 queue = (ntohs(th->source) + in s2io_xmit()
4055 ntohs(th->dest)) & in s2io_xmit()
4056 sp->fifo_selector[queue_len - 1]; in s2io_xmit()
4058 queue = queue_len - 1; in s2io_xmit()
4059 } else if (ip->protocol == IPPROTO_UDP) { in s2io_xmit()
4060 queue_len = sp->total_udp_fifos; in s2io_xmit()
4061 queue = (ntohs(th->source) + in s2io_xmit()
4062 ntohs(th->dest)) & in s2io_xmit()
4063 sp->fifo_selector[queue_len - 1]; in s2io_xmit()
4065 queue = queue_len - 1; in s2io_xmit()
4066 queue += sp->udp_fifo_idx; in s2io_xmit()
4067 if (skb->len > 1024) in s2io_xmit()
4072 } else if (sp->config.tx_steering_type == TX_PRIORITY_STEERING) in s2io_xmit()
4073 /* get fifo number based on skb->priority value */ in s2io_xmit()
4074 queue = config->fifo_mapping in s2io_xmit()
4075 [skb->priority & (MAX_TX_FIFOS - 1)]; in s2io_xmit()
4076 fifo = &mac_control->fifos[queue]; in s2io_xmit()
4078 spin_lock_irqsave(&fifo->tx_lock, flags); in s2io_xmit()
4080 if (sp->config.multiq) { in s2io_xmit()
4081 if (__netif_subqueue_stopped(dev, fifo->fifo_no)) { in s2io_xmit()
4082 spin_unlock_irqrestore(&fifo->tx_lock, flags); in s2io_xmit()
4085 } else if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) { in s2io_xmit()
4087 spin_unlock_irqrestore(&fifo->tx_lock, flags); in s2io_xmit()
4092 put_off = (u16)fifo->tx_curr_put_info.offset; in s2io_xmit()
4093 get_off = (u16)fifo->tx_curr_get_info.offset; in s2io_xmit()
4094 txdp = fifo->list_info[put_off].list_virt_addr; in s2io_xmit()
4096 queue_len = fifo->tx_curr_put_info.fifo_len + 1; in s2io_xmit()
4098 if (txdp->Host_Control || in s2io_xmit()
4101 s2io_stop_tx_queue(sp, fifo->fifo_no); in s2io_xmit()
4103 spin_unlock_irqrestore(&fifo->tx_lock, flags); in s2io_xmit()
4109 txdp->Control_1 |= TXD_TCP_LSO_EN; in s2io_xmit()
4110 txdp->Control_1 |= TXD_TCP_LSO_MSS(s2io_tcp_mss(skb)); in s2io_xmit()
4112 if (skb->ip_summed == CHECKSUM_PARTIAL) { in s2io_xmit()
4113 txdp->Control_2 |= (TXD_TX_CKO_IPV4_EN | in s2io_xmit()
4117 txdp->Control_1 |= TXD_GATHER_CODE_FIRST; in s2io_xmit()
4118 txdp->Control_1 |= TXD_LIST_OWN_XENA; in s2io_xmit()
4119 txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no); in s2io_xmit()
4122 txdp->Control_2 |= TXD_INT_TYPE_PER_LIST; in s2io_xmit()
4124 txdp->Control_2 |= TXD_VLAN_ENABLE; in s2io_xmit()
4125 txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag); in s2io_xmit()
4129 txdp->Buffer_Pointer = dma_map_single(&sp->pdev->dev, skb->data, in s2io_xmit()
4131 if (dma_mapping_error(&sp->pdev->dev, txdp->Buffer_Pointer)) in s2io_xmit()
4134 txdp->Host_Control = (unsigned long)skb; in s2io_xmit()
4135 txdp->Control_1 |= TXD_BUFFER0_SIZE(frg_len); in s2io_xmit()
4137 frg_cnt = skb_shinfo(skb)->nr_frags; in s2io_xmit()
4140 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in s2io_xmit()
4145 txdp->Buffer_Pointer = (u64)skb_frag_dma_map(&sp->pdev->dev, in s2io_xmit()
4149 txdp->Control_1 = TXD_BUFFER0_SIZE(skb_frag_size(frag)); in s2io_xmit()
4151 txdp->Control_1 |= TXD_GATHER_CODE_LAST; in s2io_xmit()
4153 tx_fifo = mac_control->tx_FIFO_start[queue]; in s2io_xmit()
4154 val64 = fifo->list_info[put_off].list_phy_addr; in s2io_xmit()
4155 writeq(val64, &tx_fifo->TxDL_Pointer); in s2io_xmit()
4162 writeq(val64, &tx_fifo->List_Control); in s2io_xmit()
4165 if (put_off == fifo->tx_curr_put_info.fifo_len + 1) in s2io_xmit()
4167 fifo->tx_curr_put_info.offset = put_off; in s2io_xmit()
4171 swstats->fifo_full_cnt++; in s2io_xmit()
4175 s2io_stop_tx_queue(sp, fifo->fifo_no); in s2io_xmit()
4177 swstats->mem_allocated += skb->truesize; in s2io_xmit()
4178 spin_unlock_irqrestore(&fifo->tx_lock, flags); in s2io_xmit()
4180 if (sp->config.intr_type == MSI_X) in s2io_xmit()
4186 swstats->pci_map_fail_cnt++; in s2io_xmit()
4187 s2io_stop_tx_queue(sp, fifo->fifo_no); in s2io_xmit()
4188 swstats->mem_freed += skb->truesize; in s2io_xmit()
4190 spin_unlock_irqrestore(&fifo->tx_lock, flags); in s2io_xmit()
4198 struct net_device *dev = sp->dev; in s2io_alarm_handle()
4201 mod_timer(&sp->alarm_timer, jiffies + HZ / 2); in s2io_alarm_handle()
4207 struct s2io_nic *sp = ring->nic; in s2io_msix_ring_handle()
4208 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_msix_ring_handle()
4213 if (sp->config.napi) { in s2io_msix_ring_handle()
4217 addr = (u8 __iomem *)&bar0->xmsi_mask_reg; in s2io_msix_ring_handle()
4218 addr += (7 - ring->ring_no); in s2io_msix_ring_handle()
4219 val8 = (ring->ring_no == 0) ? 0x7f : 0xff; in s2io_msix_ring_handle()
4222 napi_schedule(&ring->napi); in s2io_msix_ring_handle()
4235 struct s2io_nic *sp = fifos->nic; in s2io_msix_fifo_handle()
4236 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_msix_fifo_handle()
4237 struct config_param *config = &sp->config; in s2io_msix_fifo_handle()
4243 reason = readq(&bar0->general_int_status); in s2io_msix_fifo_handle()
4249 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4255 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_msix_fifo_handle()
4257 for (i = 0; i < config->tx_fifo_num; i++) in s2io_msix_fifo_handle()
4260 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4261 readl(&bar0->general_int_status); in s2io_msix_fifo_handle()
4270 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_txpic_intr_handle()
4273 val64 = readq(&bar0->pic_int_status); in s2io_txpic_intr_handle()
4275 val64 = readq(&bar0->gpio_int_reg); in s2io_txpic_intr_handle()
4280 * interrupt and adapter to re-evaluate the link state. in s2io_txpic_intr_handle()
4284 writeq(val64, &bar0->gpio_int_reg); in s2io_txpic_intr_handle()
4285 val64 = readq(&bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4288 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4290 val64 = readq(&bar0->adapter_status); in s2io_txpic_intr_handle()
4292 val64 = readq(&bar0->adapter_control); in s2io_txpic_intr_handle()
4294 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4296 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4297 if (!sp->device_enabled_once) in s2io_txpic_intr_handle()
4298 sp->device_enabled_once = 1; in s2io_txpic_intr_handle()
4302 * unmask link down interrupt and mask link-up in s2io_txpic_intr_handle()
4305 val64 = readq(&bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4308 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4311 val64 = readq(&bar0->adapter_status); in s2io_txpic_intr_handle()
4314 val64 = readq(&bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4317 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4320 val64 = readq(&bar0->adapter_control); in s2io_txpic_intr_handle()
4322 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4325 val64 = readq(&bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4329 * do_s2io_chk_alarm_bit - Check for alarm and incrment the counter
4335 * 1 - if alarm bit set
4336 * 0 - if alarm bit is not set
4353 * s2io_handle_errors - Xframe error indication handler
4364 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_handle_errors()
4368 struct swStat *sw_stat = &sp->mac_control.stats_info->sw_stat; in s2io_handle_errors()
4369 struct xpakStat *stats = &sp->mac_control.stats_info->xpak_stat; in s2io_handle_errors()
4374 if (pci_channel_offline(sp->pdev)) in s2io_handle_errors()
4377 memset(&sw_stat->ring_full_cnt, 0, in s2io_handle_errors()
4378 sizeof(sw_stat->ring_full_cnt)); in s2io_handle_errors()
4381 if (stats->xpak_timer_count < 72000) { in s2io_handle_errors()
4383 stats->xpak_timer_count++; in s2io_handle_errors()
4387 stats->xpak_timer_count = 0; in s2io_handle_errors()
4392 val64 = readq(&bar0->mac_rmac_err_reg); in s2io_handle_errors()
4393 writeq(val64, &bar0->mac_rmac_err_reg); in s2io_handle_errors()
4395 schedule_work(&sp->set_link_task); in s2io_handle_errors()
4399 if (do_s2io_chk_alarm_bit(SERR_SOURCE_ANY, &bar0->serr_source, in s2io_handle_errors()
4400 &sw_stat->serious_err_cnt)) in s2io_handle_errors()
4404 if (do_s2io_chk_alarm_bit(GPIO_INT_REG_DP_ERR_INT, &bar0->gpio_int_reg, in s2io_handle_errors()
4405 &sw_stat->parity_err_cnt)) in s2io_handle_errors()
4409 if (sp->device_type == XFRAME_II_DEVICE) { in s2io_handle_errors()
4410 val64 = readq(&bar0->ring_bump_counter1); in s2io_handle_errors()
4413 temp64 >>= 64 - ((i+1)*16); in s2io_handle_errors()
4414 sw_stat->ring_full_cnt[i] += temp64; in s2io_handle_errors()
4417 val64 = readq(&bar0->ring_bump_counter2); in s2io_handle_errors()
4420 temp64 >>= 64 - ((i+1)*16); in s2io_handle_errors()
4421 sw_stat->ring_full_cnt[i+4] += temp64; in s2io_handle_errors()
4425 val64 = readq(&bar0->txdma_int_status); in s2io_handle_errors()
4431 &bar0->pfc_err_reg, in s2io_handle_errors()
4432 &sw_stat->pfc_err_cnt)) in s2io_handle_errors()
4435 &bar0->pfc_err_reg, in s2io_handle_errors()
4436 &sw_stat->pfc_err_cnt); in s2io_handle_errors()
4444 &bar0->tda_err_reg, in s2io_handle_errors()
4445 &sw_stat->tda_err_cnt)) in s2io_handle_errors()
4448 &bar0->tda_err_reg, in s2io_handle_errors()
4449 &sw_stat->tda_err_cnt); in s2io_handle_errors()
4458 &bar0->pcc_err_reg, in s2io_handle_errors()
4459 &sw_stat->pcc_err_cnt)) in s2io_handle_errors()
4462 &bar0->pcc_err_reg, in s2io_handle_errors()
4463 &sw_stat->pcc_err_cnt); in s2io_handle_errors()
4469 &bar0->tti_err_reg, in s2io_handle_errors()
4470 &sw_stat->tti_err_cnt)) in s2io_handle_errors()
4473 &bar0->tti_err_reg, in s2io_handle_errors()
4474 &sw_stat->tti_err_cnt); in s2io_handle_errors()
4481 &bar0->lso_err_reg, in s2io_handle_errors()
4482 &sw_stat->lso_err_cnt)) in s2io_handle_errors()
4485 &bar0->lso_err_reg, in s2io_handle_errors()
4486 &sw_stat->lso_err_cnt); in s2io_handle_errors()
4492 &bar0->tpa_err_reg, in s2io_handle_errors()
4493 &sw_stat->tpa_err_cnt)) in s2io_handle_errors()
4496 &bar0->tpa_err_reg, in s2io_handle_errors()
4497 &sw_stat->tpa_err_cnt); in s2io_handle_errors()
4503 &bar0->sm_err_reg, in s2io_handle_errors()
4504 &sw_stat->sm_err_cnt)) in s2io_handle_errors()
4508 val64 = readq(&bar0->mac_int_status); in s2io_handle_errors()
4511 &bar0->mac_tmac_err_reg, in s2io_handle_errors()
4512 &sw_stat->mac_tmac_err_cnt)) in s2io_handle_errors()
4517 &bar0->mac_tmac_err_reg, in s2io_handle_errors()
4518 &sw_stat->mac_tmac_err_cnt); in s2io_handle_errors()
4521 val64 = readq(&bar0->xgxs_int_status); in s2io_handle_errors()
4524 &bar0->xgxs_txgxs_err_reg, in s2io_handle_errors()
4525 &sw_stat->xgxs_txgxs_err_cnt)) in s2io_handle_errors()
4528 &bar0->xgxs_txgxs_err_reg, in s2io_handle_errors()
4529 &sw_stat->xgxs_txgxs_err_cnt); in s2io_handle_errors()
4532 val64 = readq(&bar0->rxdma_int_status); in s2io_handle_errors()
4538 &bar0->rc_err_reg, in s2io_handle_errors()
4539 &sw_stat->rc_err_cnt)) in s2io_handle_errors()
4543 RC_RDA_FAIL_WR_Rn, &bar0->rc_err_reg, in s2io_handle_errors()
4544 &sw_stat->rc_err_cnt); in s2io_handle_errors()
4548 &bar0->prc_pcix_err_reg, in s2io_handle_errors()
4549 &sw_stat->prc_pcix_err_cnt)) in s2io_handle_errors()
4554 &bar0->prc_pcix_err_reg, in s2io_handle_errors()
4555 &sw_stat->prc_pcix_err_cnt); in s2io_handle_errors()
4560 &bar0->rpa_err_reg, in s2io_handle_errors()
4561 &sw_stat->rpa_err_cnt)) in s2io_handle_errors()
4564 &bar0->rpa_err_reg, in s2io_handle_errors()
4565 &sw_stat->rpa_err_cnt); in s2io_handle_errors()
4574 &bar0->rda_err_reg, in s2io_handle_errors()
4575 &sw_stat->rda_err_cnt)) in s2io_handle_errors()
4581 &bar0->rda_err_reg, in s2io_handle_errors()
4582 &sw_stat->rda_err_cnt); in s2io_handle_errors()
4587 &bar0->rti_err_reg, in s2io_handle_errors()
4588 &sw_stat->rti_err_cnt)) in s2io_handle_errors()
4591 &bar0->rti_err_reg, in s2io_handle_errors()
4592 &sw_stat->rti_err_cnt); in s2io_handle_errors()
4595 val64 = readq(&bar0->mac_int_status); in s2io_handle_errors()
4598 &bar0->mac_rmac_err_reg, in s2io_handle_errors()
4599 &sw_stat->mac_rmac_err_cnt)) in s2io_handle_errors()
4604 &bar0->mac_rmac_err_reg, in s2io_handle_errors()
4605 &sw_stat->mac_rmac_err_cnt); in s2io_handle_errors()
4608 val64 = readq(&bar0->xgxs_int_status); in s2io_handle_errors()
4611 &bar0->xgxs_rxgxs_err_reg, in s2io_handle_errors()
4612 &sw_stat->xgxs_rxgxs_err_cnt)) in s2io_handle_errors()
4616 val64 = readq(&bar0->mc_int_status); in s2io_handle_errors()
4619 &bar0->mc_err_reg, in s2io_handle_errors()
4620 &sw_stat->mc_err_cnt)) in s2io_handle_errors()
4625 writeq(val64, &bar0->mc_err_reg); in s2io_handle_errors()
4627 sw_stat->double_ecc_errs++; in s2io_handle_errors()
4628 if (sp->device_type != XFRAME_II_DEVICE) { in s2io_handle_errors()
4638 sw_stat->single_ecc_errs++; in s2io_handle_errors()
4645 schedule_work(&sp->rst_timer_task); in s2io_handle_errors()
4646 sw_stat->soft_reset_cnt++; in s2io_handle_errors()
4650 * s2io_isr - ISR handler of the device .
4666 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_isr()
4673 if (pci_channel_offline(sp->pdev)) in s2io_isr()
4679 config = &sp->config; in s2io_isr()
4680 mac_control = &sp->mac_control; in s2io_isr()
4689 reason = readq(&bar0->general_int_status); in s2io_isr()
4696 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_isr()
4698 if (config->napi) { in s2io_isr()
4700 napi_schedule(&sp->napi); in s2io_isr()
4701 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask); in s2io_isr()
4702 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4703 readl(&bar0->rx_traffic_int); in s2io_isr()
4712 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4714 for (i = 0; i < config->rx_ring_num; i++) { in s2io_isr()
4715 struct ring_info *ring = &mac_control->rings[i]; in s2io_isr()
4727 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_isr()
4729 for (i = 0; i < config->tx_fifo_num; i++) in s2io_isr()
4730 tx_intr_handler(&mac_control->fifos[i]); in s2io_isr()
4738 if (!config->napi) { in s2io_isr()
4739 for (i = 0; i < config->rx_ring_num; i++) { in s2io_isr()
4740 struct ring_info *ring = &mac_control->rings[i]; in s2io_isr()
4745 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_isr()
4746 readl(&bar0->general_int_status); in s2io_isr()
4759 * s2io_updt_stats -
4763 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_updt_stats()
4771 writeq(val64, &bar0->stat_cfg); in s2io_updt_stats()
4774 val64 = readq(&bar0->stat_cfg); in s2io_updt_stats()
4785 * s2io_get_stats - Updates the device statistics structure.
4796 struct mac_info *mac_control = &sp->mac_control; in s2io_get_stats()
4797 struct stat_block *stats = mac_control->stats_info; in s2io_get_stats()
4803 /* A device reset will cause the on-adapter statistics to be zero'ed. in s2io_get_stats()
4810 delta = ((u64) le32_to_cpu(stats->rmac_vld_frms_oflow) << 32 | in s2io_get_stats()
4811 le32_to_cpu(stats->rmac_vld_frms)) - sp->stats.rx_packets; in s2io_get_stats()
4812 sp->stats.rx_packets += delta; in s2io_get_stats()
4813 dev->stats.rx_packets += delta; in s2io_get_stats()
4815 delta = ((u64) le32_to_cpu(stats->tmac_frms_oflow) << 32 | in s2io_get_stats()
4816 le32_to_cpu(stats->tmac_frms)) - sp->stats.tx_packets; in s2io_get_stats()
4817 sp->stats.tx_packets += delta; in s2io_get_stats()
4818 dev->stats.tx_packets += delta; in s2io_get_stats()
4820 delta = ((u64) le32_to_cpu(stats->rmac_data_octets_oflow) << 32 | in s2io_get_stats()
4821 le32_to_cpu(stats->rmac_data_octets)) - sp->stats.rx_bytes; in s2io_get_stats()
4822 sp->stats.rx_bytes += delta; in s2io_get_stats()
4823 dev->stats.rx_bytes += delta; in s2io_get_stats()
4825 delta = ((u64) le32_to_cpu(stats->tmac_data_octets_oflow) << 32 | in s2io_get_stats()
4826 le32_to_cpu(stats->tmac_data_octets)) - sp->stats.tx_bytes; in s2io_get_stats()
4827 sp->stats.tx_bytes += delta; in s2io_get_stats()
4828 dev->stats.tx_bytes += delta; in s2io_get_stats()
4830 delta = le64_to_cpu(stats->rmac_drop_frms) - sp->stats.rx_errors; in s2io_get_stats()
4831 sp->stats.rx_errors += delta; in s2io_get_stats()
4832 dev->stats.rx_errors += delta; in s2io_get_stats()
4834 delta = ((u64) le32_to_cpu(stats->tmac_any_err_frms_oflow) << 32 | in s2io_get_stats()
4835 le32_to_cpu(stats->tmac_any_err_frms)) - sp->stats.tx_errors; in s2io_get_stats()
4836 sp->stats.tx_errors += delta; in s2io_get_stats()
4837 dev->stats.tx_errors += delta; in s2io_get_stats()
4839 delta = le64_to_cpu(stats->rmac_drop_frms) - sp->stats.rx_dropped; in s2io_get_stats()
4840 sp->stats.rx_dropped += delta; in s2io_get_stats()
4841 dev->stats.rx_dropped += delta; in s2io_get_stats()
4843 delta = le64_to_cpu(stats->tmac_drop_frms) - sp->stats.tx_dropped; in s2io_get_stats()
4844 sp->stats.tx_dropped += delta; in s2io_get_stats()
4845 dev->stats.tx_dropped += delta; in s2io_get_stats()
4852 delta = (u64) le32_to_cpu(stats->rmac_vld_mcst_frms_oflow) << 32 | in s2io_get_stats()
4853 le32_to_cpu(stats->rmac_vld_mcst_frms); in s2io_get_stats()
4854 delta -= le64_to_cpu(stats->rmac_pause_ctrl_frms); in s2io_get_stats()
4855 delta -= sp->stats.multicast; in s2io_get_stats()
4856 sp->stats.multicast += delta; in s2io_get_stats()
4857 dev->stats.multicast += delta; in s2io_get_stats()
4859 delta = ((u64) le32_to_cpu(stats->rmac_usized_frms_oflow) << 32 | in s2io_get_stats()
4860 le32_to_cpu(stats->rmac_usized_frms)) + in s2io_get_stats()
4861 le64_to_cpu(stats->rmac_long_frms) - sp->stats.rx_length_errors; in s2io_get_stats()
4862 sp->stats.rx_length_errors += delta; in s2io_get_stats()
4863 dev->stats.rx_length_errors += delta; in s2io_get_stats()
4865 delta = le64_to_cpu(stats->rmac_fcs_err_frms) - sp->stats.rx_crc_errors; in s2io_get_stats()
4866 sp->stats.rx_crc_errors += delta; in s2io_get_stats()
4867 dev->stats.rx_crc_errors += delta; in s2io_get_stats()
4869 return &dev->stats; in s2io_get_stats()
4873 * s2io_set_multicast - entry point for multicast address enable/disable.
4891 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_set_multicast()
4896 struct config_param *config = &sp->config; in s2io_set_multicast()
4898 if ((dev->flags & IFF_ALLMULTI) && (!sp->m_cast_flg)) { in s2io_set_multicast()
4901 &bar0->rmac_addr_data0_mem); in s2io_set_multicast()
4903 &bar0->rmac_addr_data1_mem); in s2io_set_multicast()
4906 RMAC_ADDR_CMD_MEM_OFFSET(config->max_mc_addr - 1); in s2io_set_multicast()
4907 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4909 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, in s2io_set_multicast()
4913 sp->m_cast_flg = 1; in s2io_set_multicast()
4914 sp->all_multi_pos = config->max_mc_addr - 1; in s2io_set_multicast()
4915 } else if ((dev->flags & IFF_ALLMULTI) && (sp->m_cast_flg)) { in s2io_set_multicast()
4918 &bar0->rmac_addr_data0_mem); in s2io_set_multicast()
4920 &bar0->rmac_addr_data1_mem); in s2io_set_multicast()
4923 RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos); in s2io_set_multicast()
4924 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4926 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, in s2io_set_multicast()
4930 sp->m_cast_flg = 0; in s2io_set_multicast()
4931 sp->all_multi_pos = 0; in s2io_set_multicast()
4934 if ((dev->flags & IFF_PROMISC) && (!sp->promisc_flg)) { in s2io_set_multicast()
4936 add = &bar0->mac_cfg; in s2io_set_multicast()
4937 val64 = readq(&bar0->mac_cfg); in s2io_set_multicast()
4940 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4942 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4946 val64 = readq(&bar0->rx_pa_cfg); in s2io_set_multicast()
4948 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
4949 sp->vlan_strip_flag = 0; in s2io_set_multicast()
4952 val64 = readq(&bar0->mac_cfg); in s2io_set_multicast()
4953 sp->promisc_flg = 1; in s2io_set_multicast()
4955 dev->name); in s2io_set_multicast()
4956 } else if (!(dev->flags & IFF_PROMISC) && (sp->promisc_flg)) { in s2io_set_multicast()
4958 add = &bar0->mac_cfg; in s2io_set_multicast()
4959 val64 = readq(&bar0->mac_cfg); in s2io_set_multicast()
4962 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4964 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4968 val64 = readq(&bar0->rx_pa_cfg); in s2io_set_multicast()
4970 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
4971 sp->vlan_strip_flag = 1; in s2io_set_multicast()
4974 val64 = readq(&bar0->mac_cfg); in s2io_set_multicast()
4975 sp->promisc_flg = 0; in s2io_set_multicast()
4976 DBG_PRINT(INFO_DBG, "%s: left promiscuous mode\n", dev->name); in s2io_set_multicast()
4980 if ((!sp->m_cast_flg) && netdev_mc_count(dev)) { in s2io_set_multicast()
4982 (config->max_mc_addr - config->max_mac_addr)) { in s2io_set_multicast()
4984 "%s: No more Rx filters can be added - " in s2io_set_multicast()
4986 dev->name); in s2io_set_multicast()
4990 prev_cnt = sp->mc_addr_count; in s2io_set_multicast()
4991 sp->mc_addr_count = netdev_mc_count(dev); in s2io_set_multicast()
4996 &bar0->rmac_addr_data0_mem); in s2io_set_multicast()
4998 &bar0->rmac_addr_data1_mem); in s2io_set_multicast()
5002 (config->mc_start_offset + i); in s2io_set_multicast()
5003 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5006 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, in s2io_set_multicast()
5011 dev->name); in s2io_set_multicast()
5021 mac_addr |= ha->addr[j]; in s2io_set_multicast()
5026 &bar0->rmac_addr_data0_mem); in s2io_set_multicast()
5028 &bar0->rmac_addr_data1_mem); in s2io_set_multicast()
5032 (i + config->mc_start_offset); in s2io_set_multicast()
5033 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5036 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, in s2io_set_multicast()
5041 dev->name); in s2io_set_multicast()
5062 struct config_param *config = &sp->config; in do_s2io_store_unicast_mc()
5065 for (offset = 0; offset < config->max_mc_addr; offset++) { in do_s2io_store_unicast_mc()
5078 struct config_param *config = &sp->config; in do_s2io_restore_unicast_mc()
5080 for (offset = 0; offset < config->max_mac_addr; offset++) in do_s2io_restore_unicast_mc()
5081 do_s2io_prog_unicast(sp->dev, in do_s2io_restore_unicast_mc()
5082 sp->def_mac_addr[offset].mac_addr); in do_s2io_restore_unicast_mc()
5085 for (offset = config->mc_start_offset; in do_s2io_restore_unicast_mc()
5086 offset < config->max_mc_addr; offset++) in do_s2io_restore_unicast_mc()
5087 do_s2io_add_mc(sp, sp->def_mac_addr[offset].mac_addr); in do_s2io_restore_unicast_mc()
5095 struct config_param *config = &sp->config; in do_s2io_add_mc()
5102 for (i = config->mc_start_offset; i < config->max_mc_addr; i++) { in do_s2io_add_mc()
5111 if (i == config->max_mc_addr) { in do_s2io_add_mc()
5126 struct XENA_dev_config __iomem *bar0 = sp->bar0; in do_s2io_add_mac()
5129 &bar0->rmac_addr_data0_mem); in do_s2io_add_mac()
5133 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_add_mac()
5136 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, in do_s2io_add_mac()
5149 struct config_param *config = &sp->config; in do_s2io_delete_unicast_mc()
5152 offset < config->max_mc_addr; offset++) { in do_s2io_delete_unicast_mc()
5172 struct XENA_dev_config __iomem *bar0 = sp->bar0; in do_s2io_read_unicast_mc()
5177 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_read_unicast_mc()
5180 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, in do_s2io_read_unicast_mc()
5186 tmp64 = readq(&bar0->rmac_addr_data0_mem); in do_s2io_read_unicast_mc()
5192 * s2io_set_mac_addr - driver entry point
5199 if (!is_valid_ether_addr(addr->sa_data)) in s2io_set_mac_addr()
5200 return -EADDRNOTAVAIL; in s2io_set_mac_addr()
5202 eth_hw_addr_set(dev, addr->sa_data); in s2io_set_mac_addr()
5205 return do_s2io_prog_unicast(dev, dev->dev_addr); in s2io_set_mac_addr()
5208 * do_s2io_prog_unicast - Programs the Xframe mac address
5213 * Return value: SUCCESS on success and an appropriate (-)ve integer
5223 struct config_param *config = &sp->config; in do_s2io_prog_unicast()
5231 perm_addr = ether_addr_to_u64(sp->def_mac_addr[0].mac_addr); in do_s2io_prog_unicast()
5238 for (i = 1; i < config->max_mac_addr; i++) { in do_s2io_prog_unicast()
5250 if (i == config->max_mac_addr) { in do_s2io_prog_unicast()
5261 * s2io_ethtool_set_link_ksettings - Sets different link parameters.
5277 if ((cmd->base.autoneg == AUTONEG_ENABLE) || in s2io_ethtool_set_link_ksettings()
5278 (cmd->base.speed != SPEED_10000) || in s2io_ethtool_set_link_ksettings()
5279 (cmd->base.duplex != DUPLEX_FULL)) in s2io_ethtool_set_link_ksettings()
5280 return -EINVAL; in s2io_ethtool_set_link_ksettings()
5282 s2io_close(sp->dev); in s2io_ethtool_set_link_ksettings()
5283 s2io_open(sp->dev); in s2io_ethtool_set_link_ksettings()
5290 * s2io_ethtool_get_link_ksettings - Return link specific information.
5314 cmd->base.port = PORT_FIBRE; in s2io_ethtool_get_link_ksettings()
5316 if (netif_carrier_ok(sp->dev)) { in s2io_ethtool_get_link_ksettings()
5317 cmd->base.speed = SPEED_10000; in s2io_ethtool_get_link_ksettings()
5318 cmd->base.duplex = DUPLEX_FULL; in s2io_ethtool_get_link_ksettings()
5320 cmd->base.speed = SPEED_UNKNOWN; in s2io_ethtool_get_link_ksettings()
5321 cmd->base.duplex = DUPLEX_UNKNOWN; in s2io_ethtool_get_link_ksettings()
5324 cmd->base.autoneg = AUTONEG_DISABLE; in s2io_ethtool_get_link_ksettings()
5329 * s2io_ethtool_gdrvinfo - Returns driver specific information.
5344 strscpy(info->driver, s2io_driver_name, sizeof(info->driver)); in s2io_ethtool_gdrvinfo()
5345 strscpy(info->version, s2io_driver_version, sizeof(info->version)); in s2io_ethtool_gdrvinfo()
5346 strscpy(info->bus_info, pci_name(sp->pdev), sizeof(info->bus_info)); in s2io_ethtool_gdrvinfo()
5350 * s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
5370 regs->len = XENA_REG_SPACE; in s2io_ethtool_gregs()
5371 regs->version = sp->pdev->subsystem_device; in s2io_ethtool_gregs()
5373 for (i = 0; i < regs->len; i += 8) { in s2io_ethtool_gregs()
5374 reg = readq(sp->bar0 + i); in s2io_ethtool_gregs()
5380 * s2io_set_led - control NIC led
5384 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_set_led()
5385 u16 subid = sp->pdev->subsystem_device; in s2io_set_led()
5388 if ((sp->device_type == XFRAME_II_DEVICE) || in s2io_set_led()
5390 val64 = readq(&bar0->gpio_control); in s2io_set_led()
5396 writeq(val64, &bar0->gpio_control); in s2io_set_led()
5398 val64 = readq(&bar0->adapter_control); in s2io_set_led()
5404 writeq(val64, &bar0->adapter_control); in s2io_set_led()
5410 * s2io_ethtool_set_led - To physically identify the nic on the system.
5425 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_ethtool_set_led()
5426 u16 subid = sp->pdev->subsystem_device; in s2io_ethtool_set_led()
5428 if ((sp->device_type == XFRAME_I_DEVICE) && ((subid & 0xFF) < 0x07)) { in s2io_ethtool_set_led()
5429 u64 val64 = readq(&bar0->adapter_control); in s2io_ethtool_set_led()
5432 return -EAGAIN; in s2io_ethtool_set_led()
5438 sp->adapt_ctrl_org = readq(&bar0->gpio_control); in s2io_ethtool_set_led()
5450 if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid)) in s2io_ethtool_set_led()
5451 writeq(sp->adapt_ctrl_org, &bar0->gpio_control); in s2io_ethtool_set_led()
5466 if (sp->rxd_mode == RXD_MODE_1) { in s2io_ethtool_gringparam()
5467 ering->rx_max_pending = MAX_RX_DESC_1; in s2io_ethtool_gringparam()
5468 ering->rx_jumbo_max_pending = MAX_RX_DESC_1; in s2io_ethtool_gringparam()
5470 ering->rx_max_pending = MAX_RX_DESC_2; in s2io_ethtool_gringparam()
5471 ering->rx_jumbo_max_pending = MAX_RX_DESC_2; in s2io_ethtool_gringparam()
5474 ering->tx_max_pending = MAX_TX_DESC; in s2io_ethtool_gringparam()
5476 for (i = 0; i < sp->config.rx_ring_num; i++) in s2io_ethtool_gringparam()
5477 rx_desc_count += sp->config.rx_cfg[i].num_rxd; in s2io_ethtool_gringparam()
5478 ering->rx_pending = rx_desc_count; in s2io_ethtool_gringparam()
5479 ering->rx_jumbo_pending = rx_desc_count; in s2io_ethtool_gringparam()
5481 for (i = 0; i < sp->config.tx_fifo_num; i++) in s2io_ethtool_gringparam()
5482 tx_desc_count += sp->config.tx_cfg[i].fifo_len; in s2io_ethtool_gringparam()
5483 ering->tx_pending = tx_desc_count; in s2io_ethtool_gringparam()
5484 DBG_PRINT(INFO_DBG, "max txds: %d\n", sp->config.max_txds); in s2io_ethtool_gringparam()
5488 * s2io_ethtool_getpause_data -Pause frame generation and reception.
5501 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_ethtool_getpause_data()
5503 val64 = readq(&bar0->rmac_pause_cfg); in s2io_ethtool_getpause_data()
5505 ep->tx_pause = true; in s2io_ethtool_getpause_data()
5507 ep->rx_pause = true; in s2io_ethtool_getpause_data()
5508 ep->autoneg = false; in s2io_ethtool_getpause_data()
5512 * s2io_ethtool_setpause_data - set/reset pause frame generation.
5527 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_ethtool_setpause_data()
5529 val64 = readq(&bar0->rmac_pause_cfg); in s2io_ethtool_setpause_data()
5530 if (ep->tx_pause) in s2io_ethtool_setpause_data()
5534 if (ep->rx_pause) in s2io_ethtool_setpause_data()
5538 writeq(val64, &bar0->rmac_pause_cfg); in s2io_ethtool_setpause_data()
5544 * read_eeprom - reads 4 bytes of data from user given offset.
5556 * -1 on failure and 0 on success.
5560 int ret = -1; in read_eeprom()
5563 struct XENA_dev_config __iomem *bar0 = sp->bar0; in read_eeprom()
5565 if (sp->device_type == XFRAME_I_DEVICE) { in read_eeprom()
5571 SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF); in read_eeprom()
5574 val64 = readq(&bar0->i2c_control); in read_eeprom()
5585 if (sp->device_type == XFRAME_II_DEVICE) { in read_eeprom()
5589 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF); in read_eeprom()
5591 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF); in read_eeprom()
5593 val64 = readq(&bar0->spi_control); in read_eeprom()
5598 *data = readq(&bar0->spi_data); in read_eeprom()
5611 * write_eeprom - actually writes the relevant part of the data value.
5622 * 0 on success, -1 on failure.
5627 int exit_cnt = 0, ret = -1; in write_eeprom()
5629 struct XENA_dev_config __iomem *bar0 = sp->bar0; in write_eeprom()
5631 if (sp->device_type == XFRAME_I_DEVICE) { in write_eeprom()
5637 SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF); in write_eeprom()
5640 val64 = readq(&bar0->i2c_control); in write_eeprom()
5651 if (sp->device_type == XFRAME_II_DEVICE) { in write_eeprom()
5653 writeq(SPI_DATA_WRITE(data, (cnt << 3)), &bar0->spi_data); in write_eeprom()
5658 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF); in write_eeprom()
5660 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF); in write_eeprom()
5662 val64 = readq(&bar0->spi_control); in write_eeprom()
5682 struct swStat *swstats = &nic->mac_control.stats_info->sw_stat; in s2io_vpd_read()
5684 if (nic->device_type == XFRAME_II_DEVICE) { in s2io_vpd_read()
5685 strcpy(nic->product_name, "Xframe II 10GbE network adapter"); in s2io_vpd_read()
5688 strcpy(nic->product_name, "Xframe I 10GbE network adapter"); in s2io_vpd_read()
5691 strcpy(nic->serial_num, "NOT AVAILABLE"); in s2io_vpd_read()
5695 swstats->mem_alloc_fail_cnt++; in s2io_vpd_read()
5698 swstats->mem_allocated += 256; in s2io_vpd_read()
5701 pci_write_config_byte(nic->pdev, (vpd_addr + 2), i); in s2io_vpd_read()
5702 pci_read_config_byte(nic->pdev, (vpd_addr + 2), &data); in s2io_vpd_read()
5703 pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0); in s2io_vpd_read()
5706 pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data); in s2io_vpd_read()
5715 pci_read_config_dword(nic->pdev, (vpd_addr + 4), in s2io_vpd_read()
5725 if (len < min(VPD_STRING_LEN, 256-cnt-2)) { in s2io_vpd_read()
5726 memcpy(nic->serial_num, in s2io_vpd_read()
5729 memset(nic->serial_num+len, in s2io_vpd_read()
5731 VPD_STRING_LEN-len); in s2io_vpd_read()
5740 memcpy(nic->product_name, &vpd_data[3], len); in s2io_vpd_read()
5741 nic->product_name[len] = 0; in s2io_vpd_read()
5744 swstats->mem_freed += 256; in s2io_vpd_read()
5748 * s2io_ethtool_geeprom - reads the value stored in the Eeprom.
5767 eeprom->magic = sp->pdev->vendor | (sp->pdev->device << 16); in s2io_ethtool_geeprom()
5769 if ((eeprom->offset + eeprom->len) > (XENA_EEPROM_SPACE)) in s2io_ethtool_geeprom()
5770 eeprom->len = XENA_EEPROM_SPACE - eeprom->offset; in s2io_ethtool_geeprom()
5772 for (i = 0; i < eeprom->len; i += 4) { in s2io_ethtool_geeprom()
5773 if (read_eeprom(sp, (eeprom->offset + i), &data)) { in s2io_ethtool_geeprom()
5775 return -EFAULT; in s2io_ethtool_geeprom()
5784 * s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
5793 * 0 on success, -EFAULT on failure.
5800 int len = eeprom->len, cnt = 0; in s2io_ethtool_seeprom()
5804 if (eeprom->magic != (sp->pdev->vendor | (sp->pdev->device << 16))) { in s2io_ethtool_seeprom()
5808 (sp->pdev->vendor | (sp->pdev->device << 16)), in s2io_ethtool_seeprom()
5809 eeprom->magic); in s2io_ethtool_seeprom()
5810 return -EFAULT; in s2io_ethtool_seeprom()
5820 if (write_eeprom(sp, (eeprom->offset + cnt), valid, 0)) { in s2io_ethtool_seeprom()
5824 return -EFAULT; in s2io_ethtool_seeprom()
5827 len--; in s2io_ethtool_seeprom()
5834 * s2io_register_test - reads and writes into all clock domains.
5848 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_register_test()
5852 val64 = readq(&bar0->pif_rd_swapper_fb); in s2io_register_test()
5858 val64 = readq(&bar0->rmac_pause_cfg); in s2io_register_test()
5864 val64 = readq(&bar0->rx_queue_cfg); in s2io_register_test()
5865 if (sp->device_type == XFRAME_II_DEVICE) in s2io_register_test()
5874 val64 = readq(&bar0->xgxs_efifo_cfg); in s2io_register_test()
5881 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
5882 val64 = readq(&bar0->xmsi_data); in s2io_register_test()
5889 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
5890 val64 = readq(&bar0->xmsi_data); in s2io_register_test()
5901 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
5918 struct net_device *dev = sp->dev; in s2io_eeprom_test()
5924 if (sp->device_type == XFRAME_I_DEVICE) in s2io_eeprom_test()
5943 dev->name, (unsigned long long)0x12345, in s2io_eeprom_test()
5952 if (sp->device_type == XFRAME_I_DEVICE) in s2io_eeprom_test()
5965 dev->name, (unsigned long long)0x12345, in s2io_eeprom_test()
5973 if (sp->device_type == XFRAME_I_DEVICE) { in s2io_eeprom_test()
6002 * s2io_bist_test - invokes the MemBist test of the card .
6012 * 0 on success and -1 on failure.
6018 int cnt = 0, ret = -1; in s2io_bist_test()
6020 pci_read_config_byte(sp->pdev, PCI_BIST, &bist); in s2io_bist_test()
6022 pci_write_config_word(sp->pdev, PCI_BIST, bist); in s2io_bist_test()
6025 pci_read_config_byte(sp->pdev, PCI_BIST, &bist); in s2io_bist_test()
6039 * s2io_link_test - verifies the link state of the nic
6053 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_link_test()
6056 val64 = readq(&bar0->adapter_status); in s2io_link_test()
6066 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
6080 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_rldram_test()
6084 val64 = readq(&bar0->adapter_control); in s2io_rldram_test()
6086 writeq(val64, &bar0->adapter_control); in s2io_rldram_test()
6088 val64 = readq(&bar0->mc_rldram_test_ctrl); in s2io_rldram_test()
6090 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF); in s2io_rldram_test()
6092 val64 = readq(&bar0->mc_rldram_mrs); in s2io_rldram_test()
6094 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF); in s2io_rldram_test()
6097 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF); in s2io_rldram_test()
6103 writeq(val64, &bar0->mc_rldram_test_d0); in s2io_rldram_test()
6108 writeq(val64, &bar0->mc_rldram_test_d1); in s2io_rldram_test()
6113 writeq(val64, &bar0->mc_rldram_test_d2); in s2io_rldram_test()
6116 writeq(val64, &bar0->mc_rldram_test_add); in s2io_rldram_test()
6121 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF); in s2io_rldram_test()
6124 val64 = readq(&bar0->mc_rldram_test_ctrl); in s2io_rldram_test()
6134 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF); in s2io_rldram_test()
6137 val64 = readq(&bar0->mc_rldram_test_ctrl); in s2io_rldram_test()
6146 val64 = readq(&bar0->mc_rldram_test_ctrl); in s2io_rldram_test()
6156 SPECIAL_REG_WRITE(0, &bar0->mc_rldram_test_ctrl, LF); in s2io_rldram_test()
6162 * s2io_ethtool_test - conducts 6 tsets to determine the health of card.
6180 int orig_state = netif_running(sp->dev); in s2io_ethtool_test()
6182 if (ethtest->flags == ETH_TEST_FL_OFFLINE) { in s2io_ethtool_test()
6185 s2io_close(sp->dev); in s2io_ethtool_test()
6188 ethtest->flags |= ETH_TEST_FL_FAILED; in s2io_ethtool_test()
6193 ethtest->flags |= ETH_TEST_FL_FAILED; in s2io_ethtool_test()
6198 ethtest->flags |= ETH_TEST_FL_FAILED; in s2io_ethtool_test()
6201 ethtest->flags |= ETH_TEST_FL_FAILED; in s2io_ethtool_test()
6204 s2io_open(sp->dev); in s2io_ethtool_test()
6211 dev->name); in s2io_ethtool_test()
6212 data[0] = -1; in s2io_ethtool_test()
6213 data[1] = -1; in s2io_ethtool_test()
6214 data[2] = -1; in s2io_ethtool_test()
6215 data[3] = -1; in s2io_ethtool_test()
6216 data[4] = -1; in s2io_ethtool_test()
6220 ethtest->flags |= ETH_TEST_FL_FAILED; in s2io_ethtool_test()
6235 struct stat_block *stats = sp->mac_control.stats_info; in s2io_get_ethtool_stats()
6236 struct swStat *swstats = &stats->sw_stat; in s2io_get_ethtool_stats()
6237 struct xpakStat *xstats = &stats->xpak_stat; in s2io_get_ethtool_stats()
6241 (u64)le32_to_cpu(stats->tmac_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6242 le32_to_cpu(stats->tmac_frms); in s2io_get_ethtool_stats()
6244 (u64)le32_to_cpu(stats->tmac_data_octets_oflow) << 32 | in s2io_get_ethtool_stats()
6245 le32_to_cpu(stats->tmac_data_octets); in s2io_get_ethtool_stats()
6246 tmp_stats[i++] = le64_to_cpu(stats->tmac_drop_frms); in s2io_get_ethtool_stats()
6248 (u64)le32_to_cpu(stats->tmac_mcst_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6249 le32_to_cpu(stats->tmac_mcst_frms); in s2io_get_ethtool_stats()
6251 (u64)le32_to_cpu(stats->tmac_bcst_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6252 le32_to_cpu(stats->tmac_bcst_frms); in s2io_get_ethtool_stats()
6253 tmp_stats[i++] = le64_to_cpu(stats->tmac_pause_ctrl_frms); in s2io_get_ethtool_stats()
6255 (u64)le32_to_cpu(stats->tmac_ttl_octets_oflow) << 32 | in s2io_get_ethtool_stats()
6256 le32_to_cpu(stats->tmac_ttl_octets); in s2io_get_ethtool_stats()
6258 (u64)le32_to_cpu(stats->tmac_ucst_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6259 le32_to_cpu(stats->tmac_ucst_frms); in s2io_get_ethtool_stats()
6261 (u64)le32_to_cpu(stats->tmac_nucst_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6262 le32_to_cpu(stats->tmac_nucst_frms); in s2io_get_ethtool_stats()
6264 (u64)le32_to_cpu(stats->tmac_any_err_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6265 le32_to_cpu(stats->tmac_any_err_frms); in s2io_get_ethtool_stats()
6266 tmp_stats[i++] = le64_to_cpu(stats->tmac_ttl_less_fb_octets); in s2io_get_ethtool_stats()
6267 tmp_stats[i++] = le64_to_cpu(stats->tmac_vld_ip_octets); in s2io_get_ethtool_stats()
6269 (u64)le32_to_cpu(stats->tmac_vld_ip_oflow) << 32 | in s2io_get_ethtool_stats()
6270 le32_to_cpu(stats->tmac_vld_ip); in s2io_get_ethtool_stats()
6272 (u64)le32_to_cpu(stats->tmac_drop_ip_oflow) << 32 | in s2io_get_ethtool_stats()
6273 le32_to_cpu(stats->tmac_drop_ip); in s2io_get_ethtool_stats()
6275 (u64)le32_to_cpu(stats->tmac_icmp_oflow) << 32 | in s2io_get_ethtool_stats()
6276 le32_to_cpu(stats->tmac_icmp); in s2io_get_ethtool_stats()
6278 (u64)le32_to_cpu(stats->tmac_rst_tcp_oflow) << 32 | in s2io_get_ethtool_stats()
6279 le32_to_cpu(stats->tmac_rst_tcp); in s2io_get_ethtool_stats()
6280 tmp_stats[i++] = le64_to_cpu(stats->tmac_tcp); in s2io_get_ethtool_stats()
6281 tmp_stats[i++] = (u64)le32_to_cpu(stats->tmac_udp_oflow) << 32 | in s2io_get_ethtool_stats()
6282 le32_to_cpu(stats->tmac_udp); in s2io_get_ethtool_stats()
6284 (u64)le32_to_cpu(stats->rmac_vld_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6285 le32_to_cpu(stats->rmac_vld_frms); in s2io_get_ethtool_stats()
6287 (u64)le32_to_cpu(stats->rmac_data_octets_oflow) << 32 | in s2io_get_ethtool_stats()
6288 le32_to_cpu(stats->rmac_data_octets); in s2io_get_ethtool_stats()
6289 tmp_stats[i++] = le64_to_cpu(stats->rmac_fcs_err_frms); in s2io_get_ethtool_stats()
6290 tmp_stats[i++] = le64_to_cpu(stats->rmac_drop_frms); in s2io_get_ethtool_stats()
6292 (u64)le32_to_cpu(stats->rmac_vld_mcst_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6293 le32_to_cpu(stats->rmac_vld_mcst_frms); in s2io_get_ethtool_stats()
6295 (u64)le32_to_cpu(stats->rmac_vld_bcst_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6296 le32_to_cpu(stats->rmac_vld_bcst_frms); in s2io_get_ethtool_stats()
6297 tmp_stats[i++] = le32_to_cpu(stats->rmac_in_rng_len_err_frms); in s2io_get_ethtool_stats()
6298 tmp_stats[i++] = le32_to_cpu(stats->rmac_out_rng_len_err_frms); in s2io_get_ethtool_stats()
6299 tmp_stats[i++] = le64_to_cpu(stats->rmac_long_frms); in s2io_get_ethtool_stats()
6300 tmp_stats[i++] = le64_to_cpu(stats->rmac_pause_ctrl_frms); in s2io_get_ethtool_stats()
6301 tmp_stats[i++] = le64_to_cpu(stats->rmac_unsup_ctrl_frms); in s2io_get_ethtool_stats()
6303 (u64)le32_to_cpu(stats->rmac_ttl_octets_oflow) << 32 | in s2io_get_ethtool_stats()
6304 le32_to_cpu(stats->rmac_ttl_octets); in s2io_get_ethtool_stats()
6306 (u64)le32_to_cpu(stats->rmac_accepted_ucst_frms_oflow) << 32 in s2io_get_ethtool_stats()
6307 | le32_to_cpu(stats->rmac_accepted_ucst_frms); in s2io_get_ethtool_stats()
6309 (u64)le32_to_cpu(stats->rmac_accepted_nucst_frms_oflow) in s2io_get_ethtool_stats()
6310 << 32 | le32_to_cpu(stats->rmac_accepted_nucst_frms); in s2io_get_ethtool_stats()
6312 (u64)le32_to_cpu(stats->rmac_discarded_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6313 le32_to_cpu(stats->rmac_discarded_frms); in s2io_get_ethtool_stats()
6315 (u64)le32_to_cpu(stats->rmac_drop_events_oflow) in s2io_get_ethtool_stats()
6316 << 32 | le32_to_cpu(stats->rmac_drop_events); in s2io_get_ethtool_stats()
6317 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_less_fb_octets); in s2io_get_ethtool_stats()
6318 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_frms); in s2io_get_ethtool_stats()
6320 (u64)le32_to_cpu(stats->rmac_usized_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6321 le32_to_cpu(stats->rmac_usized_frms); in s2io_get_ethtool_stats()
6323 (u64)le32_to_cpu(stats->rmac_osized_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6324 le32_to_cpu(stats->rmac_osized_frms); in s2io_get_ethtool_stats()
6326 (u64)le32_to_cpu(stats->rmac_frag_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6327 le32_to_cpu(stats->rmac_frag_frms); in s2io_get_ethtool_stats()
6329 (u64)le32_to_cpu(stats->rmac_jabber_frms_oflow) << 32 | in s2io_get_ethtool_stats()
6330 le32_to_cpu(stats->rmac_jabber_frms); in s2io_get_ethtool_stats()
6331 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_64_frms); in s2io_get_ethtool_stats()
6332 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_65_127_frms); in s2io_get_ethtool_stats()
6333 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_128_255_frms); in s2io_get_ethtool_stats()
6334 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_256_511_frms); in s2io_get_ethtool_stats()
6335 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_512_1023_frms); in s2io_get_ethtool_stats()
6336 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_1024_1518_frms); in s2io_get_ethtool_stats()
6338 (u64)le32_to_cpu(stats->rmac_ip_oflow) << 32 | in s2io_get_ethtool_stats()
6339 le32_to_cpu(stats->rmac_ip); in s2io_get_ethtool_stats()
6340 tmp_stats[i++] = le64_to_cpu(stats->rmac_ip_octets); in s2io_get_ethtool_stats()
6341 tmp_stats[i++] = le32_to_cpu(stats->rmac_hdr_err_ip); in s2io_get_ethtool_stats()
6343 (u64)le32_to_cpu(stats->rmac_drop_ip_oflow) << 32 | in s2io_get_ethtool_stats()
6344 le32_to_cpu(stats->rmac_drop_ip); in s2io_get_ethtool_stats()
6346 (u64)le32_to_cpu(stats->rmac_icmp_oflow) << 32 | in s2io_get_ethtool_stats()
6347 le32_to_cpu(stats->rmac_icmp); in s2io_get_ethtool_stats()
6348 tmp_stats[i++] = le64_to_cpu(stats->rmac_tcp); in s2io_get_ethtool_stats()
6350 (u64)le32_to_cpu(stats->rmac_udp_oflow) << 32 | in s2io_get_ethtool_stats()
6351 le32_to_cpu(stats->rmac_udp); in s2io_get_ethtool_stats()
6353 (u64)le32_to_cpu(stats->rmac_err_drp_udp_oflow) << 32 | in s2io_get_ethtool_stats()
6354 le32_to_cpu(stats->rmac_err_drp_udp); in s2io_get_ethtool_stats()
6355 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_err_sym); in s2io_get_ethtool_stats()
6356 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q0); in s2io_get_ethtool_stats()
6357 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q1); in s2io_get_ethtool_stats()
6358 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q2); in s2io_get_ethtool_stats()
6359 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q3); in s2io_get_ethtool_stats()
6360 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q4); in s2io_get_ethtool_stats()
6361 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q5); in s2io_get_ethtool_stats()
6362 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q6); in s2io_get_ethtool_stats()
6363 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q7); in s2io_get_ethtool_stats()
6364 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q0); in s2io_get_ethtool_stats()
6365 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q1); in s2io_get_ethtool_stats()
6366 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q2); in s2io_get_ethtool_stats()
6367 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q3); in s2io_get_ethtool_stats()
6368 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q4); in s2io_get_ethtool_stats()
6369 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q5); in s2io_get_ethtool_stats()
6370 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q6); in s2io_get_ethtool_stats()
6371 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q7); in s2io_get_ethtool_stats()
6373 (u64)le32_to_cpu(stats->rmac_pause_cnt_oflow) << 32 | in s2io_get_ethtool_stats()
6374 le32_to_cpu(stats->rmac_pause_cnt); in s2io_get_ethtool_stats()
6375 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_data_err_cnt); in s2io_get_ethtool_stats()
6376 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_ctrl_err_cnt); in s2io_get_ethtool_stats()
6378 (u64)le32_to_cpu(stats->rmac_accepted_ip_oflow) << 32 | in s2io_get_ethtool_stats()
6379 le32_to_cpu(stats->rmac_accepted_ip); in s2io_get_ethtool_stats()
6380 tmp_stats[i++] = le32_to_cpu(stats->rmac_err_tcp); in s2io_get_ethtool_stats()
6381 tmp_stats[i++] = le32_to_cpu(stats->rd_req_cnt); in s2io_get_ethtool_stats()
6382 tmp_stats[i++] = le32_to_cpu(stats->new_rd_req_cnt); in s2io_get_ethtool_stats()
6383 tmp_stats[i++] = le32_to_cpu(stats->new_rd_req_rtry_cnt); in s2io_get_ethtool_stats()
6384 tmp_stats[i++] = le32_to_cpu(stats->rd_rtry_cnt); in s2io_get_ethtool_stats()
6385 tmp_stats[i++] = le32_to_cpu(stats->wr_rtry_rd_ack_cnt); in s2io_get_ethtool_stats()
6386 tmp_stats[i++] = le32_to_cpu(stats->wr_req_cnt); in s2io_get_ethtool_stats()
6387 tmp_stats[i++] = le32_to_cpu(stats->new_wr_req_cnt); in s2io_get_ethtool_stats()
6388 tmp_stats[i++] = le32_to_cpu(stats->new_wr_req_rtry_cnt); in s2io_get_ethtool_stats()
6389 tmp_stats[i++] = le32_to_cpu(stats->wr_rtry_cnt); in s2io_get_ethtool_stats()
6390 tmp_stats[i++] = le32_to_cpu(stats->wr_disc_cnt); in s2io_get_ethtool_stats()
6391 tmp_stats[i++] = le32_to_cpu(stats->rd_rtry_wr_ack_cnt); in s2io_get_ethtool_stats()
6392 tmp_stats[i++] = le32_to_cpu(stats->txp_wr_cnt); in s2io_get_ethtool_stats()
6393 tmp_stats[i++] = le32_to_cpu(stats->txd_rd_cnt); in s2io_get_ethtool_stats()
6394 tmp_stats[i++] = le32_to_cpu(stats->txd_wr_cnt); in s2io_get_ethtool_stats()
6395 tmp_stats[i++] = le32_to_cpu(stats->rxd_rd_cnt); in s2io_get_ethtool_stats()
6396 tmp_stats[i++] = le32_to_cpu(stats->rxd_wr_cnt); in s2io_get_ethtool_stats()
6397 tmp_stats[i++] = le32_to_cpu(stats->txf_rd_cnt); in s2io_get_ethtool_stats()
6398 tmp_stats[i++] = le32_to_cpu(stats->rxf_wr_cnt); in s2io_get_ethtool_stats()
6401 if (sp->device_type == XFRAME_II_DEVICE) { in s2io_get_ethtool_stats()
6403 le64_to_cpu(stats->rmac_ttl_1519_4095_frms); in s2io_get_ethtool_stats()
6405 le64_to_cpu(stats->rmac_ttl_4096_8191_frms); in s2io_get_ethtool_stats()
6407 le64_to_cpu(stats->rmac_ttl_8192_max_frms); in s2io_get_ethtool_stats()
6408 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_gt_max_frms); in s2io_get_ethtool_stats()
6409 tmp_stats[i++] = le64_to_cpu(stats->rmac_osized_alt_frms); in s2io_get_ethtool_stats()
6410 tmp_stats[i++] = le64_to_cpu(stats->rmac_jabber_alt_frms); in s2io_get_ethtool_stats()
6411 tmp_stats[i++] = le64_to_cpu(stats->rmac_gt_max_alt_frms); in s2io_get_ethtool_stats()
6412 tmp_stats[i++] = le64_to_cpu(stats->rmac_vlan_frms); in s2io_get_ethtool_stats()
6413 tmp_stats[i++] = le32_to_cpu(stats->rmac_len_discard); in s2io_get_ethtool_stats()
6414 tmp_stats[i++] = le32_to_cpu(stats->rmac_fcs_discard); in s2io_get_ethtool_stats()
6415 tmp_stats[i++] = le32_to_cpu(stats->rmac_pf_discard); in s2io_get_ethtool_stats()
6416 tmp_stats[i++] = le32_to_cpu(stats->rmac_da_discard); in s2io_get_ethtool_stats()
6417 tmp_stats[i++] = le32_to_cpu(stats->rmac_red_discard); in s2io_get_ethtool_stats()
6418 tmp_stats[i++] = le32_to_cpu(stats->rmac_rts_discard); in s2io_get_ethtool_stats()
6419 tmp_stats[i++] = le32_to_cpu(stats->rmac_ingm_full_discard); in s2io_get_ethtool_stats()
6420 tmp_stats[i++] = le32_to_cpu(stats->link_fault_cnt); in s2io_get_ethtool_stats()
6424 tmp_stats[i++] = swstats->single_ecc_errs; in s2io_get_ethtool_stats()
6425 tmp_stats[i++] = swstats->double_ecc_errs; in s2io_get_ethtool_stats()
6426 tmp_stats[i++] = swstats->parity_err_cnt; in s2io_get_ethtool_stats()
6427 tmp_stats[i++] = swstats->serious_err_cnt; in s2io_get_ethtool_stats()
6428 tmp_stats[i++] = swstats->soft_reset_cnt; in s2io_get_ethtool_stats()
6429 tmp_stats[i++] = swstats->fifo_full_cnt; in s2io_get_ethtool_stats()
6431 tmp_stats[i++] = swstats->ring_full_cnt[k]; in s2io_get_ethtool_stats()
6432 tmp_stats[i++] = xstats->alarm_transceiver_temp_high; in s2io_get_ethtool_stats()
6433 tmp_stats[i++] = xstats->alarm_transceiver_temp_low; in s2io_get_ethtool_stats()
6434 tmp_stats[i++] = xstats->alarm_laser_bias_current_high; in s2io_get_ethtool_stats()
6435 tmp_stats[i++] = xstats->alarm_laser_bias_current_low; in s2io_get_ethtool_stats()
6436 tmp_stats[i++] = xstats->alarm_laser_output_power_high; in s2io_get_ethtool_stats()
6437 tmp_stats[i++] = xstats->alarm_laser_output_power_low; in s2io_get_ethtool_stats()
6438 tmp_stats[i++] = xstats->warn_transceiver_temp_high; in s2io_get_ethtool_stats()
6439 tmp_stats[i++] = xstats->warn_transceiver_temp_low; in s2io_get_ethtool_stats()
6440 tmp_stats[i++] = xstats->warn_laser_bias_current_high; in s2io_get_ethtool_stats()
6441 tmp_stats[i++] = xstats->warn_laser_bias_current_low; in s2io_get_ethtool_stats()
6442 tmp_stats[i++] = xstats->warn_laser_output_power_high; in s2io_get_ethtool_stats()
6443 tmp_stats[i++] = xstats->warn_laser_output_power_low; in s2io_get_ethtool_stats()
6444 tmp_stats[i++] = swstats->clubbed_frms_cnt; in s2io_get_ethtool_stats()
6445 tmp_stats[i++] = swstats->sending_both; in s2io_get_ethtool_stats()
6446 tmp_stats[i++] = swstats->outof_sequence_pkts; in s2io_get_ethtool_stats()
6447 tmp_stats[i++] = swstats->flush_max_pkts; in s2io_get_ethtool_stats()
6448 if (swstats->num_aggregations) { in s2io_get_ethtool_stats()
6449 u64 tmp = swstats->sum_avg_pkts_aggregated; in s2io_get_ethtool_stats()
6452 * Since 64-bit divide does not work on all platforms, in s2io_get_ethtool_stats()
6455 while (tmp >= swstats->num_aggregations) { in s2io_get_ethtool_stats()
6456 tmp -= swstats->num_aggregations; in s2io_get_ethtool_stats()
6462 tmp_stats[i++] = swstats->mem_alloc_fail_cnt; in s2io_get_ethtool_stats()
6463 tmp_stats[i++] = swstats->pci_map_fail_cnt; in s2io_get_ethtool_stats()
6464 tmp_stats[i++] = swstats->watchdog_timer_cnt; in s2io_get_ethtool_stats()
6465 tmp_stats[i++] = swstats->mem_allocated; in s2io_get_ethtool_stats()
6466 tmp_stats[i++] = swstats->mem_freed; in s2io_get_ethtool_stats()
6467 tmp_stats[i++] = swstats->link_up_cnt; in s2io_get_ethtool_stats()
6468 tmp_stats[i++] = swstats->link_down_cnt; in s2io_get_ethtool_stats()
6469 tmp_stats[i++] = swstats->link_up_time; in s2io_get_ethtool_stats()
6470 tmp_stats[i++] = swstats->link_down_time; in s2io_get_ethtool_stats()
6472 tmp_stats[i++] = swstats->tx_buf_abort_cnt; in s2io_get_ethtool_stats()
6473 tmp_stats[i++] = swstats->tx_desc_abort_cnt; in s2io_get_ethtool_stats()
6474 tmp_stats[i++] = swstats->tx_parity_err_cnt; in s2io_get_ethtool_stats()
6475 tmp_stats[i++] = swstats->tx_link_loss_cnt; in s2io_get_ethtool_stats()
6476 tmp_stats[i++] = swstats->tx_list_proc_err_cnt; in s2io_get_ethtool_stats()
6478 tmp_stats[i++] = swstats->rx_parity_err_cnt; in s2io_get_ethtool_stats()
6479 tmp_stats[i++] = swstats->rx_abort_cnt; in s2io_get_ethtool_stats()
6480 tmp_stats[i++] = swstats->rx_parity_abort_cnt; in s2io_get_ethtool_stats()
6481 tmp_stats[i++] = swstats->rx_rda_fail_cnt; in s2io_get_ethtool_stats()
6482 tmp_stats[i++] = swstats->rx_unkn_prot_cnt; in s2io_get_ethtool_stats()
6483 tmp_stats[i++] = swstats->rx_fcs_err_cnt; in s2io_get_ethtool_stats()
6484 tmp_stats[i++] = swstats->rx_buf_size_err_cnt; in s2io_get_ethtool_stats()
6485 tmp_stats[i++] = swstats->rx_rxd_corrupt_cnt; in s2io_get_ethtool_stats()
6486 tmp_stats[i++] = swstats->rx_unkn_err_cnt; in s2io_get_ethtool_stats()
6487 tmp_stats[i++] = swstats->tda_err_cnt; in s2io_get_ethtool_stats()
6488 tmp_stats[i++] = swstats->pfc_err_cnt; in s2io_get_ethtool_stats()
6489 tmp_stats[i++] = swstats->pcc_err_cnt; in s2io_get_ethtool_stats()
6490 tmp_stats[i++] = swstats->tti_err_cnt; in s2io_get_ethtool_stats()
6491 tmp_stats[i++] = swstats->tpa_err_cnt; in s2io_get_ethtool_stats()
6492 tmp_stats[i++] = swstats->sm_err_cnt; in s2io_get_ethtool_stats()
6493 tmp_stats[i++] = swstats->lso_err_cnt; in s2io_get_ethtool_stats()
6494 tmp_stats[i++] = swstats->mac_tmac_err_cnt; in s2io_get_ethtool_stats()
6495 tmp_stats[i++] = swstats->mac_rmac_err_cnt; in s2io_get_ethtool_stats()
6496 tmp_stats[i++] = swstats->xgxs_txgxs_err_cnt; in s2io_get_ethtool_stats()
6497 tmp_stats[i++] = swstats->xgxs_rxgxs_err_cnt; in s2io_get_ethtool_stats()
6498 tmp_stats[i++] = swstats->rc_err_cnt; in s2io_get_ethtool_stats()
6499 tmp_stats[i++] = swstats->prc_pcix_err_cnt; in s2io_get_ethtool_stats()
6500 tmp_stats[i++] = swstats->rpa_err_cnt; in s2io_get_ethtool_stats()
6501 tmp_stats[i++] = swstats->rda_err_cnt; in s2io_get_ethtool_stats()
6502 tmp_stats[i++] = swstats->rti_err_cnt; in s2io_get_ethtool_stats()
6503 tmp_stats[i++] = swstats->mc_err_cnt; in s2io_get_ethtool_stats()
6525 switch (sp->device_type) { in s2io_get_sset_count()
6534 return -EOPNOTSUPP; in s2io_get_sset_count()
6551 if (sp->device_type == XFRAME_II_DEVICE) { in s2io_ethtool_get_strings()
6566 netdev_features_t changed = (features ^ dev->features) & NETIF_F_LRO; in s2io_set_features()
6573 dev->features = features; in s2io_set_features()
6607 * s2io_ioctl - Entry point for the Ioctl
6620 return -EOPNOTSUPP; in s2io_ioctl()
6624 * s2io_change_mtu - entry point to change MTU size for the device.
6630 * 0 on success and an appropriate (-)ve integer as defined in errno.h
6639 dev->mtu = new_mtu; in s2io_change_mtu()
6651 struct XENA_dev_config __iomem *bar0 = sp->bar0; in s2io_change_mtu()
6654 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in s2io_change_mtu()
6661 * s2io_set_link - Set the LInk status
6670 struct net_device *dev = nic->dev; in s2io_set_link()
6671 struct XENA_dev_config __iomem *bar0 = nic->bar0; in s2io_set_link()
6680 if (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(nic->state))) { in s2io_set_link()
6685 subid = nic->pdev->subsystem_device; in s2io_set_link()
6694 val64 = readq(&bar0->adapter_status); in s2io_set_link()
6696 if (!(readq(&bar0->adapter_control) & ADAPTER_CNTL_EN)) { in s2io_set_link()
6698 val64 = readq(&bar0->adapter_control); in s2io_set_link()
6700 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6702 nic->device_type, subid)) { in s2io_set_link()
6703 val64 = readq(&bar0->gpio_control); in s2io_set_link()
6705 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6706 val64 = readq(&bar0->gpio_control); in s2io_set_link()
6709 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6711 nic->device_enabled_once = true; in s2io_set_link()
6715 dev->name); in s2io_set_link()
6719 val64 = readq(&bar0->adapter_control); in s2io_set_link()
6721 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6724 if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type, in s2io_set_link()
6726 val64 = readq(&bar0->gpio_control); in s2io_set_link()
6728 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6729 val64 = readq(&bar0->gpio_control); in s2io_set_link()
6732 val64 = readq(&bar0->adapter_control); in s2io_set_link()
6734 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6737 clear_bit(__S2IO_STATE_LINK_TASK, &(nic->state)); in s2io_set_link()
6748 struct net_device *dev = sp->dev; in set_rxd_buffer_pointer()
6749 struct swStat *stats = &sp->mac_control.stats_info->sw_stat; in set_rxd_buffer_pointer()
6751 if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) { in set_rxd_buffer_pointer()
6761 rxdp1->Buffer0_ptr = *temp0; in set_rxd_buffer_pointer()
6767 dev->name, "1 buf mode SKBs"); in set_rxd_buffer_pointer()
6768 stats->mem_alloc_fail_cnt++; in set_rxd_buffer_pointer()
6769 return -ENOMEM ; in set_rxd_buffer_pointer()
6771 stats->mem_allocated += (*skb)->truesize; in set_rxd_buffer_pointer()
6776 rxdp1->Buffer0_ptr = *temp0 = in set_rxd_buffer_pointer()
6777 dma_map_single(&sp->pdev->dev, (*skb)->data, in set_rxd_buffer_pointer()
6778 size - NET_IP_ALIGN, in set_rxd_buffer_pointer()
6780 if (dma_mapping_error(&sp->pdev->dev, rxdp1->Buffer0_ptr)) in set_rxd_buffer_pointer()
6782 rxdp->Host_Control = (unsigned long) (*skb); in set_rxd_buffer_pointer()
6784 } else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) { in set_rxd_buffer_pointer()
6788 rxdp3->Buffer2_ptr = *temp2; in set_rxd_buffer_pointer()
6789 rxdp3->Buffer0_ptr = *temp0; in set_rxd_buffer_pointer()
6790 rxdp3->Buffer1_ptr = *temp1; in set_rxd_buffer_pointer()
6796 dev->name, in set_rxd_buffer_pointer()
6798 stats->mem_alloc_fail_cnt++; in set_rxd_buffer_pointer()
6799 return -ENOMEM; in set_rxd_buffer_pointer()
6801 stats->mem_allocated += (*skb)->truesize; in set_rxd_buffer_pointer()
6802 rxdp3->Buffer2_ptr = *temp2 = in set_rxd_buffer_pointer()
6803 dma_map_single(&sp->pdev->dev, (*skb)->data, in set_rxd_buffer_pointer()
6804 dev->mtu + 4, DMA_FROM_DEVICE); in set_rxd_buffer_pointer()
6805 if (dma_mapping_error(&sp->pdev->dev, rxdp3->Buffer2_ptr)) in set_rxd_buffer_pointer()
6807 rxdp3->Buffer0_ptr = *temp0 = in set_rxd_buffer_pointer()
6808 dma_map_single(&sp->pdev->dev, ba->ba_0, in set_rxd_buffer_pointer()
6810 if (dma_mapping_error(&sp->pdev->dev, rxdp3->Buffer0_ptr)) { in set_rxd_buffer_pointer()
6811 dma_unmap_single(&sp->pdev->dev, in set_rxd_buffer_pointer()
6812 (dma_addr_t)rxdp3->Buffer2_ptr, in set_rxd_buffer_pointer()
6813 dev->mtu + 4, in set_rxd_buffer_pointer()
6817 rxdp->Host_Control = (unsigned long) (*skb); in set_rxd_buffer_pointer()
6819 /* Buffer-1 will be dummy buffer not used */ in set_rxd_buffer_pointer()
6820 rxdp3->Buffer1_ptr = *temp1 = in set_rxd_buffer_pointer()
6821 dma_map_single(&sp->pdev->dev, ba->ba_1, in set_rxd_buffer_pointer()
6823 if (dma_mapping_error(&sp->pdev->dev, rxdp3->Buffer1_ptr)) { in set_rxd_buffer_pointer()
6824 dma_unmap_single(&sp->pdev->dev, in set_rxd_buffer_pointer()
6825 (dma_addr_t)rxdp3->Buffer0_ptr, in set_rxd_buffer_pointer()
6827 dma_unmap_single(&sp->pdev->dev, in set_rxd_buffer_pointer()
6828 (dma_addr_t)rxdp3->Buffer2_ptr, in set_rxd_buffer_pointer()
6829 dev->mtu + 4, in set_rxd_buffer_pointer()
6838 stats->pci_map_fail_cnt++; in set_rxd_buffer_pointer()
6839 stats->mem_freed += (*skb)->truesize; in set_rxd_buffer_pointer()
6841 return -ENOMEM; in set_rxd_buffer_pointer()
6847 struct net_device *dev = sp->dev; in set_rxd_buffer_size()
6848 if (sp->rxd_mode == RXD_MODE_1) { in set_rxd_buffer_size()
6849 rxdp->Control_2 = SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN); in set_rxd_buffer_size()
6850 } else if (sp->rxd_mode == RXD_MODE_3B) { in set_rxd_buffer_size()
6851 rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN); in set_rxd_buffer_size()
6852 rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1); in set_rxd_buffer_size()
6853 rxdp->Control_2 |= SET_BUFFER2_SIZE_3(dev->mtu + 4); in set_rxd_buffer_size()
6860 struct config_param *config = &sp->config; in rxd_owner_bit_reset()
6861 struct mac_info *mac_control = &sp->mac_control; in rxd_owner_bit_reset()
6862 struct net_device *dev = sp->dev; in rxd_owner_bit_reset()
6869 size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE + in rxd_owner_bit_reset()
6871 if (sp->rxd_mode == RXD_MODE_1) in rxd_owner_bit_reset()
6873 else if (sp->rxd_mode == RXD_MODE_3B) in rxd_owner_bit_reset()
6874 size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4; in rxd_owner_bit_reset()
6876 for (i = 0; i < config->rx_ring_num; i++) { in rxd_owner_bit_reset()
6877 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; in rxd_owner_bit_reset()
6878 struct ring_info *ring = &mac_control->rings[i]; in rxd_owner_bit_reset()
6880 blk_cnt = rx_cfg->num_rxd / (rxd_count[sp->rxd_mode] + 1); in rxd_owner_bit_reset()
6883 for (k = 0; k < rxd_count[sp->rxd_mode]; k++) { in rxd_owner_bit_reset()
6884 rxdp = ring->rx_blocks[j].rxds[k].virt_addr; in rxd_owner_bit_reset()
6885 if (sp->rxd_mode == RXD_MODE_3B) in rxd_owner_bit_reset()
6886 ba = &ring->ba[j][k]; in rxd_owner_bit_reset()
6891 size) == -ENOMEM) { in rxd_owner_bit_reset()
6898 rxdp->Control_1 |= RXD_OWN_XENA; in rxd_owner_bit_reset()
6909 struct net_device *dev = sp->dev; in s2io_add_isr()
6912 if (sp->config.intr_type == MSI_X) in s2io_add_isr()
6915 DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name); in s2io_add_isr()
6916 sp->config.intr_type = INTA; in s2io_add_isr()
6926 if (sp->config.intr_type == MSI_X) { in s2io_add_isr()
6929 for (i = 0; i < sp->num_entries; i++) { in s2io_add_isr()
6930 if (sp->s2io_entries[i].in_use == MSIX_FLG) { in s2io_add_isr()
6931 if (sp->s2io_entries[i].type == in s2io_add_isr()
6933 snprintf(sp->desc[i], in s2io_add_isr()
6934 sizeof(sp->desc[i]), in s2io_add_isr()
6935 "%s:MSI-X-%d-RX", in s2io_add_isr()
6936 dev->name, i); in s2io_add_isr()
6937 err = request_irq(sp->entries[i].vector, in s2io_add_isr()
6940 sp->desc[i], in s2io_add_isr()
6941 sp->s2io_entries[i].arg); in s2io_add_isr()
6942 } else if (sp->s2io_entries[i].type == in s2io_add_isr()
6944 snprintf(sp->desc[i], in s2io_add_isr()
6945 sizeof(sp->desc[i]), in s2io_add_isr()
6946 "%s:MSI-X-%d-TX", in s2io_add_isr()
6947 dev->name, i); in s2io_add_isr()
6948 err = request_irq(sp->entries[i].vector, in s2io_add_isr()
6951 sp->desc[i], in s2io_add_isr()
6952 sp->s2io_entries[i].arg); in s2io_add_isr()
6956 if (!(sp->msix_info[i].addr && in s2io_add_isr()
6957 sp->msix_info[i].data)) { in s2io_add_isr()
6960 sp->desc[i], in s2io_add_isr()
6962 sp->msix_info[i].addr, in s2io_add_isr()
6964 ntohl(sp->msix_info[i].data)); in s2io_add_isr()
6971 "%s:MSI-X-%d registration " in s2io_add_isr()
6972 "failed\n", dev->name, i); in s2io_add_isr()
6976 dev->name); in s2io_add_isr()
6977 sp->config.intr_type = INTA; in s2io_add_isr()
6980 sp->s2io_entries[i].in_use = in s2io_add_isr()
6985 pr_info("MSI-X-RX %d entries enabled\n", --msix_rx_cnt); in s2io_add_isr()
6987 "MSI-X-TX entries enabled through alarm vector\n"); in s2io_add_isr()
6990 if (sp->config.intr_type == INTA) { in s2io_add_isr()
6991 err = request_irq(sp->pdev->irq, s2io_isr, IRQF_SHARED, in s2io_add_isr()
6992 sp->name, dev); in s2io_add_isr()
6995 dev->name); in s2io_add_isr()
6996 return -1; in s2io_add_isr()
7004 if (sp->config.intr_type == MSI_X) in s2io_rem_isr()
7013 struct XENA_dev_config __iomem *bar0 = sp->bar0; in do_s2io_card_down()
7016 config = &sp->config; in do_s2io_card_down()
7021 del_timer_sync(&sp->alarm_timer); in do_s2io_card_down()
7023 while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) in do_s2io_card_down()
7025 clear_bit(__S2IO_STATE_CARD_UP, &sp->state); in do_s2io_card_down()
7028 if (sp->config.napi) { in do_s2io_card_down()
7030 if (config->intr_type == MSI_X) { in do_s2io_card_down()
7031 for (; off < sp->config.rx_ring_num; off++) in do_s2io_card_down()
7032 napi_disable(&sp->mac_control.rings[off].napi); in do_s2io_card_down()
7035 napi_disable(&sp->napi); in do_s2io_card_down()
7058 val64 = readq(&bar0->adapter_status); in do_s2io_card_down()
7060 if (verify_pcc_quiescent(sp, sp->device_enabled_once)) in do_s2io_card_down()
7067 DBG_PRINT(ERR_DBG, "Device not Quiescent - " in do_s2io_card_down()
7082 clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state)); in do_s2io_card_down()
7095 struct net_device *dev = sp->dev; in s2io_card_up()
7102 dev->name); in s2io_card_up()
7103 if (ret != -EIO) in s2io_card_up()
7112 config = &sp->config; in s2io_card_up()
7113 mac_control = &sp->mac_control; in s2io_card_up()
7115 for (i = 0; i < config->rx_ring_num; i++) { in s2io_card_up()
7116 struct ring_info *ring = &mac_control->rings[i]; in s2io_card_up()
7118 ring->mtu = dev->mtu; in s2io_card_up()
7119 ring->lro = !!(dev->features & NETIF_F_LRO); in s2io_card_up()
7123 dev->name); in s2io_card_up()
7124 ret = -ENOMEM; in s2io_card_up()
7128 ring->rx_bufs_left); in s2io_card_up()
7132 if (config->napi) { in s2io_card_up()
7133 if (config->intr_type == MSI_X) { in s2io_card_up()
7134 for (i = 0; i < sp->config.rx_ring_num; i++) in s2io_card_up()
7135 napi_enable(&sp->mac_control.rings[i].napi); in s2io_card_up()
7137 napi_enable(&sp->napi); in s2io_card_up()
7142 if (sp->promisc_flg) in s2io_card_up()
7143 sp->promisc_flg = 0; in s2io_card_up()
7144 if (sp->m_cast_flg) { in s2io_card_up()
7145 sp->m_cast_flg = 0; in s2io_card_up()
7146 sp->all_multi_pos = 0; in s2io_card_up()
7152 if (dev->features & NETIF_F_LRO) { in s2io_card_up()
7154 sp->lro_max_aggr_per_sess = ((1<<16) - 1) / dev->mtu; in s2io_card_up()
7156 if (lro_max_pkts < sp->lro_max_aggr_per_sess) in s2io_card_up()
7157 sp->lro_max_aggr_per_sess = lro_max_pkts; in s2io_card_up()
7162 DBG_PRINT(ERR_DBG, "%s: Starting NIC failed\n", dev->name); in s2io_card_up()
7163 ret = -ENODEV; in s2io_card_up()
7169 if (sp->config.intr_type == MSI_X) in s2io_card_up()
7171 ret = -ENODEV; in s2io_card_up()
7175 timer_setup(&sp->alarm_timer, s2io_alarm_handle, 0); in s2io_card_up()
7176 mod_timer(&sp->alarm_timer, jiffies + HZ / 2); in s2io_card_up()
7178 set_bit(__S2IO_STATE_CARD_UP, &sp->state); in s2io_card_up()
7182 if (sp->config.intr_type != INTA) { in s2io_card_up()
7194 if (config->napi) { in s2io_card_up()
7195 if (config->intr_type == MSI_X) { in s2io_card_up()
7196 for (i = 0; i < sp->config.rx_ring_num; i++) in s2io_card_up()
7197 napi_disable(&sp->mac_control.rings[i].napi); in s2io_card_up()
7199 napi_disable(&sp->napi); in s2io_card_up()
7209 * s2io_restart_nic - Resets the NIC.
7221 struct net_device *dev = sp->dev; in s2io_restart_nic()
7230 DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", dev->name); in s2io_restart_nic()
7233 DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n", dev->name); in s2io_restart_nic()
7239 * s2io_tx_watchdog - Watchdog for transmit side.
7244 * for a pre-defined amount of time when the Interface is still up.
7255 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat; in s2io_tx_watchdog()
7258 swstats->watchdog_timer_cnt++; in s2io_tx_watchdog()
7259 schedule_work(&sp->rst_timer_task); in s2io_tx_watchdog()
7260 swstats->soft_reset_cnt++; in s2io_tx_watchdog()
7265 * rx_osm_handler - To perform some OS related operations on SKB.
7276 * SUCCESS on success and -1 on failure.
7280 struct s2io_nic *sp = ring_data->nic; in rx_osm_handler()
7281 struct net_device *dev = ring_data->dev; in rx_osm_handler()
7283 ((unsigned long)rxdp->Host_Control); in rx_osm_handler()
7284 int ring_no = ring_data->ring_no; in rx_osm_handler()
7286 unsigned long long err = rxdp->Control_1 & RXD_T_CODE; in rx_osm_handler()
7289 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat; in rx_osm_handler()
7291 skb->dev = dev; in rx_osm_handler()
7296 swstats->parity_err_cnt++; in rx_osm_handler()
7301 swstats->rx_parity_err_cnt++; in rx_osm_handler()
7305 swstats->rx_abort_cnt++; in rx_osm_handler()
7309 swstats->rx_parity_abort_cnt++; in rx_osm_handler()
7313 swstats->rx_rda_fail_cnt++; in rx_osm_handler()
7317 swstats->rx_unkn_prot_cnt++; in rx_osm_handler()
7321 swstats->rx_fcs_err_cnt++; in rx_osm_handler()
7325 swstats->rx_buf_size_err_cnt++; in rx_osm_handler()
7329 swstats->rx_rxd_corrupt_cnt++; in rx_osm_handler()
7333 swstats->rx_unkn_err_cnt++; in rx_osm_handler()
7345 dev->name, err_mask); in rx_osm_handler()
7346 dev->stats.rx_crc_errors++; in rx_osm_handler()
7347 swstats->mem_freed in rx_osm_handler()
7348 += skb->truesize; in rx_osm_handler()
7350 ring_data->rx_bufs_left -= 1; in rx_osm_handler()
7351 rxdp->Host_Control = 0; in rx_osm_handler()
7356 rxdp->Host_Control = 0; in rx_osm_handler()
7357 if (sp->rxd_mode == RXD_MODE_1) { in rx_osm_handler()
7358 int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2); in rx_osm_handler()
7361 } else if (sp->rxd_mode == RXD_MODE_3B) { in rx_osm_handler()
7362 int get_block = ring_data->rx_curr_get_info.block_index; in rx_osm_handler()
7363 int get_off = ring_data->rx_curr_get_info.offset; in rx_osm_handler()
7364 int buf0_len = RXD_GET_BUFFER0_SIZE_3(rxdp->Control_2); in rx_osm_handler()
7365 int buf2_len = RXD_GET_BUFFER2_SIZE_3(rxdp->Control_2); in rx_osm_handler()
7367 struct buffAdd *ba = &ring_data->ba[get_block][get_off]; in rx_osm_handler()
7368 skb_put_data(skb, ba->ba_0, buf0_len); in rx_osm_handler()
7372 if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) && in rx_osm_handler()
7373 ((!ring_data->lro) || in rx_osm_handler()
7374 (!(rxdp->Control_1 & RXD_FRAME_IP_FRAG))) && in rx_osm_handler()
7375 (dev->features & NETIF_F_RXCSUM)) { in rx_osm_handler()
7376 l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1); in rx_osm_handler()
7377 l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1); in rx_osm_handler()
7384 skb->ip_summed = CHECKSUM_UNNECESSARY; in rx_osm_handler()
7385 if (ring_data->lro) { in rx_osm_handler()
7391 skb->data, &tcp, in rx_osm_handler()
7396 lro->parent = skb; in rx_osm_handler()
7403 queue_rx_frame(lro->parent, in rx_osm_handler()
7404 lro->vlan_tag); in rx_osm_handler()
7406 swstats->flush_max_pkts++; in rx_osm_handler()
7409 lro->parent->data_len = lro->frags_len; in rx_osm_handler()
7410 swstats->sending_both++; in rx_osm_handler()
7411 queue_rx_frame(lro->parent, in rx_osm_handler()
7412 lro->vlan_tag); in rx_osm_handler()
7416 case -1: /* non-TCP or not L2 aggregatable */ in rx_osm_handler()
7439 swstats->mem_freed += skb->truesize; in rx_osm_handler()
7442 queue_rx_frame(skb, RXD_GET_VLAN_TAG(rxdp->Control_2)); in rx_osm_handler()
7444 sp->mac_control.rings[ring_no].rx_bufs_left -= 1; in rx_osm_handler()
7449 * s2io_link - stops/starts the Tx queue.
7463 struct net_device *dev = sp->dev; in s2io_link()
7464 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat; in s2io_link()
7466 if (link != sp->last_link_state) { in s2io_link()
7469 DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name); in s2io_link()
7472 if (swstats->link_up_cnt) in s2io_link()
7473 swstats->link_up_time = in s2io_link()
7474 jiffies - sp->start_time; in s2io_link()
7475 swstats->link_down_cnt++; in s2io_link()
7477 DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name); in s2io_link()
7478 if (swstats->link_down_cnt) in s2io_link()
7479 swstats->link_down_time = in s2io_link()
7480 jiffies - sp->start_time; in s2io_link()
7481 swstats->link_up_cnt++; in s2io_link()
7486 sp->last_link_state = link; in s2io_link()
7487 sp->start_time = jiffies; in s2io_link()
7491 * s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
7495 * This function initializes a few of the PCI and PCI-X configuration registers
7505 /* Enable Data Parity Error Recovery in PCI-X command register. */ in s2io_init_pci()
7506 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, in s2io_init_pci()
7508 pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, in s2io_init_pci()
7510 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, in s2io_init_pci()
7514 pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd); in s2io_init_pci()
7515 pci_write_config_word(sp->pdev, PCI_COMMAND, in s2io_init_pci()
7517 pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd); in s2io_init_pci()
7571 ((pdev->device != PCI_DEVICE_ID_HERC_WIN) && in s2io_verify_parm()
7572 (pdev->device != PCI_DEVICE_ID_HERC_UNI))) { in s2io_verify_parm()
7580 DBG_PRINT(ERR_DBG, "Defaulting to 1-buffer mode\n"); in s2io_verify_parm()
7596 * rts_ds_steer - Receive traffic steering based on IPv4 or IPv6 TOS or Traffic class respectively.
7603 * '-1' on failure (endian settings incorrect).
7607 struct XENA_dev_config __iomem *bar0 = nic->bar0; in rts_ds_steer()
7614 writeq(val64, &bar0->rts_ds_mem_data); in rts_ds_steer()
7620 writeq(val64, &bar0->rts_ds_mem_ctrl); in rts_ds_steer()
7622 return wait_for_cmd_complete(&bar0->rts_ds_mem_ctrl, in rts_ds_steer()
7645 * s2io_init_nic - Initialization of the adapter .
7685 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) { in s2io_init_nic()
7689 return -ENOMEM; in s2io_init_nic()
7693 DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x\n", in s2io_init_nic()
7696 return -ENODEV; in s2io_init_nic()
7705 return -ENODEV; in s2io_init_nic()
7710 SET_NETDEV_DEV(dev, &pdev->dev); in s2io_init_nic()
7714 sp->dev = dev; in s2io_init_nic()
7715 sp->pdev = pdev; in s2io_init_nic()
7716 sp->device_enabled_once = false; in s2io_init_nic()
7718 sp->rxd_mode = RXD_MODE_1; in s2io_init_nic()
7720 sp->rxd_mode = RXD_MODE_3B; in s2io_init_nic()
7722 sp->config.intr_type = dev_intr_type; in s2io_init_nic()
7724 if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) || in s2io_init_nic()
7725 (pdev->device == PCI_DEVICE_ID_HERC_UNI)) in s2io_init_nic()
7726 sp->device_type = XFRAME_II_DEVICE; in s2io_init_nic()
7728 sp->device_type = XFRAME_I_DEVICE; in s2io_init_nic()
7731 /* Initialize some PCI/PCI-X fields of the NIC. */ in s2io_init_nic()
7741 config = &sp->config; in s2io_init_nic()
7742 mac_control = &sp->mac_control; in s2io_init_nic()
7744 config->napi = napi; in s2io_init_nic()
7745 config->tx_steering_type = tx_steering_type; in s2io_init_nic()
7748 if (config->tx_steering_type == TX_PRIORITY_STEERING) in s2io_init_nic()
7749 config->tx_fifo_num = MAX_TX_FIFOS; in s2io_init_nic()
7751 config->tx_fifo_num = tx_fifo_num; in s2io_init_nic()
7754 if (config->tx_fifo_num < 5) { in s2io_init_nic()
7755 if (config->tx_fifo_num == 1) in s2io_init_nic()
7756 sp->total_tcp_fifos = 1; in s2io_init_nic()
7758 sp->total_tcp_fifos = config->tx_fifo_num - 1; in s2io_init_nic()
7759 sp->udp_fifo_idx = config->tx_fifo_num - 1; in s2io_init_nic()
7760 sp->total_udp_fifos = 1; in s2io_init_nic()
7761 sp->other_fifo_idx = sp->total_tcp_fifos - 1; in s2io_init_nic()
7763 sp->total_tcp_fifos = (tx_fifo_num - FIFO_UDP_MAX_NUM - in s2io_init_nic()
7765 sp->udp_fifo_idx = sp->total_tcp_fifos; in s2io_init_nic()
7766 sp->total_udp_fifos = FIFO_UDP_MAX_NUM; in s2io_init_nic()
7767 sp->other_fifo_idx = sp->udp_fifo_idx + FIFO_UDP_MAX_NUM; in s2io_init_nic()
7770 config->multiq = dev_multiq; in s2io_init_nic()
7771 for (i = 0; i < config->tx_fifo_num; i++) { in s2io_init_nic()
7772 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in s2io_init_nic()
7774 tx_cfg->fifo_len = tx_fifo_len[i]; in s2io_init_nic()
7775 tx_cfg->fifo_priority = i; in s2io_init_nic()
7780 config->fifo_mapping[i] = fifo_map[config->tx_fifo_num - 1][i]; in s2io_init_nic()
7783 for (i = 0; i < config->tx_fifo_num; i++) in s2io_init_nic()
7784 sp->fifo_selector[i] = fifo_selector[i]; in s2io_init_nic()
7787 config->tx_intr_type = TXD_INT_TYPE_UTILZ; in s2io_init_nic()
7788 for (i = 0; i < config->tx_fifo_num; i++) { in s2io_init_nic()
7789 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i]; in s2io_init_nic()
7791 tx_cfg->f_no_snoop = (NO_SNOOP_TXD | NO_SNOOP_TXD_BUFFER); in s2io_init_nic()
7792 if (tx_cfg->fifo_len < 65) { in s2io_init_nic()
7793 config->tx_intr_type = TXD_INT_TYPE_PER_LIST; in s2io_init_nic()
7797 /* + 2 because one Txd for skb->data and one Txd for UFO */ in s2io_init_nic()
7798 config->max_txds = MAX_SKB_FRAGS + 2; in s2io_init_nic()
7801 config->rx_ring_num = rx_ring_num; in s2io_init_nic()
7802 for (i = 0; i < config->rx_ring_num; i++) { in s2io_init_nic()
7803 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; in s2io_init_nic()
7804 struct ring_info *ring = &mac_control->rings[i]; in s2io_init_nic()
7806 rx_cfg->num_rxd = rx_ring_sz[i] * (rxd_count[sp->rxd_mode] + 1); in s2io_init_nic()
7807 rx_cfg->ring_priority = i; in s2io_init_nic()
7808 ring->rx_bufs_left = 0; in s2io_init_nic()
7809 ring->rxd_mode = sp->rxd_mode; in s2io_init_nic()
7810 ring->rxd_count = rxd_count[sp->rxd_mode]; in s2io_init_nic()
7811 ring->pdev = sp->pdev; in s2io_init_nic()
7812 ring->dev = sp->dev; in s2io_init_nic()
7816 struct rx_ring_config *rx_cfg = &config->rx_cfg[i]; in s2io_init_nic()
7818 rx_cfg->ring_org = RING_ORG_BUFF1; in s2io_init_nic()
7819 rx_cfg->f_no_snoop = (NO_SNOOP_RXD | NO_SNOOP_RXD_BUFFER); in s2io_init_nic()
7823 mac_control->rmac_pause_time = rmac_pause_time; in s2io_init_nic()
7824 mac_control->mc_pause_threshold_q0q3 = mc_pause_threshold_q0q3; in s2io_init_nic()
7825 mac_control->mc_pause_threshold_q4q7 = mc_pause_threshold_q4q7; in s2io_init_nic()
7830 DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n", dev->name); in s2io_init_nic()
7831 ret = -ENOMEM; in s2io_init_nic()
7835 sp->bar0 = pci_ioremap_bar(pdev, 0); in s2io_init_nic()
7836 if (!sp->bar0) { in s2io_init_nic()
7838 dev->name); in s2io_init_nic()
7839 ret = -ENOMEM; in s2io_init_nic()
7843 sp->bar1 = pci_ioremap_bar(pdev, 2); in s2io_init_nic()
7844 if (!sp->bar1) { in s2io_init_nic()
7846 dev->name); in s2io_init_nic()
7847 ret = -ENOMEM; in s2io_init_nic()
7853 mac_control->tx_FIFO_start[j] = sp->bar1 + (j * 0x00020000); in s2io_init_nic()
7857 dev->netdev_ops = &s2io_netdev_ops; in s2io_init_nic()
7858 dev->ethtool_ops = &netdev_ethtool_ops; in s2io_init_nic()
7859 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | in s2io_init_nic()
7862 dev->features |= dev->hw_features | in s2io_init_nic()
7865 dev->watchdog_timeo = WATCH_DOG_TIMEOUT; in s2io_init_nic()
7866 INIT_WORK(&sp->rst_timer_task, s2io_restart_nic); in s2io_init_nic()
7867 INIT_WORK(&sp->set_link_task, s2io_set_link); in s2io_init_nic()
7869 pci_save_state(sp->pdev); in s2io_init_nic()
7874 dev->name); in s2io_init_nic()
7875 ret = -EAGAIN; in s2io_init_nic()
7880 if (sp->device_type & XFRAME_II_DEVICE) { in s2io_init_nic()
7885 ret = -EBADSLT; in s2io_init_nic()
7890 if (sp->config.intr_type == MSI_X) { in s2io_init_nic()
7891 sp->num_entries = config->rx_ring_num + 1; in s2io_init_nic()
7896 /* rollback MSI-X, will re-enable during add_isr() */ in s2io_init_nic()
7902 "MSI-X requested but failed to enable\n"); in s2io_init_nic()
7903 sp->config.intr_type = INTA; in s2io_init_nic()
7907 if (config->intr_type == MSI_X) { in s2io_init_nic()
7908 for (i = 0; i < config->rx_ring_num ; i++) { in s2io_init_nic()
7909 struct ring_info *ring = &mac_control->rings[i]; in s2io_init_nic()
7911 netif_napi_add(dev, &ring->napi, s2io_poll_msix); in s2io_init_nic()
7914 netif_napi_add(dev, &sp->napi, s2io_poll_inta); in s2io_init_nic()
7918 if (sp->device_type & XFRAME_I_DEVICE) { in s2io_init_nic()
7931 bar0 = sp->bar0; in s2io_init_nic()
7934 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_init_nic()
7935 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem, in s2io_init_nic()
7938 tmp64 = readq(&bar0->rmac_addr_data0_mem); in s2io_init_nic()
7942 sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_up); in s2io_init_nic()
7943 sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_up >> 8); in s2io_init_nic()
7944 sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_up >> 16); in s2io_init_nic()
7945 sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_up >> 24); in s2io_init_nic()
7946 sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16); in s2io_init_nic()
7947 sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24); in s2io_init_nic()
7950 dev->addr_len = ETH_ALEN; in s2io_init_nic()
7951 eth_hw_addr_set(dev, sp->def_mac_addr[0].mac_addr); in s2io_init_nic()
7954 if (sp->device_type == XFRAME_I_DEVICE) { in s2io_init_nic()
7955 config->max_mc_addr = S2IO_XENA_MAX_MC_ADDRESSES; in s2io_init_nic()
7956 config->max_mac_addr = S2IO_XENA_MAX_MAC_ADDRESSES; in s2io_init_nic()
7957 config->mc_start_offset = S2IO_XENA_MC_ADDR_START_OFFSET; in s2io_init_nic()
7958 } else if (sp->device_type == XFRAME_II_DEVICE) { in s2io_init_nic()
7959 config->max_mc_addr = S2IO_HERC_MAX_MC_ADDRESSES; in s2io_init_nic()
7960 config->max_mac_addr = S2IO_HERC_MAX_MAC_ADDRESSES; in s2io_init_nic()
7961 config->mc_start_offset = S2IO_HERC_MC_ADDR_START_OFFSET; in s2io_init_nic()
7964 /* MTU range: 46 - 9600 */ in s2io_init_nic()
7965 dev->min_mtu = MIN_MTU; in s2io_init_nic()
7966 dev->max_mtu = S2IO_JUMBO_SIZE; in s2io_init_nic()
7972 if ((sp->device_type == XFRAME_II_DEVICE) && in s2io_init_nic()
7973 (config->intr_type == MSI_X)) in s2io_init_nic()
7974 sp->num_entries = config->rx_ring_num + 1; in s2io_init_nic()
7985 sp->state = 0; in s2io_init_nic()
7988 for (i = 0; i < sp->config.tx_fifo_num; i++) { in s2io_init_nic()
7989 struct fifo_info *fifo = &mac_control->fifos[i]; in s2io_init_nic()
7991 spin_lock_init(&fifo->tx_lock); in s2io_init_nic()
7995 * SXE-002: Configure link and activity LED to init state in s2io_init_nic()
7998 subid = sp->pdev->subsystem_device; in s2io_init_nic()
8000 val64 = readq(&bar0->gpio_control); in s2io_init_nic()
8002 writeq(val64, &bar0->gpio_control); in s2io_init_nic()
8005 val64 = readq(&bar0->gpio_control); in s2io_init_nic()
8008 sp->rx_csum = 1; /* Rx chksum verify enabled by default */ in s2io_init_nic()
8012 ret = -ENODEV; in s2io_init_nic()
8016 DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2010 Exar Corp.\n"); in s2io_init_nic()
8017 DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n", dev->name, in s2io_init_nic()
8018 sp->product_name, pdev->revision); in s2io_init_nic()
8019 DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name, in s2io_init_nic()
8021 DBG_PRINT(ERR_DBG, "%s: MAC Address: %pM\n", dev->name, dev->dev_addr); in s2io_init_nic()
8022 DBG_PRINT(ERR_DBG, "Serial number: %s\n", sp->serial_num); in s2io_init_nic()
8023 if (sp->device_type & XFRAME_II_DEVICE) { in s2io_init_nic()
8026 ret = -EBADSLT; in s2io_init_nic()
8031 switch (sp->rxd_mode) { in s2io_init_nic()
8033 DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n", in s2io_init_nic()
8034 dev->name); in s2io_init_nic()
8037 DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n", in s2io_init_nic()
8038 dev->name); in s2io_init_nic()
8042 switch (sp->config.napi) { in s2io_init_nic()
8044 DBG_PRINT(ERR_DBG, "%s: NAPI disabled\n", dev->name); in s2io_init_nic()
8047 DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name); in s2io_init_nic()
8051 DBG_PRINT(ERR_DBG, "%s: Using %d Tx fifo(s)\n", dev->name, in s2io_init_nic()
8052 sp->config.tx_fifo_num); in s2io_init_nic()
8054 DBG_PRINT(ERR_DBG, "%s: Using %d Rx ring(s)\n", dev->name, in s2io_init_nic()
8055 sp->config.rx_ring_num); in s2io_init_nic()
8057 switch (sp->config.intr_type) { in s2io_init_nic()
8059 DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name); in s2io_init_nic()
8062 DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name); in s2io_init_nic()
8065 if (sp->config.multiq) { in s2io_init_nic()
8066 for (i = 0; i < sp->config.tx_fifo_num; i++) { in s2io_init_nic()
8067 struct fifo_info *fifo = &mac_control->fifos[i]; in s2io_init_nic()
8069 fifo->multiq = config->multiq; in s2io_init_nic()
8072 dev->name); in s2io_init_nic()
8075 dev->name); in s2io_init_nic()
8077 switch (sp->config.tx_steering_type) { in s2io_init_nic()
8080 dev->name); in s2io_init_nic()
8085 dev->name); in s2io_init_nic()
8090 dev->name); in s2io_init_nic()
8094 dev->name); in s2io_init_nic()
8096 snprintf(sp->name, sizeof(sp->name), "%s Neterion %s", dev->name, in s2io_init_nic()
8097 sp->product_name); in s2io_init_nic()
8100 sp->vlan_strip_flag = 1; in s2io_init_nic()
8102 sp->vlan_strip_flag = 0; in s2io_init_nic()
8115 iounmap(sp->bar1); in s2io_init_nic()
8117 iounmap(sp->bar0); in s2io_init_nic()
8129 * s2io_rem_nic - Free the PCI device
8149 cancel_work_sync(&sp->rst_timer_task); in s2io_rem_nic()
8150 cancel_work_sync(&sp->set_link_task); in s2io_rem_nic()
8155 iounmap(sp->bar0); in s2io_rem_nic()
8156 iounmap(sp->bar1); in s2io_rem_nic()
8169 u8 l2_type = (u8)((rxdp->Control_1 >> 37) & 0x7), ip_len; in check_L2_lro_capable()
8171 if (!(rxdp->Control_1 & RXD_FRAME_PROTO_TCP)) { in check_L2_lro_capable()
8173 "%s: Non-TCP frames not supported for LRO\n", in check_L2_lro_capable()
8175 return -1; in check_L2_lro_capable()
8185 if ((!sp->vlan_strip_flag) && in check_L2_lro_capable()
8186 (rxdp->Control_1 & RXD_FRAME_VLAN_TAG)) in check_L2_lro_capable()
8189 /* LLC, SNAP etc are considered non-mergeable */ in check_L2_lro_capable()
8190 return -1; in check_L2_lro_capable()
8194 ip_len = (u8)((*ip)->ihl); in check_L2_lro_capable()
8205 if ((lro->iph->saddr != ip->saddr) || in check_for_socket_match()
8206 (lro->iph->daddr != ip->daddr) || in check_for_socket_match()
8207 (lro->tcph->source != tcp->source) || in check_for_socket_match()
8208 (lro->tcph->dest != tcp->dest)) in check_for_socket_match()
8209 return -1; in check_for_socket_match()
8215 return ntohs(ip->tot_len) - (ip->ihl << 2) - (tcp->doff << 2); in get_l4_pyld_length()
8223 lro->l2h = l2h; in initiate_new_session()
8224 lro->iph = ip; in initiate_new_session()
8225 lro->tcph = tcp; in initiate_new_session()
8226 lro->tcp_next_seq = tcp_pyld_len + ntohl(tcp->seq); in initiate_new_session()
8227 lro->tcp_ack = tcp->ack_seq; in initiate_new_session()
8228 lro->sg_num = 1; in initiate_new_session()
8229 lro->total_len = ntohs(ip->tot_len); in initiate_new_session()
8230 lro->frags_len = 0; in initiate_new_session()
8231 lro->vlan_tag = vlan_tag; in initiate_new_session()
8236 if (tcp->doff == 8) { in initiate_new_session()
8239 lro->saw_ts = 1; in initiate_new_session()
8240 lro->cur_tsval = ntohl(*(ptr+1)); in initiate_new_session()
8241 lro->cur_tsecr = *(ptr+2); in initiate_new_session()
8243 lro->in_use = 1; in initiate_new_session()
8248 struct iphdr *ip = lro->iph; in update_L3L4_header()
8249 struct tcphdr *tcp = lro->tcph; in update_L3L4_header()
8250 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat; in update_L3L4_header()
8255 csum_replace2(&ip->check, ip->tot_len, htons(lro->total_len)); in update_L3L4_header()
8256 ip->tot_len = htons(lro->total_len); in update_L3L4_header()
8259 tcp->ack_seq = lro->tcp_ack; in update_L3L4_header()
8260 tcp->window = lro->window; in update_L3L4_header()
8263 if (lro->saw_ts) { in update_L3L4_header()
8265 *(ptr+2) = lro->cur_tsecr; in update_L3L4_header()
8271 swstats->sum_avg_pkts_aggregated += lro->sg_num; in update_L3L4_header()
8272 swstats->num_aggregations++; in update_L3L4_header()
8279 lro->total_len += l4_pyld; in aggregate_new_rx()
8280 lro->frags_len += l4_pyld; in aggregate_new_rx()
8281 lro->tcp_next_seq += l4_pyld; in aggregate_new_rx()
8282 lro->sg_num++; in aggregate_new_rx()
8285 lro->tcp_ack = tcp->ack_seq; in aggregate_new_rx()
8286 lro->window = tcp->window; in aggregate_new_rx()
8288 if (lro->saw_ts) { in aggregate_new_rx()
8292 lro->cur_tsval = ntohl(*(ptr+1)); in aggregate_new_rx()
8293 lro->cur_tsecr = *(ptr + 2); in aggregate_new_rx()
8306 return -1; in verify_l3_l4_lro_capable()
8309 if (ip->ihl != 5) /* IP has options */ in verify_l3_l4_lro_capable()
8310 return -1; in verify_l3_l4_lro_capable()
8314 return -1; in verify_l3_l4_lro_capable()
8317 if (tcp->urg || tcp->psh || tcp->rst || in verify_l3_l4_lro_capable()
8318 tcp->syn || tcp->fin || in verify_l3_l4_lro_capable()
8319 tcp->ece || tcp->cwr || !tcp->ack) { in verify_l3_l4_lro_capable()
8325 return -1; in verify_l3_l4_lro_capable()
8332 if (tcp->doff != 5 && tcp->doff != 8) in verify_l3_l4_lro_capable()
8333 return -1; in verify_l3_l4_lro_capable()
8335 if (tcp->doff == 8) { in verify_l3_l4_lro_capable()
8340 return -1; in verify_l3_l4_lro_capable()
8344 if (l_lro->cur_tsval > ntohl(*((__be32 *)(ptr+2)))) in verify_l3_l4_lro_capable()
8345 return -1; in verify_l3_l4_lro_capable()
8347 /* timestamp echo reply should be non-zero */ in verify_l3_l4_lro_capable()
8349 return -1; in verify_l3_l4_lro_capable()
8363 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat; in s2io_club_tcp_session()
8370 DBG_PRINT(INFO_DBG, "IP Saddr: %x Daddr: %x\n", ip->saddr, ip->daddr); in s2io_club_tcp_session()
8372 vlan_tag = RXD_GET_VLAN_TAG(rxdp->Control_2); in s2io_club_tcp_session()
8376 struct lro *l_lro = &ring_data->lro0_n[i]; in s2io_club_tcp_session()
8377 if (l_lro->in_use) { in s2io_club_tcp_session()
8383 if ((*lro)->tcp_next_seq != ntohl(tcph->seq)) { in s2io_club_tcp_session()
8387 (*lro)->tcp_next_seq, in s2io_club_tcp_session()
8388 ntohl(tcph->seq)); in s2io_club_tcp_session()
8390 swstats->outof_sequence_pkts++; in s2io_club_tcp_session()
8414 struct lro *l_lro = &ring_data->lro0_n[i]; in s2io_club_tcp_session()
8415 if (!(l_lro->in_use)) { in s2io_club_tcp_session()
8440 if ((*lro)->sg_num == sp->lro_max_aggr_per_sess) { in s2io_club_tcp_session()
8462 struct net_device *dev = skb->dev; in queue_rx_frame()
8465 skb->protocol = eth_type_trans(skb, dev); in queue_rx_frame()
8466 if (vlan_tag && sp->vlan_strip_flag) in queue_rx_frame()
8468 if (sp->config.napi) in queue_rx_frame()
8477 struct sk_buff *first = lro->parent; in lro_append_pkt()
8478 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat; in lro_append_pkt()
8480 first->len += tcp_len; in lro_append_pkt()
8481 first->data_len = lro->frags_len; in lro_append_pkt()
8482 skb_pull(skb, (skb->len - tcp_len)); in lro_append_pkt()
8483 if (skb_shinfo(first)->frag_list) in lro_append_pkt()
8484 lro->last_frag->next = skb; in lro_append_pkt()
8486 skb_shinfo(first)->frag_list = skb; in lro_append_pkt()
8487 first->truesize += skb->truesize; in lro_append_pkt()
8488 lro->last_frag = skb; in lro_append_pkt()
8489 swstats->clubbed_frms_cnt++; in lro_append_pkt()
8493 * s2io_io_error_detected - called when PCI error is detected
8521 * s2io_io_slot_reset - called after the pci bus has been reset.
8524 * Restart the card from scratch, as if from a cold-boot.
8535 pr_err("Cannot re-enable PCI device after reset.\n"); in s2io_io_slot_reset()
8546 * s2io_io_resume - called when traffic can start flowing again.
8563 if (do_s2io_prog_unicast(netdev, netdev->dev_addr) == FAILURE) { in s2io_io_resume()