Lines Matching full:sparx5
2 /* Microchip Sparx5 Switch driver
6 * The Sparx5 Chip Register Model can be browsed at this location:
217 static int sparx5_create_targets(struct sparx5 *sparx5) in sparx5_create_targets() argument
234 iores[idx] = platform_get_resource(sparx5->pdev, IORESOURCE_MEM, in sparx5_create_targets()
237 dev_err(sparx5->dev, "Invalid resource\n"); in sparx5_create_targets()
240 iomem[idx] = devm_ioremap(sparx5->dev, in sparx5_create_targets()
244 dev_err(sparx5->dev, "Unable to get switch registers: %s\n", in sparx5_create_targets()
253 sparx5->regs[iomap->id] = begin[iomap->range] + iomap->offset; in sparx5_create_targets()
258 static int sparx5_create_port(struct sparx5 *sparx5, in sparx5_create_port() argument
266 ndev = sparx5_create_netdev(sparx5, config->portno); in sparx5_create_port()
268 dev_err(sparx5->dev, "Could not create net device: %02u\n", in sparx5_create_port()
287 sparx5->ports[config->portno] = spx5_port; in sparx5_create_port()
289 err = sparx5_port_init(sparx5, spx5_port, &config->conf); in sparx5_create_port()
291 dev_err(sparx5->dev, "port init failed\n"); in sparx5_create_port()
297 sparx5_vlan_port_setup(sparx5, spx5_port->portno); in sparx5_create_port()
342 static int sparx5_init_ram(struct sparx5 *s5) in sparx5_init_ram()
386 static int sparx5_init_switchcore(struct sparx5 *sparx5) in sparx5_init_switchcore() argument
393 sparx5, in sparx5_init_switchcore()
398 sparx5, in sparx5_init_switchcore()
402 value = spx5_rd(sparx5, HSCH_RESET_CFG); in sparx5_init_switchcore()
404 err = sparx5_init_ram(sparx5); in sparx5_init_switchcore()
410 spx5_wr(ANA_AC_STAT_RESET_RESET_SET(1), sparx5, ANA_AC_STAT_RESET); in sparx5_init_switchcore()
411 spx5_wr(ASM_STAT_CFG_STAT_CNT_CLR_SHOT_SET(1), sparx5, ASM_STAT_CFG); in sparx5_init_switchcore()
414 spx5_wr(HSCH_RESET_CFG_CORE_ENA_SET(1), sparx5, HSCH_RESET_CFG); in sparx5_init_switchcore()
419 static int sparx5_init_coreclock(struct sparx5 *sparx5) in sparx5_init_coreclock() argument
421 enum sparx5_core_clockfreq freq = sparx5->coreclock; in sparx5_init_coreclock()
428 switch (sparx5->target_ct) { in sparx5_init_coreclock()
430 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
432 else if (sparx5->coreclock != SPX5_CORE_CLOCK_250MHZ) in sparx5_init_coreclock()
438 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
440 else if (sparx5->coreclock != SPX5_CORE_CLOCK_500MHZ) in sparx5_init_coreclock()
445 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
447 else if (sparx5->coreclock != SPX5_CORE_CLOCK_625MHZ) in sparx5_init_coreclock()
451 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
457 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
459 else if (sparx5->coreclock == SPX5_CORE_CLOCK_250MHZ) in sparx5_init_coreclock()
463 dev_err(sparx5->dev, "Target (%#04x) not supported\n", in sparx5_init_coreclock()
464 sparx5->target_ct); in sparx5_init_coreclock()
482 dev_err(sparx5->dev, "%d coreclock not supported on (%#04x)\n", in sparx5_init_coreclock()
483 sparx5->coreclock, sparx5->target_ct); in sparx5_init_coreclock()
488 sparx5->coreclock = freq; in sparx5_init_coreclock()
503 sparx5, in sparx5_init_coreclock()
510 sparx5, in sparx5_init_coreclock()
515 sparx5, in sparx5_init_coreclock()
520 sparx5, in sparx5_init_coreclock()
525 sparx5, in sparx5_init_coreclock()
531 sparx5, in sparx5_init_coreclock()
537 sparx5, in sparx5_init_coreclock()
542 sparx5, in sparx5_init_coreclock()
548 static int sparx5_qlim_set(struct sparx5 *sparx5) in sparx5_qlim_set() argument
554 spx5_wr(0xFFF, sparx5, in sparx5_qlim_set()
558 spx5_wr(0xFFF, sparx5, in sparx5_qlim_set()
563 spx5_wr(QLIM_WM(80), sparx5, XQS_QLIMIT_SHR_QLIM_CFG(0)); in sparx5_qlim_set()
564 spx5_wr(QLIM_WM(90), sparx5, XQS_QLIMIT_SHR_CTOP_CFG(0)); in sparx5_qlim_set()
565 spx5_wr(QLIM_WM(95), sparx5, XQS_QLIMIT_SHR_ATOP_CFG(0)); in sparx5_qlim_set()
566 spx5_wr(QLIM_WM(100), sparx5, XQS_QLIMIT_SHR_TOP_CFG(0)); in sparx5_qlim_set()
574 static void sparx5_board_init(struct sparx5 *sparx5) in sparx5_board_init() argument
578 if (!sparx5->sd_sgpio_remapping) in sparx5_board_init()
584 sparx5, in sparx5_board_init()
589 if (sparx5->ports[idx]) in sparx5_board_init()
590 if (sparx5->ports[idx]->conf.sd_sgpio != ~0) in sparx5_board_init()
591 spx5_wr(sparx5->ports[idx]->conf.sd_sgpio, in sparx5_board_init()
592 sparx5, in sparx5_board_init()
596 static int sparx5_start(struct sparx5 *sparx5) in sparx5_start() argument
605 spx5_wr(idx, sparx5, ANA_AC_OWN_UPSID(idx)); in sparx5_start()
606 spx5_wr(idx, sparx5, ANA_CL_OWN_UPSID(idx)); in sparx5_start()
607 spx5_wr(idx, sparx5, ANA_L2_OWN_UPSID(idx)); in sparx5_start()
608 spx5_wr(idx, sparx5, REW_OWN_UPSID(idx)); in sparx5_start()
615 sparx5, in sparx5_start()
619 sparx5_update_fwd(sparx5); in sparx5_start()
623 sparx5, ANA_AC_PGID_MISC_CFG(PGID_CPU)); in sparx5_start()
625 sparx5, ANA_AC_PGID_MISC_CFG(PGID_BCAST)); in sparx5_start()
631 sparx5, ANA_CL_FILTER_CTRL(idx)); in sparx5_start()
634 sparx5_mact_init(sparx5); in sparx5_start()
637 sparx5_pgid_init(sparx5); in sparx5_start()
640 sparx5_vlan_init(sparx5); in sparx5_start()
643 sparx5_mact_learn(sparx5, PGID_CPU, broadcast, NULL_VID); in sparx5_start()
646 sparx5_qlim_set(sparx5); in sparx5_start()
648 err = sparx5_config_auto_calendar(sparx5); in sparx5_start()
652 err = sparx5_config_dsm_calendar(sparx5); in sparx5_start()
657 err = sparx_stats_init(sparx5); in sparx5_start()
662 mutex_init(&sparx5->mact_lock); in sparx5_start()
663 INIT_LIST_HEAD(&sparx5->mact_entries); in sparx5_start()
665 dev_name(sparx5->dev)); in sparx5_start()
666 sparx5->mact_queue = create_singlethread_workqueue(queue_name); in sparx5_start()
667 if (!sparx5->mact_queue) in sparx5_start()
670 INIT_DELAYED_WORK(&sparx5->mact_work, sparx5_mact_pull_work); in sparx5_start()
671 queue_delayed_work(sparx5->mact_queue, &sparx5->mact_work, in sparx5_start()
674 mutex_init(&sparx5->mdb_lock); in sparx5_start()
675 INIT_LIST_HEAD(&sparx5->mdb_entries); in sparx5_start()
677 err = sparx5_register_netdevs(sparx5); in sparx5_start()
681 sparx5_board_init(sparx5); in sparx5_start()
682 err = sparx5_register_notifier_blocks(sparx5); in sparx5_start()
686 err = sparx5_vcap_init(sparx5); in sparx5_start()
688 sparx5_unregister_notifier_blocks(sparx5); in sparx5_start()
694 if (sparx5->fdma_irq >= 0) { in sparx5_start()
695 if (GCB_CHIP_ID_REV_ID_GET(sparx5->chip_id) > 0) in sparx5_start()
696 err = devm_request_irq(sparx5->dev, in sparx5_start()
697 sparx5->fdma_irq, in sparx5_start()
700 "sparx5-fdma", sparx5); in sparx5_start()
702 err = sparx5_fdma_start(sparx5); in sparx5_start()
704 sparx5->fdma_irq = -ENXIO; in sparx5_start()
706 sparx5->fdma_irq = -ENXIO; in sparx5_start()
708 if (err && sparx5->xtr_irq >= 0) { in sparx5_start()
709 err = devm_request_irq(sparx5->dev, sparx5->xtr_irq, in sparx5_start()
711 "sparx5-xtr", sparx5); in sparx5_start()
713 err = sparx5_manual_injection_mode(sparx5); in sparx5_start()
715 sparx5->xtr_irq = -ENXIO; in sparx5_start()
717 sparx5->xtr_irq = -ENXIO; in sparx5_start()
720 if (sparx5->ptp_irq >= 0) { in sparx5_start()
721 err = devm_request_threaded_irq(sparx5->dev, sparx5->ptp_irq, in sparx5_start()
723 IRQF_ONESHOT, "sparx5-ptp", in sparx5_start()
724 sparx5); in sparx5_start()
726 sparx5->ptp_irq = -ENXIO; in sparx5_start()
728 sparx5->ptp = 1; in sparx5_start()
734 static void sparx5_cleanup_ports(struct sparx5 *sparx5) in sparx5_cleanup_ports() argument
736 sparx5_unregister_netdevs(sparx5); in sparx5_cleanup_ports()
737 sparx5_destroy_netdevs(sparx5); in sparx5_cleanup_ports()
746 struct sparx5 *sparx5; in mchp_sparx5_probe() local
752 sparx5 = devm_kzalloc(&pdev->dev, sizeof(*sparx5), GFP_KERNEL); in mchp_sparx5_probe()
753 if (!sparx5) in mchp_sparx5_probe()
756 platform_set_drvdata(pdev, sparx5); in mchp_sparx5_probe()
757 sparx5->pdev = pdev; in mchp_sparx5_probe()
758 sparx5->dev = &pdev->dev; in mchp_sparx5_probe()
759 spin_lock_init(&sparx5->tx_lock); in mchp_sparx5_probe()
769 sparx5->coreclock = SPX5_CORE_CLOCK_DEFAULT; in mchp_sparx5_probe()
771 sparx5->debugfs_root = debugfs_create_dir("sparx5", NULL); in mchp_sparx5_probe()
775 dev_err(sparx5->dev, "no ethernet-ports child node found\n"); in mchp_sparx5_probe()
778 sparx5->port_count = of_get_child_count(ports); in mchp_sparx5_probe()
780 configs = kcalloc(sparx5->port_count, in mchp_sparx5_probe()
794 dev_err(sparx5->dev, "port reg property error\n"); in mchp_sparx5_probe()
803 dev_err(sparx5->dev, "port %u: missing phy-mode\n", in mchp_sparx5_probe()
810 dev_err(sparx5->dev, "port %u: missing bandwidth\n", in mchp_sparx5_probe()
818 sparx5->sd_sgpio_remapping = true; in mchp_sparx5_probe()
819 serdes = devm_of_phy_get(sparx5->dev, portnp, NULL); in mchp_sparx5_probe()
821 err = dev_err_probe(sparx5->dev, PTR_ERR(serdes), in mchp_sparx5_probe()
838 err = sparx5_create_targets(sparx5); in mchp_sparx5_probe()
842 if (of_get_mac_address(np, sparx5->base_mac)) { in mchp_sparx5_probe()
843 dev_info(sparx5->dev, "MAC addr was not set, use random MAC\n"); in mchp_sparx5_probe()
844 eth_random_addr(sparx5->base_mac); in mchp_sparx5_probe()
845 sparx5->base_mac[5] = 0; in mchp_sparx5_probe()
848 sparx5->fdma_irq = platform_get_irq_byname(sparx5->pdev, "fdma"); in mchp_sparx5_probe()
849 sparx5->xtr_irq = platform_get_irq_byname(sparx5->pdev, "xtr"); in mchp_sparx5_probe()
850 sparx5->ptp_irq = platform_get_irq_byname(sparx5->pdev, "ptp"); in mchp_sparx5_probe()
853 sparx5->chip_id = spx5_rd(sparx5, GCB_CHIP_ID); in mchp_sparx5_probe()
855 sparx5->target_ct = (enum spx5_target_chiptype) in mchp_sparx5_probe()
856 GCB_CHIP_ID_PART_ID_GET(sparx5->chip_id); in mchp_sparx5_probe()
859 err = sparx5_init_switchcore(sparx5); in mchp_sparx5_probe()
861 dev_err(sparx5->dev, "Switchcore initialization error\n"); in mchp_sparx5_probe()
866 err = sparx5_init_coreclock(sparx5); in mchp_sparx5_probe()
868 dev_err(sparx5->dev, "LC-PLL initialization error\n"); in mchp_sparx5_probe()
872 for (idx = 0; idx < sparx5->port_count; ++idx) { in mchp_sparx5_probe()
877 err = sparx5_create_port(sparx5, config); in mchp_sparx5_probe()
879 dev_err(sparx5->dev, "port create error\n"); in mchp_sparx5_probe()
884 err = sparx5_start(sparx5); in mchp_sparx5_probe()
886 dev_err(sparx5->dev, "Start failed\n"); in mchp_sparx5_probe()
890 err = sparx5_qos_init(sparx5); in mchp_sparx5_probe()
892 dev_err(sparx5->dev, "Failed to initialize QoS\n"); in mchp_sparx5_probe()
896 err = sparx5_ptp_init(sparx5); in mchp_sparx5_probe()
898 dev_err(sparx5->dev, "PTP failed\n"); in mchp_sparx5_probe()
904 sparx5_cleanup_ports(sparx5); in mchp_sparx5_probe()
905 if (sparx5->mact_queue) in mchp_sparx5_probe()
906 destroy_workqueue(sparx5->mact_queue); in mchp_sparx5_probe()
916 struct sparx5 *sparx5 = platform_get_drvdata(pdev); in mchp_sparx5_remove() local
918 debugfs_remove_recursive(sparx5->debugfs_root); in mchp_sparx5_remove()
919 if (sparx5->xtr_irq) { in mchp_sparx5_remove()
920 disable_irq(sparx5->xtr_irq); in mchp_sparx5_remove()
921 sparx5->xtr_irq = -ENXIO; in mchp_sparx5_remove()
923 if (sparx5->fdma_irq) { in mchp_sparx5_remove()
924 disable_irq(sparx5->fdma_irq); in mchp_sparx5_remove()
925 sparx5->fdma_irq = -ENXIO; in mchp_sparx5_remove()
927 sparx5_ptp_deinit(sparx5); in mchp_sparx5_remove()
928 sparx5_fdma_stop(sparx5); in mchp_sparx5_remove()
929 sparx5_cleanup_ports(sparx5); in mchp_sparx5_remove()
930 sparx5_vcap_destroy(sparx5); in mchp_sparx5_remove()
932 sparx5_unregister_notifier_blocks(sparx5); in mchp_sparx5_remove()
933 destroy_workqueue(sparx5->mact_queue); in mchp_sparx5_remove()
939 { .compatible = "microchip,sparx5-switch" },
948 .name = "sparx5-switch",
955 MODULE_DESCRIPTION("Microchip Sparx5 switch driver");