Lines Matching refs:channel
151 #define FCT_RX_CTL_EN_(channel) BIT(28 + (channel)) argument
152 #define FCT_RX_CTL_DIS_(channel) BIT(24 + (channel)) argument
153 #define FCT_RX_CTL_RESET_(channel) BIT(20 + (channel)) argument
156 #define FCT_TX_CTL_EN_(channel) BIT(28 + (channel)) argument
157 #define FCT_TX_CTL_DIS_(channel) BIT(24 + (channel)) argument
158 #define FCT_TX_CTL_RESET_(channel) BIT(20 + (channel)) argument
403 #define INT_BIT_DMA_RX_(channel) BIT(24 + (channel)) argument
405 #define INT_BIT_DMA_TX_(channel) BIT(16 + (channel)) argument
426 #define INT_VEC_MAP0_RX_VEC_(channel, vector) \ argument
427 (((u32)(vector)) << ((channel) << 2))
430 #define INT_VEC_MAP1_TX_VEC_(channel, vector) \ argument
431 (((u32)(vector)) << ((channel) << 2))
462 #define PTP_GENERAL_CONFIG_CLOCK_EVENT_X_MASK_(channel) \ argument
463 (0x7 << (1 + ((channel) << 2)))
471 #define PTP_GENERAL_CONFIG_CLOCK_EVENT_X_SET_(channel, value) \ argument
472 (((value) & 0x7) << (1 + ((channel) << 2)))
473 #define PTP_GENERAL_CONFIG_RELOAD_ADD_X_(channel) (BIT((channel) << 2)) argument
476 #define HS_PTP_GENERAL_CONFIG_CLOCK_EVENT_X_MASK_(channel) \ argument
477 (0xf << (4 + ((channel) << 2)))
494 #define HS_PTP_GENERAL_CONFIG_CLOCK_EVENT_X_SET_(channel, value) \ argument
495 (((value) & 0xf) << (4 + ((channel) << 2)))
496 #define HS_PTP_GENERAL_CONFIG_EVENT_POL_X_(channel) (BIT(1 + ((channel) * 2))) argument
497 #define HS_PTP_GENERAL_CONFIG_RELOAD_ADD_X_(channel) (BIT((channel) * 2)) argument
502 #define PTP_INT_IO_FE_SET_(channel) BIT(24 + (channel)) argument
505 #define PTP_INT_IO_RE_SET_(channel) BIT(16 + (channel)) argument
514 #define PTP_INT_EN_FE_EN_SET_(channel) BIT(24 + (channel)) argument
515 #define PTP_INT_EN_RE_EN_SET_(channel) BIT(16 + (channel)) argument
516 #define PTP_INT_EN_TIMER_SET_(channel) BIT(channel) argument
518 #define PTP_INT_EN_FE_EN_CLR_(channel) BIT(24 + (channel)) argument
519 #define PTP_INT_EN_RE_EN_CLR_(channel) BIT(16 + (channel)) argument
533 #define PTP_CLOCK_TARGET_SEC_X(channel) (0x0A30 + ((channel) << 4)) argument
534 #define PTP_CLOCK_TARGET_NS_X(channel) (0x0A34 + ((channel) << 4)) argument
535 #define PTP_CLOCK_TARGET_RELOAD_SEC_X(channel) (0x0A38 + ((channel) << 4)) argument
536 #define PTP_CLOCK_TARGET_RELOAD_NS_X(channel) (0x0A3C + ((channel) << 4)) argument
582 #define PTP_IO_CAP_CONFIG_LOCK_FE_(channel) BIT(24 + (channel)) argument
583 #define PTP_IO_CAP_CONFIG_LOCK_RE_(channel) BIT(16 + (channel)) argument
584 #define PTP_IO_CAP_CONFIG_FE_CAP_EN_(channel) BIT(8 + (channel)) argument
585 #define PTP_IO_CAP_CONFIG_RE_CAP_EN_(channel) BIT(0 + (channel)) argument
591 #define PTP_IO_EVENT_OUTPUT_CFG_SEL_(channel) BIT(16 + (channel)) argument
592 #define PTP_IO_EVENT_OUTPUT_CFG_EN_(channel) BIT(0 + (channel)) argument
594 #define PTP_IO_PIN_CFG_OBUF_TYPE_(channel) BIT(0 + (channel)) argument
660 #define DMAC_CMD_TX_SWR_(channel) BIT(24 + (channel)) argument
661 #define DMAC_CMD_START_T_(channel) BIT(20 + (channel)) argument
662 #define DMAC_CMD_STOP_T_(channel) BIT(16 + (channel)) argument
663 #define DMAC_CMD_RX_SWR_(channel) BIT(8 + (channel)) argument
664 #define DMAC_CMD_START_R_(channel) BIT(4 + (channel)) argument
665 #define DMAC_CMD_STOP_R_(channel) BIT(0 + (channel)) argument
670 #define DMAC_INT_BIT_RXFRM_(channel) BIT(16 + (channel)) argument
671 #define DMAC_INT_BIT_TX_IOC_(channel) BIT(0 + (channel)) argument
673 #define RX_CFG_A(channel) (0xC40 + ((channel) << 6)) argument
686 #define RX_CFG_B(channel) (0xC44 + ((channel) << 6)) argument
694 #define RX_BASE_ADDRH(channel) (0xC48 + ((channel) << 6)) argument
696 #define RX_BASE_ADDRL(channel) (0xC4C + ((channel) << 6)) argument
698 #define RX_HEAD_WRITEBACK_ADDRH(channel) (0xC50 + ((channel) << 6)) argument
700 #define RX_HEAD_WRITEBACK_ADDRL(channel) (0xC54 + ((channel) << 6)) argument
702 #define RX_HEAD(channel) (0xC58 + ((channel) << 6)) argument
704 #define RX_TAIL(channel) (0xC5C + ((channel) << 6)) argument
708 #define RX_CFG_C(channel) (0xC64 + ((channel) << 6)) argument
714 #define TX_CFG_A(channel) (0xD40 + ((channel) << 6)) argument
728 #define TX_CFG_B(channel) (0xD44 + ((channel) << 6)) argument
732 #define TX_BASE_ADDRH(channel) (0xD48 + ((channel) << 6)) argument
734 #define TX_BASE_ADDRL(channel) (0xD4C + ((channel) << 6)) argument
736 #define TX_HEAD_WRITEBACK_ADDRH(channel) (0xD50 + ((channel) << 6)) argument
738 #define TX_HEAD_WRITEBACK_ADDRL(channel) (0xD54 + ((channel) << 6)) argument
740 #define TX_HEAD(channel) (0xD58 + ((channel) << 6)) argument
742 #define TX_TAIL(channel) (0xD5C + ((channel) << 6)) argument
747 #define TX_CFG_C(channel) (0xD64 + ((channel) << 6)) argument
1080 #define LAN743X_COMPONENT_FLAG_RX(channel) BIT(20 + (channel)) argument