885 	struct mlx5dr_match_misc *misc_mask = &value->misc;  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()  local
901 		if (misc_mask->inner_second_cvlan_tag ||  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
902 		    misc_mask->inner_second_svlan_tag) {  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
904 			misc_mask->inner_second_cvlan_tag = 0;  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
905 			misc_mask->inner_second_svlan_tag = 0;  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
909 			       second_vlan_id, misc_mask, inner_second_vid);  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
911 			       second_cfi, misc_mask, inner_second_cfi);  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
913 			       second_priority, misc_mask, inner_second_prio);  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
915 		if (misc_mask->outer_second_cvlan_tag ||  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
916 		    misc_mask->outer_second_svlan_tag) {  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
918 			misc_mask->outer_second_cvlan_tag = 0;  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
919 			misc_mask->outer_second_svlan_tag = 0;  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
923 			       second_vlan_id, misc_mask, outer_second_vid);  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
925 			       second_cfi, misc_mask, outer_second_cfi);  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
927 			       second_priority, misc_mask, outer_second_prio);  in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
1637 	struct mlx5dr_match_misc *misc_mask = &value->misc;  in dr_ste_v0_build_src_gvmi_qpn_bit_mask()  local
1639 	DR_STE_SET_ONES(src_gvmi_qp, bit_mask, source_gvmi, misc_mask, source_port);  in dr_ste_v0_build_src_gvmi_qpn_bit_mask()
1640 	DR_STE_SET_ONES(src_gvmi_qp, bit_mask, source_qp, misc_mask, source_sqn);  in dr_ste_v0_build_src_gvmi_qpn_bit_mask()
1641 	misc_mask->source_eswitch_owner_vhca_id = 0;  in dr_ste_v0_build_src_gvmi_qpn_bit_mask()