Lines Matching refs:caps
299 dev->caps.reserved_uars = in mlx4_set_num_reserved_uars()
311 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) { in mlx4_check_port_params()
312 for (i = 0; i < dev->caps.num_ports - 1; i++) { in mlx4_check_port_params()
320 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_check_port_params()
321 if (!(port_type[i] & dev->caps.supported_type[i+1])) { in mlx4_check_port_params()
334 for (i = 1; i <= dev->caps.num_ports; ++i) in mlx4_set_port_mask()
335 dev->caps.port_mask[i] = dev->caps.port_type[i]; in mlx4_set_port_mask()
347 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) { in mlx4_query_func()
363 struct mlx4_caps *dev_cap = &dev->caps; in mlx4_enable_cqe_eqe_stride()
399 dev->caps.vl_cap[port] = port_cap->max_vl; in _mlx4_dev_port()
400 dev->caps.ib_mtu_cap[port] = port_cap->ib_mtu; in _mlx4_dev_port()
406 dev->caps.gid_table_len[port] = port_cap->max_gids; in _mlx4_dev_port()
407 dev->caps.pkey_table_len[port] = port_cap->max_pkeys; in _mlx4_dev_port()
408 dev->caps.port_width_cap[port] = port_cap->max_port_width; in _mlx4_dev_port()
409 dev->caps.eth_mtu_cap[port] = port_cap->eth_mtu; in _mlx4_dev_port()
410 dev->caps.max_tc_eth = port_cap->max_tc_eth; in _mlx4_dev_port()
411 dev->caps.def_mac[port] = port_cap->def_mac; in _mlx4_dev_port()
412 dev->caps.supported_type[port] = port_cap->supported_port_types; in _mlx4_dev_port()
413 dev->caps.suggested_type[port] = port_cap->suggested_type; in _mlx4_dev_port()
414 dev->caps.default_sense[port] = port_cap->default_sense; in _mlx4_dev_port()
415 dev->caps.trans_type[port] = port_cap->trans_type; in _mlx4_dev_port()
416 dev->caps.vendor_oui[port] = port_cap->vendor_oui; in _mlx4_dev_port()
417 dev->caps.wavelength[port] = port_cap->wavelength; in _mlx4_dev_port()
418 dev->caps.trans_code[port] = port_cap->trans_code; in _mlx4_dev_port()
438 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)) in mlx4_enable_ignore_fcs()
443 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; in mlx4_enable_ignore_fcs()
447 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)) { in mlx4_enable_ignore_fcs()
450 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; in mlx4_enable_ignore_fcs()
487 dev->caps.num_ports = dev_cap->num_ports; in mlx4_dev_cap()
488 dev->caps.num_sys_eqs = dev_cap->num_sys_eqs; in mlx4_dev_cap()
490 dev->caps.num_sys_eqs : in mlx4_dev_cap()
492 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_dev_cap()
500 dev->caps.map_clock_to_user = dev_cap->map_clock_to_user; in mlx4_dev_cap()
501 dev->caps.uar_page_size = PAGE_SIZE; in mlx4_dev_cap()
502 dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; in mlx4_dev_cap()
503 dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay; in mlx4_dev_cap()
504 dev->caps.bf_reg_size = dev_cap->bf_reg_size; in mlx4_dev_cap()
505 dev->caps.bf_regs_per_page = dev_cap->bf_regs_per_page; in mlx4_dev_cap()
506 dev->caps.max_sq_sg = dev_cap->max_sq_sg; in mlx4_dev_cap()
507 dev->caps.max_rq_sg = dev_cap->max_rq_sg; in mlx4_dev_cap()
508 dev->caps.max_wqes = dev_cap->max_qp_sz; in mlx4_dev_cap()
509 dev->caps.max_qp_init_rdma = dev_cap->max_requester_per_qp; in mlx4_dev_cap()
510 dev->caps.max_srq_wqes = dev_cap->max_srq_sz; in mlx4_dev_cap()
511 dev->caps.max_srq_sge = dev_cap->max_rq_sg - 1; in mlx4_dev_cap()
512 dev->caps.reserved_srqs = dev_cap->reserved_srqs; in mlx4_dev_cap()
513 dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz; in mlx4_dev_cap()
514 dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; in mlx4_dev_cap()
519 dev->caps.max_cqes = dev_cap->max_cq_sz - 1; in mlx4_dev_cap()
520 dev->caps.reserved_cqs = dev_cap->reserved_cqs; in mlx4_dev_cap()
521 dev->caps.reserved_eqs = dev_cap->reserved_eqs; in mlx4_dev_cap()
522 dev->caps.reserved_mtts = dev_cap->reserved_mtts; in mlx4_dev_cap()
523 dev->caps.reserved_mrws = dev_cap->reserved_mrws; in mlx4_dev_cap()
525 dev->caps.reserved_pds = dev_cap->reserved_pds; in mlx4_dev_cap()
526 dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? in mlx4_dev_cap()
528 dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? in mlx4_dev_cap()
530 dev->caps.mtt_entry_sz = dev_cap->mtt_entry_sz; in mlx4_dev_cap()
532 dev->caps.max_msg_sz = dev_cap->max_msg_sz; in mlx4_dev_cap()
533 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); in mlx4_dev_cap()
534 dev->caps.flags = dev_cap->flags; in mlx4_dev_cap()
535 dev->caps.flags2 = dev_cap->flags2; in mlx4_dev_cap()
536 dev->caps.bmme_flags = dev_cap->bmme_flags; in mlx4_dev_cap()
537 dev->caps.reserved_lkey = dev_cap->reserved_lkey; in mlx4_dev_cap()
538 dev->caps.stat_rate_support = dev_cap->stat_rate_support; in mlx4_dev_cap()
539 dev->caps.max_gso_sz = dev_cap->max_gso_sz; in mlx4_dev_cap()
540 dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz; in mlx4_dev_cap()
541 dev->caps.wol_port[1] = dev_cap->wol_port[1]; in mlx4_dev_cap()
542 dev->caps.wol_port[2] = dev_cap->wol_port[2]; in mlx4_dev_cap()
543 dev->caps.health_buffer_addrs = dev_cap->health_buffer_addrs; in mlx4_dev_cap()
558 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN) { in mlx4_dev_cap()
570 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_PHV_EN; in mlx4_dev_cap()
575 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; in mlx4_dev_cap()
578 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; in mlx4_dev_cap()
581 dev->caps.log_num_macs = MLX4_MIN_LOG_NUM_MAC; in mlx4_dev_cap()
582 dev->caps.log_num_vlans = MLX4_MIN_LOG_NUM_VLANS; in mlx4_dev_cap()
584 dev->caps.log_num_macs = log_num_mac; in mlx4_dev_cap()
585 dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; in mlx4_dev_cap()
588 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_dev_cap()
589 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE; in mlx4_dev_cap()
590 if (dev->caps.supported_type[i]) { in mlx4_dev_cap()
592 if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH) in mlx4_dev_cap()
593 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; in mlx4_dev_cap()
595 else if (dev->caps.supported_type[i] == in mlx4_dev_cap()
597 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB; in mlx4_dev_cap()
603 dev->caps.port_type[i] = dev->caps.suggested_type[i] ? in mlx4_dev_cap()
606 dev->caps.port_type[i] = port_type_array[i - 1]; in mlx4_dev_cap()
616 ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) && in mlx4_dev_cap()
617 (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && in mlx4_dev_cap()
618 (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)); in mlx4_dev_cap()
625 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) { in mlx4_dev_cap()
627 dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO; in mlx4_dev_cap()
630 dev->caps.port_type[i] = sensed_port; in mlx4_dev_cap()
632 dev->caps.possible_type[i] = dev->caps.port_type[i]; in mlx4_dev_cap()
635 if (dev->caps.log_num_macs > dev_cap->port_cap[i].log_max_macs) { in mlx4_dev_cap()
636 dev->caps.log_num_macs = dev_cap->port_cap[i].log_max_macs; in mlx4_dev_cap()
638 i, 1 << dev->caps.log_num_macs); in mlx4_dev_cap()
640 if (dev->caps.log_num_vlans > dev_cap->port_cap[i].log_max_vlans) { in mlx4_dev_cap()
641 dev->caps.log_num_vlans = dev_cap->port_cap[i].log_max_vlans; in mlx4_dev_cap()
643 i, 1 << dev->caps.log_num_vlans); in mlx4_dev_cap()
647 if (mlx4_is_master(dev) && (dev->caps.num_ports == 2) && in mlx4_dev_cap()
652 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_QOS_VPP; in mlx4_dev_cap()
655 dev->caps.max_counters = dev_cap->max_counters; in mlx4_dev_cap()
657 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps; in mlx4_dev_cap()
658 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] = in mlx4_dev_cap()
659 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] = in mlx4_dev_cap()
660 (1 << dev->caps.log_num_macs) * in mlx4_dev_cap()
661 (1 << dev->caps.log_num_vlans) * in mlx4_dev_cap()
662 dev->caps.num_ports; in mlx4_dev_cap()
663 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; in mlx4_dev_cap()
666 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) in mlx4_dev_cap()
667 dev->caps.dmfs_high_rate_qpn_base = dev_cap->dmfs_high_rate_qpn_base; in mlx4_dev_cap()
669 dev->caps.dmfs_high_rate_qpn_base = in mlx4_dev_cap()
670 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_dev_cap()
673 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) { in mlx4_dev_cap()
674 dev->caps.dmfs_high_rate_qpn_range = dev_cap->dmfs_high_rate_qpn_range; in mlx4_dev_cap()
675 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DEFAULT; in mlx4_dev_cap()
676 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_FS_A0; in mlx4_dev_cap()
678 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_NOT_SUPPORTED; in mlx4_dev_cap()
679 dev->caps.dmfs_high_rate_qpn_base = in mlx4_dev_cap()
680 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_dev_cap()
681 dev->caps.dmfs_high_rate_qpn_range = MLX4_A0_STEERING_TABLE_SIZE; in mlx4_dev_cap()
684 dev->caps.rl_caps = dev_cap->rl_caps; in mlx4_dev_cap()
686 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_RSS_RAW_ETH] = in mlx4_dev_cap()
687 dev->caps.dmfs_high_rate_qpn_range; in mlx4_dev_cap()
689 dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + in mlx4_dev_cap()
690 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + in mlx4_dev_cap()
691 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + in mlx4_dev_cap()
692 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; in mlx4_dev_cap()
694 dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0; in mlx4_dev_cap()
700 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE; in mlx4_dev_cap()
701 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE; in mlx4_dev_cap()
713 if ((dev->caps.flags & in mlx4_dev_cap()
716 dev->caps.function_caps |= MLX4_FUNC_CAP_64B_EQE_CQE; in mlx4_dev_cap()
720 dev->caps.alloc_res_qp_mask = in mlx4_dev_cap()
721 (dev->caps.bf_reg_size ? MLX4_RESERVE_ETH_BF_QP : 0) | in mlx4_dev_cap()
724 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) && in mlx4_dev_cap()
725 dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) { in mlx4_dev_cap()
728 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_ETS_CFG; in mlx4_dev_cap()
732 dev->caps.alloc_res_qp_mask = 0; in mlx4_dev_cap()
845 dev->caps.steering_mode = hca_param->steering_mode; in slave_adjust_steering_mode()
846 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) { in slave_adjust_steering_mode()
847 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; in slave_adjust_steering_mode()
848 dev->caps.fs_log_max_ucast_qp_range_size = in slave_adjust_steering_mode()
851 dev->caps.num_qp_per_mgm = in slave_adjust_steering_mode()
855 mlx4_steering_mode_str(dev->caps.steering_mode)); in slave_adjust_steering_mode()
860 kfree(dev->caps.spec_qps); in mlx4_slave_destroy_special_qp_cap()
861 dev->caps.spec_qps = NULL; in mlx4_slave_destroy_special_qp_cap()
867 struct mlx4_caps *caps = &dev->caps; in mlx4_slave_special_qp_cap() local
871 caps->spec_qps = kcalloc(caps->num_ports, sizeof(*caps->spec_qps), GFP_KERNEL); in mlx4_slave_special_qp_cap()
873 if (!func_cap || !caps->spec_qps) { in mlx4_slave_special_qp_cap()
879 for (i = 1; i <= caps->num_ports; ++i) { in mlx4_slave_special_qp_cap()
886 caps->spec_qps[i - 1] = func_cap->spec_qps; in mlx4_slave_special_qp_cap()
887 caps->port_mask[i] = caps->port_type[i]; in mlx4_slave_special_qp_cap()
888 caps->phys_port_id[i] = func_cap->phys_port_id; in mlx4_slave_special_qp_cap()
890 &caps->gid_table_len[i], in mlx4_slave_special_qp_cap()
891 &caps->pkey_table_len[i]); in mlx4_slave_special_qp_cap()
938 dev->caps.hca_core_clock = hca_param->hca_core_clock; in mlx4_slave_cap()
940 dev->caps.max_qp_dest_rdma = 1 << hca_param->log_rd_per_qp; in mlx4_slave_cap()
951 page_size = ~dev->caps.page_size_cap + 1; in mlx4_slave_cap()
978 dev->caps.uar_page_size = PAGE_SIZE; in mlx4_slave_cap()
996 dev->caps.num_ports = func_cap->num_ports; in mlx4_slave_cap()
1002 dev->caps.num_qps = 1 << hca_param->log_num_qps; in mlx4_slave_cap()
1003 dev->caps.num_srqs = 1 << hca_param->log_num_srqs; in mlx4_slave_cap()
1004 dev->caps.num_cqs = 1 << hca_param->log_num_cqs; in mlx4_slave_cap()
1005 dev->caps.num_mpts = 1 << hca_param->log_mpt_sz; in mlx4_slave_cap()
1006 dev->caps.num_eqs = func_cap->max_eq; in mlx4_slave_cap()
1007 dev->caps.reserved_eqs = func_cap->reserved_eq; in mlx4_slave_cap()
1008 dev->caps.reserved_lkey = func_cap->reserved_lkey; in mlx4_slave_cap()
1009 dev->caps.num_pds = MLX4_NUM_PDS; in mlx4_slave_cap()
1010 dev->caps.num_mgms = 0; in mlx4_slave_cap()
1011 dev->caps.num_amgms = 0; in mlx4_slave_cap()
1013 if (dev->caps.num_ports > MLX4_MAX_PORTS) { in mlx4_slave_cap()
1015 dev->caps.num_ports, MLX4_MAX_PORTS); in mlx4_slave_cap()
1028 if (dev->caps.uar_page_size * (dev->caps.num_uars - in mlx4_slave_cap()
1029 dev->caps.reserved_uars) > in mlx4_slave_cap()
1033 dev->caps.uar_page_size * dev->caps.num_uars, in mlx4_slave_cap()
1041 dev->caps.eqe_size = 64; in mlx4_slave_cap()
1042 dev->caps.eqe_factor = 1; in mlx4_slave_cap()
1044 dev->caps.eqe_size = 32; in mlx4_slave_cap()
1045 dev->caps.eqe_factor = 0; in mlx4_slave_cap()
1049 dev->caps.cqe_size = 64; in mlx4_slave_cap()
1050 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; in mlx4_slave_cap()
1052 dev->caps.cqe_size = 32; in mlx4_slave_cap()
1056 dev->caps.eqe_size = hca_param->eqe_size; in mlx4_slave_cap()
1057 dev->caps.eqe_factor = 0; in mlx4_slave_cap()
1061 dev->caps.cqe_size = hca_param->cqe_size; in mlx4_slave_cap()
1063 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; in mlx4_slave_cap()
1066 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_slave_cap()
1069 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_USER_MAC_EN; in mlx4_slave_cap()
1077 dev->caps.bf_reg_size) in mlx4_slave_cap()
1078 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_ETH_BF_QP; in mlx4_slave_cap()
1081 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_A0_QP; in mlx4_slave_cap()
1104 for (port = 0; port < dev->caps.num_ports; port++) { in mlx4_change_port_types()
1107 if (port_types[port] != dev->caps.port_type[port + 1]) in mlx4_change_port_types()
1112 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_change_port_types()
1114 dev->caps.port_type[port] = port_types[port - 1]; in mlx4_change_port_types()
1144 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ? in show_port_type()
1146 if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO) in show_port_type()
1164 if ((port_type & mdev->caps.supported_type[info->port]) != port_type) { in __set_port_type()
1176 mdev->caps.possible_type[info->port] = info->tmp_type; in __set_port_type()
1178 for (i = 0; i < mdev->caps.num_ports; i++) { in __set_port_type()
1180 mdev->caps.possible_type[i+1]; in __set_port_type()
1182 types[i] = mdev->caps.port_type[i+1]; in __set_port_type()
1185 if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && in __set_port_type()
1186 !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) { in __set_port_type()
1187 for (i = 1; i <= mdev->caps.num_ports; i++) { in __set_port_type()
1188 if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) { in __set_port_type()
1189 mdev->caps.possible_type[i] = mdev->caps.port_type[i]; in __set_port_type()
1208 for (i = 0; i < mdev->caps.num_ports; i++) in __set_port_type()
1293 if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) in show_port_ib_mtu()
1297 ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port])); in show_port_ib_mtu()
1311 if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) { in set_port_ib_mtu()
1325 mdev->caps.port_ib_mtu[info->port] = ibta_mtu; in set_port_ib_mtu()
1330 for (port = 1; port <= mdev->caps.num_ports; port++) { in set_port_ib_mtu()
1378 if (dev->caps.steering_mode != MLX4_STEERING_MODE_DEVICE_MANAGED) { in mlx4_mf_bond()
1483 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP)) in mlx4_port_map_set()
1619 cmpt_entry_sz, dev->caps.num_qps, in mlx4_init_cmpt_table()
1620 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_cmpt_table()
1629 cmpt_entry_sz, dev->caps.num_srqs, in mlx4_init_cmpt_table()
1630 dev->caps.reserved_srqs, 0, 0); in mlx4_init_cmpt_table()
1638 cmpt_entry_sz, dev->caps.num_cqs, in mlx4_init_cmpt_table()
1639 dev->caps.reserved_cqs, 0, 0); in mlx4_init_cmpt_table()
1721 dev->caps.reserved_mtts = in mlx4_init_icm()
1722 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz, in mlx4_init_icm()
1723 dma_get_cache_alignment()) / dev->caps.mtt_entry_sz; in mlx4_init_icm()
1727 dev->caps.mtt_entry_sz, in mlx4_init_icm()
1728 dev->caps.num_mtts, in mlx4_init_icm()
1729 dev->caps.reserved_mtts, 1, 0); in mlx4_init_icm()
1738 dev->caps.num_mpts, in mlx4_init_icm()
1739 dev->caps.reserved_mrws, 1, 1); in mlx4_init_icm()
1748 dev->caps.num_qps, in mlx4_init_icm()
1749 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1759 dev->caps.num_qps, in mlx4_init_icm()
1760 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1770 dev->caps.num_qps, in mlx4_init_icm()
1771 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1781 dev->caps.num_qps, in mlx4_init_icm()
1782 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1792 dev->caps.num_cqs, in mlx4_init_icm()
1793 dev->caps.reserved_cqs, 0, 0); in mlx4_init_icm()
1802 dev->caps.num_srqs, in mlx4_init_icm()
1803 dev->caps.reserved_srqs, 0, 0); in mlx4_init_icm()
1819 dev->caps.num_mgms + dev->caps.num_amgms, in mlx4_init_icm()
1820 dev->caps.num_mgms + dev->caps.num_amgms, in mlx4_init_icm()
1912 if (!dev->caps.bf_reg_size) in map_bf_area()
1916 (dev->caps.num_uars << PAGE_SHIFT); in map_bf_area()
1918 (dev->caps.num_uars << PAGE_SHIFT); in map_bf_area()
1977 if (!dev->caps.map_clock_to_user) { in mlx4_get_internal_clock_params()
2070 dev->caps.vf_caps |= MLX4_VF_CAP_FLAG_RESET; in mlx4_reset_vf_support()
2147 for (i = 1; i <= dev->caps.num_ports; i++) { in mlx4_parav_master_pf_caps()
2148 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) in mlx4_parav_master_pf_caps()
2149 dev->caps.gid_table_len[i] = in mlx4_parav_master_pf_caps()
2152 dev->caps.gid_table_len[i] = 1; in mlx4_parav_master_pf_caps()
2153 dev->caps.pkey_table_len[i] = in mlx4_parav_master_pf_caps()
2201 if (dev->caps.dmfs_high_steer_mode == in choose_steering_mode()
2205 dev->caps.dmfs_high_steer_mode = in choose_steering_mode()
2219 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED; in choose_steering_mode()
2220 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; in choose_steering_mode()
2221 dev->caps.fs_log_max_ucast_qp_range_size = in choose_steering_mode()
2224 if (dev->caps.dmfs_high_steer_mode != in choose_steering_mode()
2226 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DISABLE; in choose_steering_mode()
2227 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER && in choose_steering_mode()
2228 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) in choose_steering_mode()
2229 dev->caps.steering_mode = MLX4_STEERING_MODE_B0; in choose_steering_mode()
2231 dev->caps.steering_mode = MLX4_STEERING_MODE_A0; in choose_steering_mode()
2233 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER || in choose_steering_mode()
2234 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) in choose_steering_mode()
2241 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev); in choose_steering_mode()
2244 mlx4_steering_mode_str(dev->caps.steering_mode), in choose_steering_mode()
2252 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED && in choose_tunnel_offload_mode()
2254 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_VXLAN; in choose_tunnel_offload_mode()
2256 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_NONE; in choose_tunnel_offload_mode()
2258 mlx4_dbg(dev, "Tunneling offload mode is: %s\n", (dev->caps.tunnel_offload_mode in choose_tunnel_offload_mode()
2267 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_NOT_SUPPORTED) in mlx4_validate_optimized_steering()
2270 for (i = 1; i <= dev->caps.num_ports; i++) { in mlx4_validate_optimized_steering()
2274 } else if ((dev->caps.dmfs_high_steer_mode != in mlx4_validate_optimized_steering()
2277 !!(dev->caps.dmfs_high_steer_mode == in mlx4_validate_optimized_steering()
2282 dev->caps.dmfs_high_steer_mode), in mlx4_validate_optimized_steering()
2351 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC && in mlx4_init_hca()
2353 dev->caps.function_caps |= MLX4_FUNC_CAP_DMFS_A0_STATIC; in mlx4_init_hca()
2368 if (dev->caps.steering_mode == in mlx4_init_hca()
2380 init_hca->log_uar_sz = ilog2(dev->caps.num_uars) + in mlx4_init_hca()
2384 init_hca->log_uar_sz = ilog2(dev->caps.num_uars); in mlx4_init_hca()
2389 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || in mlx4_init_hca()
2390 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) in mlx4_init_hca()
2409 dev->caps.num_eqs = dev_cap->max_eqs; in mlx4_init_hca()
2410 dev->caps.reserved_eqs = dev_cap->reserved_eqs; in mlx4_init_hca()
2411 dev->caps.reserved_uars = dev_cap->reserved_uars; in mlx4_init_hca()
2419 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) { in mlx4_init_hca()
2423 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2425 dev->caps.hca_core_clock = in mlx4_init_hca()
2432 if (!dev->caps.hca_core_clock) { in mlx4_init_hca()
2433 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2441 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2446 if (dev->caps.dmfs_high_steer_mode != in mlx4_init_hca()
2451 if (dev->caps.dmfs_high_steer_mode == in mlx4_init_hca()
2453 dev->caps.dmfs_high_rate_qpn_base = in mlx4_init_hca()
2454 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_init_hca()
2455 dev->caps.dmfs_high_rate_qpn_range = in mlx4_init_hca()
2461 dev->caps.dmfs_high_steer_mode)); in mlx4_init_hca()
2496 dev->caps.rx_checksum_flags_port[1] = params.rx_csum_flags_port_1; in mlx4_init_hca()
2497 dev->caps.rx_checksum_flags_port[2] = params.rx_csum_flags_port_2; in mlx4_init_hca()
2534 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in mlx4_init_counters_table()
2537 if (!dev->caps.max_counters) in mlx4_init_counters_table()
2540 nent_pow2 = roundup_pow_of_two(dev->caps.max_counters); in mlx4_init_counters_table()
2544 nent_pow2 - dev->caps.max_counters + 1); in mlx4_init_counters_table()
2549 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in mlx4_cleanup_counters_table()
2552 if (!dev->caps.max_counters) in mlx4_cleanup_counters_table()
2563 for (port = 0; port < dev->caps.num_ports; port++) in mlx4_cleanup_default_counters()
2574 for (port = 0; port < dev->caps.num_ports; port++) in mlx4_allocate_default_counters()
2577 for (port = 0; port < dev->caps.num_ports; port++) { in mlx4_allocate_default_counters()
2609 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in __mlx4_counter_alloc()
2662 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in __mlx4_counter_free()
2847 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_setup_hca()
2854 dev->caps.ib_port_def_cap[port] = ib_port_default_caps; in mlx4_setup_hca()
2868 dev->caps.port_ib_mtu[port] = IB_MTU_2048; in mlx4_setup_hca()
2870 dev->caps.port_ib_mtu[port] = IB_MTU_4096; in mlx4_setup_hca()
2873 dev->caps.pkey_table_len[port] : -1); in mlx4_setup_hca()
2938 if (eqn > dev->caps.num_comp_vectors) in mlx4_init_affinity_hint()
2968 int nreq = min3(dev->caps.num_ports * in mlx4_enable_msi_x()
2970 dev->caps.num_eqs - dev->caps.reserved_eqs, in mlx4_enable_msi_x()
2991 dev->caps.num_comp_vectors = nreq - 1; in mlx4_enable_msi_x()
2995 dev->caps.num_ports); in mlx4_enable_msi_x()
2997 for (i = 0; i < dev->caps.num_comp_vectors + 1; i++) { in mlx4_enable_msi_x()
3004 if (MLX4_IS_LEGACY_EQ_MODE(dev->caps)) { in mlx4_enable_msi_x()
3006 dev->caps.num_ports); in mlx4_enable_msi_x()
3026 if ((dev->caps.num_comp_vectors > dev->caps.num_ports) && in mlx4_enable_msi_x()
3028 (dev->caps.num_comp_vectors / dev->caps.num_ports)) == in mlx4_enable_msi_x()
3043 dev->caps.num_comp_vectors = 1; in mlx4_enable_msi_x()
3050 dev->caps.num_ports); in mlx4_enable_msi_x()
3100 dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) in mlx4_init_port_info()
3103 dev->caps.port_type[port] == MLX4_PORT_TYPE_IB) in mlx4_init_port_info()
3181 int num_entries = dev->caps.num_ports; in mlx4_init_steering()
3202 int num_entries = dev->caps.num_ports; in mlx4_clear_steering()
3617 if (dev->caps.num_ports < 2 && in mlx4_load_one()
3622 dev->caps.num_ports); in mlx4_load_one()
3635 dev->caps.num_ports; in mlx4_load_one()
3676 dev->caps.num_comp_vectors = 1; in mlx4_load_one()
3696 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_load_one()
4109 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_unload_one()
4110 dev->persist->curr_port_type[i] = dev->caps.port_type[i + 1]; in mlx4_unload_one()
4111 dev->persist->curr_port_poss_type[i] = dev->caps. in mlx4_unload_one()
4120 for (p = 1; p <= dev->caps.num_ports; p++) { in mlx4_unload_one()
4236 for (i = 0; i < dev->caps.num_ports; i++) in restore_current_port_types()
4237 dev->caps.possible_type[i + 1] = poss_types[i]; in restore_current_port_types()