ethernet/mediatek/mtk_eth_soc.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
4  *   Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5  *   Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6  *   Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
12 #include <linux/dma-mapping.h>
55 #define NEXT_DESP_IDX(X, Y)	(((X) + 1) & ((Y) - 1))
60 #define MTK_PP_MAX_BUF_SIZE	(PAGE_SIZE - MTK_PP_PAD)
134 /* Unicast Filter MAC Address Register - Low */
138 /* Unicast Filter MAC Address Register - High */
148 /* PSE Free Queue Flow Control  */
154 /* PSE Input Queue Reservation Register*/
155 #define PSE_IQ_REV(x)		(0x140 + (((x) - 1) << 2))
157 /* PSE Output Queue Threshold Register*/
158 #define PSE_OQ_TH(x)		(0x160 + (((x) - 1) << 2))
330 #define TX_DMA_PLEN0(x)		(((x) & eth->soc->txrx.dma_max_len) << eth->soc->txrx.dma_len_offset)
331 #define TX_DMA_PLEN1(x)		((x) & eth->soc->txrx.dma_max_len)
351 #define RX_DMA_PREP_PLEN0(x)	(((x) & eth->soc->txrx.dma_max_len) << eth->soc->txrx.dma_len_offset)
352 #define RX_DMA_GET_PLEN0(x)	(((x) >> eth->soc->txrx.dma_len_offset) & eth->soc->txrx.dma_max_len)
511 /* ethernet subsystem chip id register */
518 /* ethernet system control register */
522 /* ethernet subsystem config register */
533 /* ethernet subsystem clock register */
540 /* ethernet reset control register */
554 /* ethernet reset check idle register */
557 /* ethernet dma channel agent map */
653 /* struct mtk_hw_stats - the structure that holds the traffic statistics.
684 	/* PDMA descriptor can point at 1-2 segments. This enum allows us to
832 /* PSE Port Definition */
867 /* struct mtk_tx_buf -	This struct holds the pointers to the memory pointed at
887 /* struct mtk_tx_ring -	This struct holds info describing a TX ring
920 /* struct mtk_rx_ring -	This struct holds info describing a RX ring
1029 /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */
1032 /* 0: GMAC2 -> GEPHY, 1: GMAC0 -> GePHY */
1036 /* 0: U3 -> QPHY, 1: GMAC2 -> QPHY */
1040 /* 2: GMAC1 -> SGMII, 3: GMAC2 -> SGMII */
1045 /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */
1140 /* struct mtk_eth_data -	This is the structure holding all differences
1191 /* struct mtk_eth -	This is the main datasructure for holding the state
1210  * @sgmii_pcs:		Pointers to mtk-pcs-lynxi phylink_pcs instances
1303 /* struct mtk_mac -	the structure that holds the info about the MACs of the
1331 	return eth->soc->version == 1;  in mtk_is_netsys_v1()
1336 	return eth->soc->version > 1;  in mtk_is_netsys_v2_or_greater()
1341 	return eth->soc->version > 2;  in mtk_is_netsys_v3_or_greater()
1347 	const struct mtk_soc_data *soc = ppe->eth->soc;  in mtk_foe_get_entry()
1349 	return ppe->foe_table + hash * soc->foe_entry_size;  in mtk_foe_get_entry()