179 		skge_write32(hw, B2_GP_IO, reg);  in skge_wol_init()
182 	skge_write32(hw, SK_REG(port, GPHY_CTRL),  in skge_wol_init()
187 	skge_write32(hw, SK_REG(port, GPHY_CTRL),  in skge_wol_init()
192 	skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);  in skge_wol_init()
677 	skge_write32(hw, B2_IRQM_MSK, msk);  in skge_set_coalesce()
679 		skge_write32(hw, B2_IRQM_CTRL, TIM_STOP);  in skge_set_coalesce()
681 		skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, delay));  in skge_set_coalesce()
682 		skge_write32(hw, B2_IRQM_CTRL, TIM_START);  in skge_set_coalesce()
700 				skge_write32(hw, SK_REG(port, TX_LED_VAL), 0);  in skge_led()
704 			skge_write32(hw, SK_REG(port, RX_LED_VAL), 0);  in skge_led()
719 			skge_write32(hw, SK_REG(port, RX_LED_VAL), 100);  in skge_led()
726 				skge_write32(hw, SK_REG(port, TX_LED_VAL), 100);  in skge_led()
1148 	skge_write32(hw, B2_BSC_INI, (SK_BLK_DUR * SK_FACT_53) / 100);  in genesis_init()
1569 		skge_write32(hw, B2_GP_IO, r);  in genesis_mac_init()
1727 		skge_write32(hw, B2_GP_IO, reg);  in genesis_stop()
2060 	skge_write32(hw, B2_FAR, reg);  in is_yukon_lite_a0()
2076 		skge_write32(hw, B2_GP_IO, reg);  in yukon_mac_init()
2080 	skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);  in yukon_mac_init()
2081 	skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);  in yukon_mac_init()
2089 		skge_write32(hw, B2_GP_IO, reg);  in yukon_mac_init()
2098 	skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET);  in yukon_mac_init()
2099 	skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_CLR);  in yukon_mac_init()
2100 	skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);  in yukon_mac_init()
2128 		skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);  in yukon_mac_init()
2495 	skge_write32(hw, RB_ADDR(q, RB_START), start);  in skge_ramset()
2496 	skge_write32(hw, RB_ADDR(q, RB_WP), start);  in skge_ramset()
2497 	skge_write32(hw, RB_ADDR(q, RB_RP), start);  in skge_ramset()
2498 	skge_write32(hw, RB_ADDR(q, RB_END), end);  in skge_ramset()
2502 		skge_write32(hw, RB_ADDR(q, RB_RX_UTPP),  in skge_ramset()
2504 		skge_write32(hw, RB_ADDR(q, RB_RX_LTPP),  in skge_ramset()
2528 	skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET);  in skge_qset()
2529 	skge_write32(hw, Q_ADDR(q, Q_F), watermark);  in skge_qset()
2530 	skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32));  in skge_qset()
2531 	skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base);  in skge_qset()
2620 	skge_write32(hw, B0_IMSK, hw->intr_mask);  in skge_up()
2647 	skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL),  in skge_rx_stop()
2649 	skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET);  in skge_rx_stop()
2673 	skge_write32(hw, B0_IMSK, (hw->ports == 1) ? 0 : hw->intr_mask);  in skge_down()
2688 	skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),  in skge_down()
2697 	skge_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);  in skge_down()
2698 	skge_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);  in skge_down()
2701 	skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET);  in skge_down()
2702 	skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);  in skge_down()
3237 		skge_write32(hw, B0_IMSK, hw->intr_mask);  in skge_poll()
3309 		skge_write32(hw, B0_R1_CSR, CSR_IRQ_CL_P);  in skge_error_irq()
3315 		skge_write32(hw, B0_R2_CSR, CSR_IRQ_CL_P);  in skge_error_irq()
3371 	skge_write32(hw, B0_IMSK, hw->intr_mask);  in skge_extirq()
3436 	skge_write32(hw, B0_IMSK, hw->intr_mask);  in skge_intr()
3666 	skge_write32(hw, B0_HWE_IMSK, IS_ERR_MSK);  in skge_reset()
3671 	skge_write32(hw, B2_IRQM_MSK, IS_XA1_F|IS_XA2_F);  in skge_reset()
3672 	skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100));  in skge_reset()
3673 	skge_write32(hw, B2_IRQM_CTRL, TIM_START);  in skge_reset()
3676 	skge_write32(hw, B0_IMSK, 0);  in skge_reset()
4044 		skge_write32(hw, B0_IMSK, 0);  in skge_remove()
4084 	skge_write32(hw, B0_IMSK, 0);  in skge_suspend()