2553 	int vfs = rvu->vfs;  in rvu_mbox_intr_handler()  local
2560 	if (vfs > 64) {  in rvu_mbox_intr_handler()
2564 		rvu_queue_work(&rvu->afvf_wq_info, 64, vfs, intr);  in rvu_mbox_intr_handler()
2565 		vfs -= 64;  in rvu_mbox_intr_handler()
2573 	rvu_queue_work(&rvu->afvf_wq_info, 0, vfs, intr);  in rvu_mbox_intr_handler()
2755 	if (rvu->vfs > 64)  in rvu_flr_intr_handler()
2756 		rvu_afvf_queue_flr_work(rvu, 64, rvu->vfs - 64);  in rvu_flr_intr_handler()
3095 	int vfs = rvu->vfs;  in rvu_disable_afvf_intr()  local
3097 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3098 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3099 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3100 	if (vfs <= 64)  in rvu_disable_afvf_intr()
3104 		      INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3105 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3106 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3111 	int vfs = rvu->vfs;  in rvu_enable_afvf_intr()  local
3117 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3118 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3121 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3122 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3123 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3126 	if (vfs <= 64)  in rvu_enable_afvf_intr()
3129 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3131 		      INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3133 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3134 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3135 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3165 	int err, chans, vfs;  in rvu_enable_sriov()  local
3177 	vfs = pci_sriov_get_totalvfs(pdev);  in rvu_enable_sriov()
3180 	if (vfs > chans)  in rvu_enable_sriov()
3181 		vfs = chans;  in rvu_enable_sriov()
3183 	if (!vfs)  in rvu_enable_sriov()
3189 	if (vfs > 62)  in rvu_enable_sriov()
3190 		vfs = 62;  in rvu_enable_sriov()
3196 	rvu->vfs = vfs;  in rvu_enable_sriov()
3198 	err = rvu_mbox_init(rvu, &rvu->afvf_wq_info, TYPE_AFVF, vfs,  in rvu_enable_sriov()
3207 	err = pci_enable_sriov(pdev, vfs);  in rvu_enable_sriov()